1 files changed, 12 insertions, 14 deletions

diff --git a/arch/powerpc/kvm/e500_tlb.c b/arch/powerpc/kvm/e500_tlb.c
index 0e773fc2d5e4..fb1e1dc11ba5 100644
--- a/arch/powerpc/kvm/e500_tlb.c
+++ b/arch/powerpc/kvm/e500_tlb.c
@@ -22,6 +22,7 @@
 
 #include "../mm/mmu_decl.h"
 #include "e500_tlb.h"
+#include "trace.h"
 
 #define to_htlb1_esel(esel) (tlb1_entry_num - (esel) - 1)
 
@@ -224,9 +225,8 @@ static void kvmppc_e500_stlbe_invalidate(struct kvmppc_vcpu_e500 *vcpu_e500,
 
         kvmppc_e500_shadow_release(vcpu_e500, tlbsel, esel);
         stlbe->mas1 = 0;
-        KVMTRACE_5D(STLB_INVAL, &vcpu_e500->vcpu, index_of(tlbsel, esel),
-                        stlbe->mas1, stlbe->mas2, stlbe->mas3, stlbe->mas7,
-                        handler);
+        trace_kvm_stlb_inval(index_of(tlbsel, esel), stlbe->mas1, stlbe->mas2,
+                             stlbe->mas3, stlbe->mas7);
 }
 
 static void kvmppc_e500_tlb1_invalidate(struct kvmppc_vcpu_e500 *vcpu_e500,
@@ -269,7 +269,7 @@ static inline void kvmppc_e500_deliver_tlb_miss(struct kvm_vcpu *vcpu,
         tlbsel = (vcpu_e500->mas4 >> 28) & 0x1;
         victim = (tlbsel == 0) ? tlb0_get_next_victim(vcpu_e500) : 0;
         pidsel = (vcpu_e500->mas4 >> 16) & 0xf;
-        tsized = (vcpu_e500->mas4 >> 8) & 0xf;
+        tsized = (vcpu_e500->mas4 >> 7) & 0x1f;
 
         vcpu_e500->mas0 = MAS0_TLBSEL(tlbsel) | MAS0_ESEL(victim)
                 | MAS0_NV(vcpu_e500->guest_tlb_nv[tlbsel]);
@@ -309,7 +309,7 @@ static inline void kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,
         vcpu_e500->shadow_pages[tlbsel][esel] = new_page;
 
         /* Force TS=1 IPROT=0 TSIZE=4KB for all guest mappings. */
-        stlbe->mas1 = MAS1_TSIZE(BOOKE_PAGESZ_4K)
+        stlbe->mas1 = MAS1_TSIZE(BOOK3E_PAGESZ_4K)
                 | MAS1_TID(get_tlb_tid(gtlbe)) | MAS1_TS | MAS1_VALID;
         stlbe->mas2 = (gvaddr & MAS2_EPN)
                 | e500_shadow_mas2_attrib(gtlbe->mas2,
@@ -319,9 +319,8 @@ static inline void kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,
                                 vcpu_e500->vcpu.arch.msr & MSR_PR);
         stlbe->mas7 = (hpaddr >> 32) & MAS7_RPN;
 
-        KVMTRACE_5D(STLB_WRITE, &vcpu_e500->vcpu, index_of(tlbsel, esel),
-                        stlbe->mas1, stlbe->mas2, stlbe->mas3, stlbe->mas7,
-                        handler);
+        trace_kvm_stlb_write(index_of(tlbsel, esel), stlbe->mas1, stlbe->mas2,
+                             stlbe->mas3, stlbe->mas7);
 }
 
 /* XXX only map the one-one case, for now use TLB0 */
@@ -535,9 +534,8 @@ int kvmppc_e500_emul_tlbwe(struct kvm_vcpu *vcpu)
         gtlbe->mas3 = vcpu_e500->mas3;
         gtlbe->mas7 = vcpu_e500->mas7;
 
-        KVMTRACE_5D(GTLB_WRITE, vcpu, vcpu_e500->mas0,
-                        gtlbe->mas1, gtlbe->mas2, gtlbe->mas3, gtlbe->mas7,
-                        handler);
+        trace_kvm_gtlb_write(vcpu_e500->mas0, gtlbe->mas1, gtlbe->mas2,
+                             gtlbe->mas3, gtlbe->mas7);
 
         /* Invalidate shadow mappings for the about-to-be-clobbered TLBE. */
         if (tlbe_is_host_safe(vcpu, gtlbe)) {
@@ -545,7 +543,7 @@ int kvmppc_e500_emul_tlbwe(struct kvm_vcpu *vcpu)
                 case 0:
                         /* TLB0 */
                         gtlbe->mas1 &= ~MAS1_TSIZE(~0);
-                        gtlbe->mas1 |= MAS1_TSIZE(BOOKE_PAGESZ_4K);
+                        gtlbe->mas1 |= MAS1_TSIZE(BOOK3E_PAGESZ_4K);
 
                         stlbsel = 0;
                         sesel = kvmppc_e500_stlbe_map(vcpu_e500, 0, esel);
@@ -679,14 +677,14 @@ void kvmppc_e500_tlb_setup(struct kvmppc_vcpu_e500 *vcpu_e500)
 
         /* Insert large initial mapping for guest. */
         tlbe = &vcpu_e500->guest_tlb[1][0];
-        tlbe->mas1 = MAS1_VALID | MAS1_TSIZE(BOOKE_PAGESZ_256M);
+        tlbe->mas1 = MAS1_VALID | MAS1_TSIZE(BOOK3E_PAGESZ_256M);
         tlbe->mas2 = 0;
         tlbe->mas3 = E500_TLB_SUPER_PERM_MASK;
         tlbe->mas7 = 0;
 
         /* 4K map for serial output. Used by kernel wrapper. */
         tlbe = &vcpu_e500->guest_tlb[1][1];
-        tlbe->mas1 = MAS1_VALID | MAS1_TSIZE(BOOKE_PAGESZ_4K);
+        tlbe->mas1 = MAS1_VALID | MAS1_TSIZE(BOOK3E_PAGESZ_4K);
         tlbe->mas2 = (0xe0004500 & 0xFFFFF000) | MAS2_I | MAS2_G;
         tlbe->mas3 = (0xe0004500 & 0xFFFFF000) | E500_TLB_SUPER_PERM_MASK;
         tlbe->mas7 = 0;