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-rw-r--r--arch/powerpc/kernel/traps.c40
1 files changed, 40 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index b6859aade9c2..3031fc712ad0 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -380,6 +380,46 @@ int machine_check_440A(struct pt_regs *regs)
380 } 380 }
381 return 0; 381 return 0;
382} 382}
383
384int machine_check_47x(struct pt_regs *regs)
385{
386 unsigned long reason = get_mc_reason(regs);
387 u32 mcsr;
388
389 printk(KERN_ERR "Machine check in kernel mode.\n");
390 if (reason & ESR_IMCP) {
391 printk(KERN_ERR
392 "Instruction Synchronous Machine Check exception\n");
393 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
394 return 0;
395 }
396 mcsr = mfspr(SPRN_MCSR);
397 if (mcsr & MCSR_IB)
398 printk(KERN_ERR "Instruction Read PLB Error\n");
399 if (mcsr & MCSR_DRB)
400 printk(KERN_ERR "Data Read PLB Error\n");
401 if (mcsr & MCSR_DWB)
402 printk(KERN_ERR "Data Write PLB Error\n");
403 if (mcsr & MCSR_TLBP)
404 printk(KERN_ERR "TLB Parity Error\n");
405 if (mcsr & MCSR_ICP) {
406 flush_instruction_cache();
407 printk(KERN_ERR "I-Cache Parity Error\n");
408 }
409 if (mcsr & MCSR_DCSP)
410 printk(KERN_ERR "D-Cache Search Parity Error\n");
411 if (mcsr & PPC47x_MCSR_GPR)
412 printk(KERN_ERR "GPR Parity Error\n");
413 if (mcsr & PPC47x_MCSR_FPR)
414 printk(KERN_ERR "FPR Parity Error\n");
415 if (mcsr & PPC47x_MCSR_IPR)
416 printk(KERN_ERR "Machine Check exception is imprecise\n");
417
418 /* Clear MCSR */
419 mtspr(SPRN_MCSR, mcsr);
420
421 return 0;
422}
383#elif defined(CONFIG_E500) 423#elif defined(CONFIG_E500)
384int machine_check_e500(struct pt_regs *regs) 424int machine_check_e500(struct pt_regs *regs)
385{ 425{