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Diffstat (limited to 'arch/powerpc/kernel/pci_32.c')
-rw-r--r--arch/powerpc/kernel/pci_32.c58
1 files changed, 0 insertions, 58 deletions
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index 14e300f85ce4..88db4ffaf11c 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
@@ -94,64 +94,6 @@ fixup_cpc710_pci64(struct pci_dev* dev)
94} 94}
95DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CPC710_PCI64, fixup_cpc710_pci64); 95DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CPC710_PCI64, fixup_cpc710_pci64);
96 96
97
98void __init
99update_bridge_resource(struct pci_dev *dev, struct resource *res)
100{
101 u8 io_base_lo, io_limit_lo;
102 u16 mem_base, mem_limit;
103 u16 cmd;
104 resource_size_t start, end, off;
105 struct pci_controller *hose = dev->sysdata;
106
107 if (!hose) {
108 printk("update_bridge_base: no hose?\n");
109 return;
110 }
111 pci_read_config_word(dev, PCI_COMMAND, &cmd);
112 pci_write_config_word(dev, PCI_COMMAND,
113 cmd & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY));
114 if (res->flags & IORESOURCE_IO) {
115 off = (unsigned long) hose->io_base_virt - isa_io_base;
116 start = res->start - off;
117 end = res->end - off;
118 io_base_lo = (start >> 8) & PCI_IO_RANGE_MASK;
119 io_limit_lo = (end >> 8) & PCI_IO_RANGE_MASK;
120 if (end > 0xffff)
121 io_base_lo |= PCI_IO_RANGE_TYPE_32;
122 else
123 io_base_lo |= PCI_IO_RANGE_TYPE_16;
124 pci_write_config_word(dev, PCI_IO_BASE_UPPER16,
125 start >> 16);
126 pci_write_config_word(dev, PCI_IO_LIMIT_UPPER16,
127 end >> 16);
128 pci_write_config_byte(dev, PCI_IO_BASE, io_base_lo);
129 pci_write_config_byte(dev, PCI_IO_LIMIT, io_limit_lo);
130
131 } else if ((res->flags & (IORESOURCE_MEM | IORESOURCE_PREFETCH))
132 == IORESOURCE_MEM) {
133 off = hose->pci_mem_offset;
134 mem_base = ((res->start - off) >> 16) & PCI_MEMORY_RANGE_MASK;
135 mem_limit = ((res->end - off) >> 16) & PCI_MEMORY_RANGE_MASK;
136 pci_write_config_word(dev, PCI_MEMORY_BASE, mem_base);
137 pci_write_config_word(dev, PCI_MEMORY_LIMIT, mem_limit);
138
139 } else if ((res->flags & (IORESOURCE_MEM | IORESOURCE_PREFETCH))
140 == (IORESOURCE_MEM | IORESOURCE_PREFETCH)) {
141 off = hose->pci_mem_offset;
142 mem_base = ((res->start - off) >> 16) & PCI_PREF_RANGE_MASK;
143 mem_limit = ((res->end - off) >> 16) & PCI_PREF_RANGE_MASK;
144 pci_write_config_word(dev, PCI_PREF_MEMORY_BASE, mem_base);
145 pci_write_config_word(dev, PCI_PREF_MEMORY_LIMIT, mem_limit);
146
147 } else {
148 DBG(KERN_ERR "PCI: ugh, bridge %s res has flags=%lx\n",
149 pci_name(dev), res->flags);
150 }
151 pci_write_config_word(dev, PCI_COMMAND, cmd);
152}
153
154
155#ifdef CONFIG_PPC_OF 97#ifdef CONFIG_PPC_OF
156/* 98/*
157 * Functions below are used on OpenFirmware machines. 99 * Functions below are used on OpenFirmware machines.