aboutsummaryrefslogtreecommitdiffstats
path: root/arch/powerpc/kernel/head_64.S
diff options
context:
space:
mode:
Diffstat (limited to 'arch/powerpc/kernel/head_64.S')
-rw-r--r--arch/powerpc/kernel/head_64.S54
1 files changed, 34 insertions, 20 deletions
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 6ff3cf506088..3065b472b95d 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -132,7 +132,7 @@ _GLOBAL(__secondary_hold)
132 bne 100b 132 bne 100b
133 133
134#if defined(CONFIG_SMP) || defined(CONFIG_KEXEC) 134#if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
135 LOAD_REG_IMMEDIATE(r4, .pSeries_secondary_smp_init) 135 LOAD_REG_IMMEDIATE(r4, .generic_secondary_smp_init)
136 mtctr r4 136 mtctr r4
137 mr r3,r24 137 mr r3,r24
138 bctr 138 bctr
@@ -1484,19 +1484,17 @@ fwnmi_data_area:
1484 . = 0x8000 1484 . = 0x8000
1485 1485
1486/* 1486/*
1487 * On pSeries, secondary processors spin in the following code. 1487 * On pSeries and most other platforms, secondary processors spin
1488 * in the following code.
1488 * At entry, r3 = this processor's number (physical cpu id) 1489 * At entry, r3 = this processor's number (physical cpu id)
1489 */ 1490 */
1490_GLOBAL(pSeries_secondary_smp_init) 1491_GLOBAL(generic_secondary_smp_init)
1491 mr r24,r3 1492 mr r24,r3
1492 1493
1493 /* turn on 64-bit mode */ 1494 /* turn on 64-bit mode */
1494 bl .enable_64b_mode 1495 bl .enable_64b_mode
1495 isync 1496 isync
1496 1497
1497 /* Copy some CPU settings from CPU 0 */
1498 bl .__restore_cpu_setup
1499
1500 /* Set up a paca value for this processor. Since we have the 1498 /* Set up a paca value for this processor. Since we have the
1501 * physical cpu id in r24, we need to search the pacas to find 1499 * physical cpu id in r24, we need to search the pacas to find
1502 * which logical id maps to our physical one. 1500 * which logical id maps to our physical one.
@@ -1522,15 +1520,28 @@ _GLOBAL(pSeries_secondary_smp_init)
1522 /* start. */ 1520 /* start. */
1523 sync 1521 sync
1524 1522
1525 /* Create a temp kernel stack for use before relocation is on. */ 1523#ifndef CONFIG_SMP
1524 b 3b /* Never go on non-SMP */
1525#else
1526 cmpwi 0,r23,0
1527 beq 3b /* Loop until told to go */
1528
1529 /* See if we need to call a cpu state restore handler */
1530 LOAD_REG_IMMEDIATE(r23, cur_cpu_spec)
1531 ld r23,0(r23)
1532 ld r23,CPU_SPEC_RESTORE(r23)
1533 cmpdi 0,r23,0
1534 beq 4f
1535 ld r23,0(r23)
1536 mtctr r23
1537 bctrl
1538
15394: /* Create a temp kernel stack for use before relocation is on. */
1526 ld r1,PACAEMERGSP(r13) 1540 ld r1,PACAEMERGSP(r13)
1527 subi r1,r1,STACK_FRAME_OVERHEAD 1541 subi r1,r1,STACK_FRAME_OVERHEAD
1528 1542
1529 cmpwi 0,r23,0 1543 b .__secondary_start
1530#ifdef CONFIG_SMP
1531 bne .__secondary_start
1532#endif 1544#endif
1533 b 3b /* Loop until told to go */
1534 1545
1535#ifdef CONFIG_PPC_ISERIES 1546#ifdef CONFIG_PPC_ISERIES
1536_STATIC(__start_initialization_iSeries) 1547_STATIC(__start_initialization_iSeries)
@@ -1611,7 +1622,16 @@ _GLOBAL(__start_initialization_multiplatform)
1611 bl .enable_64b_mode 1622 bl .enable_64b_mode
1612 1623
1613 /* Setup some critical 970 SPRs before switching MMU off */ 1624 /* Setup some critical 970 SPRs before switching MMU off */
1614 bl .__970_cpu_preinit 1625 mfspr r0,SPRN_PVR
1626 srwi r0,r0,16
1627 cmpwi r0,0x39 /* 970 */
1628 beq 1f
1629 cmpwi r0,0x3c /* 970FX */
1630 beq 1f
1631 cmpwi r0,0x44 /* 970MP */
1632 bne 2f
16331: bl .__cpu_preinit_ppc970
16342:
1615 1635
1616 /* Switch off MMU if not already */ 1636 /* Switch off MMU if not already */
1617 LOAD_REG_IMMEDIATE(r4, .__after_prom_start - KERNELBASE) 1637 LOAD_REG_IMMEDIATE(r4, .__after_prom_start - KERNELBASE)
@@ -1728,7 +1748,7 @@ _STATIC(__after_prom_start)
1728_GLOBAL(copy_and_flush) 1748_GLOBAL(copy_and_flush)
1729 addi r5,r5,-8 1749 addi r5,r5,-8
1730 addi r6,r6,-8 1750 addi r6,r6,-8
17314: li r0,16 /* Use the least common */ 17514: li r0,8 /* Use the smallest common */
1732 /* denominator cache line */ 1752 /* denominator cache line */
1733 /* size. This results in */ 1753 /* size. This results in */
1734 /* extra cache line flushes */ 1754 /* extra cache line flushes */
@@ -1782,7 +1802,7 @@ _GLOBAL(pmac_secondary_start)
1782 isync 1802 isync
1783 1803
1784 /* Copy some CPU settings from CPU 0 */ 1804 /* Copy some CPU settings from CPU 0 */
1785 bl .__restore_cpu_setup 1805 bl .__restore_cpu_ppc970
1786 1806
1787 /* pSeries do that early though I don't think we really need it */ 1807 /* pSeries do that early though I don't think we really need it */
1788 mfmsr r3 1808 mfmsr r3
@@ -1932,12 +1952,6 @@ _STATIC(start_here_multiplatform)
1932 mr r5,r26 1952 mr r5,r26
1933 bl .identify_cpu 1953 bl .identify_cpu
1934 1954
1935 /* Save some low level config HIDs of CPU0 to be copied to
1936 * other CPUs later on, or used for suspend/resume
1937 */
1938 bl .__save_cpu_setup
1939 sync
1940
1941 /* Do very early kernel initializations, including initial hash table, 1955 /* Do very early kernel initializations, including initial hash table,
1942 * stab and slb setup before we turn on relocation. */ 1956 * stab and slb setup before we turn on relocation. */
1943 1957