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-rw-r--r--arch/powerpc/include/asm/bitops.h4
-rw-r--r--arch/powerpc/include/asm/compat.h2
-rw-r--r--arch/powerpc/include/asm/cpm.h2
-rw-r--r--arch/powerpc/include/asm/cpm1.h2
-rw-r--r--arch/powerpc/include/asm/dma-mapping.h6
-rw-r--r--arch/powerpc/include/asm/hvcall.h2
-rw-r--r--arch/powerpc/include/asm/kprobes.h2
-rw-r--r--arch/powerpc/include/asm/lppaca.h2
-rw-r--r--arch/powerpc/include/asm/machdep.h3
-rw-r--r--arch/powerpc/include/asm/mmu-hash64.h2
-rw-r--r--arch/powerpc/include/asm/page.h2
-rw-r--r--arch/powerpc/include/asm/page_64.h2
-rw-r--r--arch/powerpc/include/asm/pasemi_dma.h2
-rw-r--r--arch/powerpc/include/asm/pci-bridge.h2
-rw-r--r--arch/powerpc/include/asm/pmac_feature.h4
-rw-r--r--arch/powerpc/include/asm/pte-common.h4
-rw-r--r--arch/powerpc/include/asm/qe_ic.h16
-rw-r--r--arch/powerpc/include/asm/reg_booke.h4
-rw-r--r--arch/powerpc/include/asm/smp.h5
-rw-r--r--arch/powerpc/include/asm/spu_priv1.h2
-rw-r--r--arch/powerpc/include/asm/systbl.h4
-rw-r--r--arch/powerpc/include/asm/uninorth.h2
-rw-r--r--arch/powerpc/include/asm/unistd.h6
-rw-r--r--arch/powerpc/include/asm/vdso_datapage.h2
24 files changed, 49 insertions, 35 deletions
diff --git a/arch/powerpc/include/asm/bitops.h b/arch/powerpc/include/asm/bitops.h
index 2e561876fc89..f18c6d9b9510 100644
--- a/arch/powerpc/include/asm/bitops.h
+++ b/arch/powerpc/include/asm/bitops.h
@@ -209,8 +209,8 @@ static __inline__ unsigned long ffz(unsigned long x)
209 return BITS_PER_LONG; 209 return BITS_PER_LONG;
210 210
211 /* 211 /*
212 * Calculate the bit position of the least signficant '1' bit in x 212 * Calculate the bit position of the least significant '1' bit in x
213 * (since x has been changed this will actually be the least signficant 213 * (since x has been changed this will actually be the least significant
214 * '0' bit in * the original x). Note: (x & -x) gives us a mask that 214 * '0' bit in * the original x). Note: (x & -x) gives us a mask that
215 * is the least significant * (RIGHT-most) 1-bit of the value in x. 215 * is the least significant * (RIGHT-most) 1-bit of the value in x.
216 */ 216 */
diff --git a/arch/powerpc/include/asm/compat.h b/arch/powerpc/include/asm/compat.h
index 2296112e247b..91010e8f8479 100644
--- a/arch/powerpc/include/asm/compat.h
+++ b/arch/powerpc/include/asm/compat.h
@@ -140,7 +140,7 @@ static inline void __user *arch_compat_alloc_user_space(long len)
140 unsigned long usp = regs->gpr[1]; 140 unsigned long usp = regs->gpr[1];
141 141
142 /* 142 /*
143 * We cant access below the stack pointer in the 32bit ABI and 143 * We can't access below the stack pointer in the 32bit ABI and
144 * can access 288 bytes in the 64bit ABI 144 * can access 288 bytes in the 64bit ABI
145 */ 145 */
146 if (!is_32bit_task()) 146 if (!is_32bit_task())
diff --git a/arch/powerpc/include/asm/cpm.h b/arch/powerpc/include/asm/cpm.h
index e50323fe941f..4398a6cdcf53 100644
--- a/arch/powerpc/include/asm/cpm.h
+++ b/arch/powerpc/include/asm/cpm.h
@@ -98,7 +98,7 @@ typedef struct cpm_buf_desc {
98#define BD_SC_INTRPT (0x1000) /* Interrupt on change */ 98#define BD_SC_INTRPT (0x1000) /* Interrupt on change */
99#define BD_SC_LAST (0x0800) /* Last buffer in frame */ 99#define BD_SC_LAST (0x0800) /* Last buffer in frame */
100#define BD_SC_TC (0x0400) /* Transmit CRC */ 100#define BD_SC_TC (0x0400) /* Transmit CRC */
101#define BD_SC_CM (0x0200) /* Continous mode */ 101#define BD_SC_CM (0x0200) /* Continuous mode */
102#define BD_SC_ID (0x0100) /* Rec'd too many idles */ 102#define BD_SC_ID (0x0100) /* Rec'd too many idles */
103#define BD_SC_P (0x0100) /* xmt preamble */ 103#define BD_SC_P (0x0100) /* xmt preamble */
104#define BD_SC_BR (0x0020) /* Break received */ 104#define BD_SC_BR (0x0020) /* Break received */
diff --git a/arch/powerpc/include/asm/cpm1.h b/arch/powerpc/include/asm/cpm1.h
index bd07650dca56..8ee4211ca0c6 100644
--- a/arch/powerpc/include/asm/cpm1.h
+++ b/arch/powerpc/include/asm/cpm1.h
@@ -4,7 +4,7 @@
4 * 4 *
5 * This file contains structures and information for the communication 5 * This file contains structures and information for the communication
6 * processor channels. Some CPM control and status is available 6 * processor channels. Some CPM control and status is available
7 * throught the MPC8xx internal memory map. See immap.h for details. 7 * through the MPC8xx internal memory map. See immap.h for details.
8 * This file only contains what I need for the moment, not the total 8 * This file only contains what I need for the moment, not the total
9 * CPM capabilities. I (or someone else) will add definitions as they 9 * CPM capabilities. I (or someone else) will add definitions as they
10 * are needed. -- Dan 10 * are needed. -- Dan
diff --git a/arch/powerpc/include/asm/dma-mapping.h b/arch/powerpc/include/asm/dma-mapping.h
index 6d2416a85709..dd70fac57ec8 100644
--- a/arch/powerpc/include/asm/dma-mapping.h
+++ b/arch/powerpc/include/asm/dma-mapping.h
@@ -42,6 +42,7 @@ extern void __dma_free_coherent(size_t size, void *vaddr);
42extern void __dma_sync(void *vaddr, size_t size, int direction); 42extern void __dma_sync(void *vaddr, size_t size, int direction);
43extern void __dma_sync_page(struct page *page, unsigned long offset, 43extern void __dma_sync_page(struct page *page, unsigned long offset,
44 size_t size, int direction); 44 size_t size, int direction);
45extern unsigned long __dma_get_coherent_pfn(unsigned long cpu_addr);
45 46
46#else /* ! CONFIG_NOT_COHERENT_CACHE */ 47#else /* ! CONFIG_NOT_COHERENT_CACHE */
47/* 48/*
@@ -198,6 +199,11 @@ static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
198#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) 199#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
199#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) 200#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
200 201
202extern int dma_mmap_coherent(struct device *, struct vm_area_struct *,
203 void *, dma_addr_t, size_t);
204#define ARCH_HAS_DMA_MMAP_COHERENT
205
206
201static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size, 207static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
202 enum dma_data_direction direction) 208 enum dma_data_direction direction)
203{ 209{
diff --git a/arch/powerpc/include/asm/hvcall.h b/arch/powerpc/include/asm/hvcall.h
index ec089acfa56b..8edec710cc6d 100644
--- a/arch/powerpc/include/asm/hvcall.h
+++ b/arch/powerpc/include/asm/hvcall.h
@@ -122,7 +122,7 @@
122#define H_DABRX_KERNEL (1UL<<(63-62)) 122#define H_DABRX_KERNEL (1UL<<(63-62))
123#define H_DABRX_USER (1UL<<(63-63)) 123#define H_DABRX_USER (1UL<<(63-63))
124 124
125/* Each control block has to be on a 4K bondary */ 125/* Each control block has to be on a 4K boundary */
126#define H_CB_ALIGNMENT 4096 126#define H_CB_ALIGNMENT 4096
127 127
128/* pSeries hypervisor opcodes */ 128/* pSeries hypervisor opcodes */
diff --git a/arch/powerpc/include/asm/kprobes.h b/arch/powerpc/include/asm/kprobes.h
index d0e7701fa1f6..be0171afdc0f 100644
--- a/arch/powerpc/include/asm/kprobes.h
+++ b/arch/powerpc/include/asm/kprobes.h
@@ -50,7 +50,7 @@ typedef unsigned int kprobe_opcode_t;
50 * Handle cases where: 50 * Handle cases where:
51 * - User passes a <.symbol> or <module:.symbol> 51 * - User passes a <.symbol> or <module:.symbol>
52 * - User passes a <symbol> or <module:symbol> 52 * - User passes a <symbol> or <module:symbol>
53 * - User passes a non-existant symbol, kallsyms_lookup_name 53 * - User passes a non-existent symbol, kallsyms_lookup_name
54 * returns 0. Don't deref the NULL pointer in that case 54 * returns 0. Don't deref the NULL pointer in that case
55 */ 55 */
56#define kprobe_lookup_name(name, addr) \ 56#define kprobe_lookup_name(name, addr) \
diff --git a/arch/powerpc/include/asm/lppaca.h b/arch/powerpc/include/asm/lppaca.h
index 26b8c807f8f1..a077adc0b35e 100644
--- a/arch/powerpc/include/asm/lppaca.h
+++ b/arch/powerpc/include/asm/lppaca.h
@@ -105,7 +105,7 @@ struct lppaca {
105 // processing of external interrupts. Note that PLIC will store the 105 // processing of external interrupts. Note that PLIC will store the
106 // XIRR directly into the xXirrValue field so that another XIRR will 106 // XIRR directly into the xXirrValue field so that another XIRR will
107 // not be presented until this one clears. The layout of the low 107 // not be presented until this one clears. The layout of the low
108 // 4-bytes of this Dword is upto SLIC - PLIC just checks whether the 108 // 4-bytes of this Dword is up to SLIC - PLIC just checks whether the
109 // entire Dword is zero or not. A non-zero value in the low order 109 // entire Dword is zero or not. A non-zero value in the low order
110 // 2-bytes will result in SLIC being granted the highest thread 110 // 2-bytes will result in SLIC being granted the highest thread
111 // priority upon return. A 0 will return to SLIC as medium priority. 111 // priority upon return. A 0 will return to SLIC as medium priority.
diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h
index fe56a23e1ff0..e4f01915fbb0 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -35,9 +35,9 @@ struct smp_ops_t {
35 int (*probe)(void); 35 int (*probe)(void);
36 void (*kick_cpu)(int nr); 36 void (*kick_cpu)(int nr);
37 void (*setup_cpu)(int nr); 37 void (*setup_cpu)(int nr);
38 void (*bringup_done)(void);
38 void (*take_timebase)(void); 39 void (*take_timebase)(void);
39 void (*give_timebase)(void); 40 void (*give_timebase)(void);
40 int (*cpu_enable)(unsigned int nr);
41 int (*cpu_disable)(void); 41 int (*cpu_disable)(void);
42 void (*cpu_die)(unsigned int nr); 42 void (*cpu_die)(unsigned int nr);
43 int (*cpu_bootable)(unsigned int nr); 43 int (*cpu_bootable)(unsigned int nr);
@@ -267,7 +267,6 @@ struct machdep_calls {
267 267
268extern void e500_idle(void); 268extern void e500_idle(void);
269extern void power4_idle(void); 269extern void power4_idle(void);
270extern void power4_cpu_offline_powersave(void);
271extern void ppc6xx_idle(void); 270extern void ppc6xx_idle(void);
272extern void book3e_idle(void); 271extern void book3e_idle(void);
273 272
diff --git a/arch/powerpc/include/asm/mmu-hash64.h b/arch/powerpc/include/asm/mmu-hash64.h
index acac35d5b382..ae7b3efec8e5 100644
--- a/arch/powerpc/include/asm/mmu-hash64.h
+++ b/arch/powerpc/include/asm/mmu-hash64.h
@@ -27,7 +27,7 @@
27#define STE_VSID_SHIFT 12 27#define STE_VSID_SHIFT 12
28 28
29/* Location of cpu0's segment table */ 29/* Location of cpu0's segment table */
30#define STAB0_PAGE 0x6 30#define STAB0_PAGE 0x8
31#define STAB0_OFFSET (STAB0_PAGE << 12) 31#define STAB0_OFFSET (STAB0_PAGE << 12)
32#define STAB0_PHYS_ADDR (STAB0_OFFSET + PHYSICAL_START) 32#define STAB0_PHYS_ADDR (STAB0_OFFSET + PHYSICAL_START)
33 33
diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h
index da4b20008541..2cd664ef0a5e 100644
--- a/arch/powerpc/include/asm/page.h
+++ b/arch/powerpc/include/asm/page.h
@@ -100,7 +100,7 @@ extern phys_addr_t kernstart_addr;
100#endif 100#endif
101 101
102#ifdef CONFIG_FLATMEM 102#ifdef CONFIG_FLATMEM
103#define ARCH_PFN_OFFSET (MEMORY_START >> PAGE_SHIFT) 103#define ARCH_PFN_OFFSET ((unsigned long)(MEMORY_START >> PAGE_SHIFT))
104#define pfn_valid(pfn) ((pfn) >= ARCH_PFN_OFFSET && (pfn) < max_mapnr) 104#define pfn_valid(pfn) ((pfn) >= ARCH_PFN_OFFSET && (pfn) < max_mapnr)
105#endif 105#endif
106 106
diff --git a/arch/powerpc/include/asm/page_64.h b/arch/powerpc/include/asm/page_64.h
index 932f88dcf6fa..812b2cd80aed 100644
--- a/arch/powerpc/include/asm/page_64.h
+++ b/arch/powerpc/include/asm/page_64.h
@@ -169,7 +169,7 @@ do { \
169/* 169/*
170 * This is the default if a program doesn't have a PT_GNU_STACK 170 * This is the default if a program doesn't have a PT_GNU_STACK
171 * program header entry. The PPC64 ELF ABI has a non executable stack 171 * program header entry. The PPC64 ELF ABI has a non executable stack
172 * stack by default, so in the absense of a PT_GNU_STACK program header 172 * stack by default, so in the absence of a PT_GNU_STACK program header
173 * we turn execute permission off. 173 * we turn execute permission off.
174 */ 174 */
175#define VM_STACK_DEFAULT_FLAGS32 (VM_READ | VM_WRITE | VM_EXEC | \ 175#define VM_STACK_DEFAULT_FLAGS32 (VM_READ | VM_WRITE | VM_EXEC | \
diff --git a/arch/powerpc/include/asm/pasemi_dma.h b/arch/powerpc/include/asm/pasemi_dma.h
index 19fd7933e2d9..eafa5a5f56de 100644
--- a/arch/powerpc/include/asm/pasemi_dma.h
+++ b/arch/powerpc/include/asm/pasemi_dma.h
@@ -522,7 +522,7 @@ extern void *pasemi_dma_alloc_buf(struct pasemi_dmachan *chan, int size,
522extern void pasemi_dma_free_buf(struct pasemi_dmachan *chan, int size, 522extern void pasemi_dma_free_buf(struct pasemi_dmachan *chan, int size,
523 dma_addr_t *handle); 523 dma_addr_t *handle);
524 524
525/* Routines to allocate flags (events) for channel syncronization */ 525/* Routines to allocate flags (events) for channel synchronization */
526extern int pasemi_dma_alloc_flag(void); 526extern int pasemi_dma_alloc_flag(void);
527extern void pasemi_dma_free_flag(int flag); 527extern void pasemi_dma_free_flag(int flag);
528extern void pasemi_dma_set_flag(int flag); 528extern void pasemi_dma_set_flag(int flag);
diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h
index 5e156e034fe2..b90dbf8e5cd9 100644
--- a/arch/powerpc/include/asm/pci-bridge.h
+++ b/arch/powerpc/include/asm/pci-bridge.h
@@ -106,7 +106,7 @@ struct pci_controller {
106 * Used for variants of PCI indirect handling and possible quirks: 106 * Used for variants of PCI indirect handling and possible quirks:
107 * SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1 107 * SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1
108 * EXT_REG - provides access to PCI-e extended registers 108 * EXT_REG - provides access to PCI-e extended registers
109 * SURPRESS_PRIMARY_BUS - we surpress the setting of PCI_PRIMARY_BUS 109 * SURPRESS_PRIMARY_BUS - we suppress the setting of PCI_PRIMARY_BUS
110 * on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS 110 * on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS
111 * to determine which bus number to match on when generating type0 111 * to determine which bus number to match on when generating type0
112 * config cycles 112 * config cycles
diff --git a/arch/powerpc/include/asm/pmac_feature.h b/arch/powerpc/include/asm/pmac_feature.h
index 00eedc5a4e61..10902c9375d0 100644
--- a/arch/powerpc/include/asm/pmac_feature.h
+++ b/arch/powerpc/include/asm/pmac_feature.h
@@ -53,8 +53,8 @@
53 53
54/* Here is the infamous serie of OHare based machines 54/* Here is the infamous serie of OHare based machines
55 */ 55 */
56#define PMAC_TYPE_COMET 0x20 /* Beleived to be PowerBook 2400 */ 56#define PMAC_TYPE_COMET 0x20 /* Believed to be PowerBook 2400 */
57#define PMAC_TYPE_HOOPER 0x21 /* Beleived to be PowerBook 3400 */ 57#define PMAC_TYPE_HOOPER 0x21 /* Believed to be PowerBook 3400 */
58#define PMAC_TYPE_KANGA 0x22 /* PowerBook 3500 (first G3) */ 58#define PMAC_TYPE_KANGA 0x22 /* PowerBook 3500 (first G3) */
59#define PMAC_TYPE_ALCHEMY 0x23 /* Alchemy motherboard base */ 59#define PMAC_TYPE_ALCHEMY 0x23 /* Alchemy motherboard base */
60#define PMAC_TYPE_GAZELLE 0x24 /* Spartacus, some 5xxx/6xxx */ 60#define PMAC_TYPE_GAZELLE 0x24 /* Spartacus, some 5xxx/6xxx */
diff --git a/arch/powerpc/include/asm/pte-common.h b/arch/powerpc/include/asm/pte-common.h
index 76bb195e4f24..811f04ac3660 100644
--- a/arch/powerpc/include/asm/pte-common.h
+++ b/arch/powerpc/include/asm/pte-common.h
@@ -86,7 +86,7 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
86#define PTE_RPN_MASK (~((1UL<<PTE_RPN_SHIFT)-1)) 86#define PTE_RPN_MASK (~((1UL<<PTE_RPN_SHIFT)-1))
87#endif 87#endif
88 88
89/* _PAGE_CHG_MASK masks of bits that are to be preserved accross 89/* _PAGE_CHG_MASK masks of bits that are to be preserved across
90 * pgprot changes 90 * pgprot changes
91 */ 91 */
92#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \ 92#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
@@ -174,7 +174,7 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
174/* 174/*
175 * Don't just check for any non zero bits in __PAGE_USER, since for book3e 175 * Don't just check for any non zero bits in __PAGE_USER, since for book3e
176 * and PTE_64BIT, PAGE_KERNEL_X contains _PAGE_BAP_SR which is also in 176 * and PTE_64BIT, PAGE_KERNEL_X contains _PAGE_BAP_SR which is also in
177 * _PAGE_USER. Need to explictly match _PAGE_BAP_UR bit in that case too. 177 * _PAGE_USER. Need to explicitly match _PAGE_BAP_UR bit in that case too.
178 */ 178 */
179#define pte_user(val) ((val & _PAGE_USER) == _PAGE_USER) 179#define pte_user(val) ((val & _PAGE_USER) == _PAGE_USER)
180 180
diff --git a/arch/powerpc/include/asm/qe_ic.h b/arch/powerpc/include/asm/qe_ic.h
index 9e2cb2019161..f706164b0bd0 100644
--- a/arch/powerpc/include/asm/qe_ic.h
+++ b/arch/powerpc/include/asm/qe_ic.h
@@ -81,7 +81,7 @@ int qe_ic_set_high_priority(unsigned int virq, unsigned int priority, int high);
81static inline void qe_ic_cascade_low_ipic(unsigned int irq, 81static inline void qe_ic_cascade_low_ipic(unsigned int irq,
82 struct irq_desc *desc) 82 struct irq_desc *desc)
83{ 83{
84 struct qe_ic *qe_ic = get_irq_desc_data(desc); 84 struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
85 unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic); 85 unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic);
86 86
87 if (cascade_irq != NO_IRQ) 87 if (cascade_irq != NO_IRQ)
@@ -91,7 +91,7 @@ static inline void qe_ic_cascade_low_ipic(unsigned int irq,
91static inline void qe_ic_cascade_high_ipic(unsigned int irq, 91static inline void qe_ic_cascade_high_ipic(unsigned int irq,
92 struct irq_desc *desc) 92 struct irq_desc *desc)
93{ 93{
94 struct qe_ic *qe_ic = get_irq_desc_data(desc); 94 struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
95 unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic); 95 unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic);
96 96
97 if (cascade_irq != NO_IRQ) 97 if (cascade_irq != NO_IRQ)
@@ -101,9 +101,9 @@ static inline void qe_ic_cascade_high_ipic(unsigned int irq,
101static inline void qe_ic_cascade_low_mpic(unsigned int irq, 101static inline void qe_ic_cascade_low_mpic(unsigned int irq,
102 struct irq_desc *desc) 102 struct irq_desc *desc)
103{ 103{
104 struct qe_ic *qe_ic = get_irq_desc_data(desc); 104 struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
105 unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic); 105 unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic);
106 struct irq_chip *chip = get_irq_desc_chip(desc); 106 struct irq_chip *chip = irq_desc_get_chip(desc);
107 107
108 if (cascade_irq != NO_IRQ) 108 if (cascade_irq != NO_IRQ)
109 generic_handle_irq(cascade_irq); 109 generic_handle_irq(cascade_irq);
@@ -114,9 +114,9 @@ static inline void qe_ic_cascade_low_mpic(unsigned int irq,
114static inline void qe_ic_cascade_high_mpic(unsigned int irq, 114static inline void qe_ic_cascade_high_mpic(unsigned int irq,
115 struct irq_desc *desc) 115 struct irq_desc *desc)
116{ 116{
117 struct qe_ic *qe_ic = get_irq_desc_data(desc); 117 struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
118 unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic); 118 unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic);
119 struct irq_chip *chip = get_irq_desc_chip(desc); 119 struct irq_chip *chip = irq_desc_get_chip(desc);
120 120
121 if (cascade_irq != NO_IRQ) 121 if (cascade_irq != NO_IRQ)
122 generic_handle_irq(cascade_irq); 122 generic_handle_irq(cascade_irq);
@@ -127,9 +127,9 @@ static inline void qe_ic_cascade_high_mpic(unsigned int irq,
127static inline void qe_ic_cascade_muxed_mpic(unsigned int irq, 127static inline void qe_ic_cascade_muxed_mpic(unsigned int irq,
128 struct irq_desc *desc) 128 struct irq_desc *desc)
129{ 129{
130 struct qe_ic *qe_ic = get_irq_desc_data(desc); 130 struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
131 unsigned int cascade_irq; 131 unsigned int cascade_irq;
132 struct irq_chip *chip = get_irq_desc_chip(desc); 132 struct irq_chip *chip = irq_desc_get_chip(desc);
133 133
134 cascade_irq = qe_ic_get_high_irq(qe_ic); 134 cascade_irq = qe_ic_get_high_irq(qe_ic);
135 if (cascade_irq == NO_IRQ) 135 if (cascade_irq == NO_IRQ)
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index 86ad8128963a..b316794aa2b5 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -2,7 +2,7 @@
2 * Contains register definitions common to the Book E PowerPC 2 * Contains register definitions common to the Book E PowerPC
3 * specification. Notice that while the IBM-40x series of CPUs 3 * specification. Notice that while the IBM-40x series of CPUs
4 * are not true Book E PowerPCs, they borrowed a number of features 4 * are not true Book E PowerPCs, they borrowed a number of features
5 * before Book E was finalized, and are included here as well. Unfortunatly, 5 * before Book E was finalized, and are included here as well. Unfortunately,
6 * they sometimes used different locations than true Book E CPUs did. 6 * they sometimes used different locations than true Book E CPUs did.
7 * 7 *
8 * This program is free software; you can redistribute it and/or 8 * This program is free software; you can redistribute it and/or
@@ -110,7 +110,7 @@
110#define SPRN_MAS2 0x272 /* MMU Assist Register 2 */ 110#define SPRN_MAS2 0x272 /* MMU Assist Register 2 */
111#define SPRN_MAS3 0x273 /* MMU Assist Register 3 */ 111#define SPRN_MAS3 0x273 /* MMU Assist Register 3 */
112#define SPRN_MAS4 0x274 /* MMU Assist Register 4 */ 112#define SPRN_MAS4 0x274 /* MMU Assist Register 4 */
113#define SPRN_MAS5 0x275 /* MMU Assist Register 5 */ 113#define SPRN_MAS5 0x153 /* MMU Assist Register 5 */
114#define SPRN_MAS6 0x276 /* MMU Assist Register 6 */ 114#define SPRN_MAS6 0x276 /* MMU Assist Register 6 */
115#define SPRN_PID1 0x279 /* Process ID Register 1 */ 115#define SPRN_PID1 0x279 /* Process ID Register 1 */
116#define SPRN_PID2 0x27A /* Process ID Register 2 */ 116#define SPRN_PID2 0x27A /* Process ID Register 2 */
diff --git a/arch/powerpc/include/asm/smp.h b/arch/powerpc/include/asm/smp.h
index 66e237bbe15f..a902a0d3ae0d 100644
--- a/arch/powerpc/include/asm/smp.h
+++ b/arch/powerpc/include/asm/smp.h
@@ -36,15 +36,16 @@ extern void cpu_die(void);
36 36
37extern void smp_send_debugger_break(int cpu); 37extern void smp_send_debugger_break(int cpu);
38extern void smp_message_recv(int); 38extern void smp_message_recv(int);
39extern void start_secondary_resume(void);
39 40
40DECLARE_PER_CPU(unsigned int, cpu_pvr); 41DECLARE_PER_CPU(unsigned int, cpu_pvr);
41 42
42#ifdef CONFIG_HOTPLUG_CPU 43#ifdef CONFIG_HOTPLUG_CPU
43extern void fixup_irqs(const struct cpumask *map); 44extern void migrate_irqs(void);
44int generic_cpu_disable(void); 45int generic_cpu_disable(void);
45int generic_cpu_enable(unsigned int cpu);
46void generic_cpu_die(unsigned int cpu); 46void generic_cpu_die(unsigned int cpu);
47void generic_mach_cpu_die(void); 47void generic_mach_cpu_die(void);
48void generic_set_cpu_dead(unsigned int cpu);
48#endif 49#endif
49 50
50#ifdef CONFIG_PPC64 51#ifdef CONFIG_PPC64
diff --git a/arch/powerpc/include/asm/spu_priv1.h b/arch/powerpc/include/asm/spu_priv1.h
index 25020a34ce7f..d8f5c60f61c1 100644
--- a/arch/powerpc/include/asm/spu_priv1.h
+++ b/arch/powerpc/include/asm/spu_priv1.h
@@ -223,7 +223,7 @@ spu_disable_spu (struct spu_context *ctx)
223} 223}
224 224
225/* 225/*
226 * The declarations folowing are put here for convenience 226 * The declarations following are put here for convenience
227 * and only intended to be used by the platform setup code. 227 * and only intended to be used by the platform setup code.
228 */ 228 */
229 229
diff --git a/arch/powerpc/include/asm/systbl.h b/arch/powerpc/include/asm/systbl.h
index aa0f1ebb4aaf..60f64b132bd4 100644
--- a/arch/powerpc/include/asm/systbl.h
+++ b/arch/powerpc/include/asm/systbl.h
@@ -348,3 +348,7 @@ COMPAT_SYS_SPU(sendmsg)
348COMPAT_SYS_SPU(recvmsg) 348COMPAT_SYS_SPU(recvmsg)
349COMPAT_SYS_SPU(recvmmsg) 349COMPAT_SYS_SPU(recvmmsg)
350SYSCALL_SPU(accept4) 350SYSCALL_SPU(accept4)
351SYSCALL_SPU(name_to_handle_at)
352COMPAT_SYS_SPU(open_by_handle_at)
353COMPAT_SYS_SPU(clock_adjtime)
354SYSCALL_SPU(syncfs)
diff --git a/arch/powerpc/include/asm/uninorth.h b/arch/powerpc/include/asm/uninorth.h
index f737732c3861..ae9c899c8a6d 100644
--- a/arch/powerpc/include/asm/uninorth.h
+++ b/arch/powerpc/include/asm/uninorth.h
@@ -60,7 +60,7 @@
60 * 60 *
61 * Obviously, the GART is not cache coherent and so any change to it 61 * Obviously, the GART is not cache coherent and so any change to it
62 * must be flushed to memory (or maybe just make the GART space non 62 * must be flushed to memory (or maybe just make the GART space non
63 * cachable). AGP memory itself doens't seem to be cache coherent neither. 63 * cachable). AGP memory itself does't seem to be cache coherent neither.
64 * 64 *
65 * In order to invalidate the GART (which is probably necessary to inval 65 * In order to invalidate the GART (which is probably necessary to inval
66 * the bridge internal TLBs), the following sequence has to be written, 66 * the bridge internal TLBs), the following sequence has to be written,
diff --git a/arch/powerpc/include/asm/unistd.h b/arch/powerpc/include/asm/unistd.h
index 6151937657f6..3c215648ce6d 100644
--- a/arch/powerpc/include/asm/unistd.h
+++ b/arch/powerpc/include/asm/unistd.h
@@ -367,10 +367,14 @@
367#define __NR_recvmsg 342 367#define __NR_recvmsg 342
368#define __NR_recvmmsg 343 368#define __NR_recvmmsg 343
369#define __NR_accept4 344 369#define __NR_accept4 344
370#define __NR_name_to_handle_at 345
371#define __NR_open_by_handle_at 346
372#define __NR_clock_adjtime 347
373#define __NR_syncfs 348
370 374
371#ifdef __KERNEL__ 375#ifdef __KERNEL__
372 376
373#define __NR_syscalls 345 377#define __NR_syscalls 349
374 378
375#define __NR__exit __NR_exit 379#define __NR__exit __NR_exit
376#define NR_syscalls __NR_syscalls 380#define NR_syscalls __NR_syscalls
diff --git a/arch/powerpc/include/asm/vdso_datapage.h b/arch/powerpc/include/asm/vdso_datapage.h
index 25e39220e89c..b73a8199f161 100644
--- a/arch/powerpc/include/asm/vdso_datapage.h
+++ b/arch/powerpc/include/asm/vdso_datapage.h
@@ -57,7 +57,7 @@ struct vdso_data {
57 } version; 57 } version;
58 58
59 /* Note about the platform flags: it now only contains the lpar 59 /* Note about the platform flags: it now only contains the lpar
60 * bit. The actual platform number is dead and burried 60 * bit. The actual platform number is dead and buried
61 */ 61 */
62 __u32 platform; /* Platform flags 0x18 */ 62 __u32 platform; /* Platform flags 0x18 */
63 __u32 processor; /* Processor type 0x1C */ 63 __u32 processor; /* Processor type 0x1C */