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-rw-r--r--arch/powerpc/include/asm/mmu.h10
-rw-r--r--arch/powerpc/include/asm/perf_event_server.h3
2 files changed, 2 insertions, 11 deletions
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index f8d1d6dcf7db..e61f24ed4e65 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -19,8 +19,7 @@
19#define MMU_FTR_TYPE_40x ASM_CONST(0x00000004) 19#define MMU_FTR_TYPE_40x ASM_CONST(0x00000004)
20#define MMU_FTR_TYPE_44x ASM_CONST(0x00000008) 20#define MMU_FTR_TYPE_44x ASM_CONST(0x00000008)
21#define MMU_FTR_TYPE_FSL_E ASM_CONST(0x00000010) 21#define MMU_FTR_TYPE_FSL_E ASM_CONST(0x00000010)
22#define MMU_FTR_TYPE_3E ASM_CONST(0x00000020) 22#define MMU_FTR_TYPE_47x ASM_CONST(0x00000020)
23#define MMU_FTR_TYPE_47x ASM_CONST(0x00000040)
24 23
25/* 24/*
26 * This is individual features 25 * This is individual features
@@ -106,13 +105,6 @@
106 MMU_FTR_CI_LARGE_PAGE 105 MMU_FTR_CI_LARGE_PAGE
107#define MMU_FTRS_PA6T MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \ 106#define MMU_FTRS_PA6T MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \
108 MMU_FTR_CI_LARGE_PAGE | MMU_FTR_NO_SLBIE_B 107 MMU_FTR_CI_LARGE_PAGE | MMU_FTR_NO_SLBIE_B
109#define MMU_FTRS_A2 MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX | \
110 MMU_FTR_USE_TLBIVAX_BCAST | \
111 MMU_FTR_LOCK_BCAST_INVAL | \
112 MMU_FTR_USE_TLBRSRV | \
113 MMU_FTR_USE_PAIRED_MAS | \
114 MMU_FTR_TLBIEL | \
115 MMU_FTR_16M_PAGE
116#ifndef __ASSEMBLY__ 108#ifndef __ASSEMBLY__
117#include <asm/cputable.h> 109#include <asm/cputable.h>
118 110
diff --git a/arch/powerpc/include/asm/perf_event_server.h b/arch/powerpc/include/asm/perf_event_server.h
index 9ed737146dbb..b3e936027b26 100644
--- a/arch/powerpc/include/asm/perf_event_server.h
+++ b/arch/powerpc/include/asm/perf_event_server.h
@@ -61,8 +61,7 @@ struct power_pmu {
61#define PPMU_SIAR_VALID 0x00000010 /* Processor has SIAR Valid bit */ 61#define PPMU_SIAR_VALID 0x00000010 /* Processor has SIAR Valid bit */
62#define PPMU_HAS_SSLOT 0x00000020 /* Has sampled slot in MMCRA */ 62#define PPMU_HAS_SSLOT 0x00000020 /* Has sampled slot in MMCRA */
63#define PPMU_HAS_SIER 0x00000040 /* Has SIER */ 63#define PPMU_HAS_SIER 0x00000040 /* Has SIER */
64#define PPMU_BHRB 0x00000080 /* has BHRB feature enabled */ 64#define PPMU_ARCH_207S 0x00000080 /* PMC is architecture v2.07S */
65#define PPMU_EBB 0x00000100 /* supports event based branch */
66 65
67/* 66/*
68 * Values for flags to get_alternatives() 67 * Values for flags to get_alternatives()