diff options
Diffstat (limited to 'arch/powerpc/include/asm/mmu-book3e.h')
-rw-r--r-- | arch/powerpc/include/asm/mmu-book3e.h | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/mmu-book3e.h b/arch/powerpc/include/asm/mmu-book3e.h index 17194fcd4040..3ea0f9a259d8 100644 --- a/arch/powerpc/include/asm/mmu-book3e.h +++ b/arch/powerpc/include/asm/mmu-book3e.h | |||
@@ -43,6 +43,7 @@ | |||
43 | #define MAS0_TLBSEL(x) (((x) << 28) & 0x30000000) | 43 | #define MAS0_TLBSEL(x) (((x) << 28) & 0x30000000) |
44 | #define MAS0_ESEL(x) (((x) << 16) & 0x0FFF0000) | 44 | #define MAS0_ESEL(x) (((x) << 16) & 0x0FFF0000) |
45 | #define MAS0_NV(x) ((x) & 0x00000FFF) | 45 | #define MAS0_NV(x) ((x) & 0x00000FFF) |
46 | #define MAS0_ESEL_MASK 0x0FFF0000 | ||
46 | #define MAS0_HES 0x00004000 | 47 | #define MAS0_HES 0x00004000 |
47 | #define MAS0_WQ_ALLWAYS 0x00000000 | 48 | #define MAS0_WQ_ALLWAYS 0x00000000 |
48 | #define MAS0_WQ_COND 0x00001000 | 49 | #define MAS0_WQ_COND 0x00001000 |
@@ -137,6 +138,21 @@ | |||
137 | #define MMUCSR0_TLB2PS 0x00078000 /* TLB2 Page Size */ | 138 | #define MMUCSR0_TLB2PS 0x00078000 /* TLB2 Page Size */ |
138 | #define MMUCSR0_TLB3PS 0x00780000 /* TLB3 Page Size */ | 139 | #define MMUCSR0_TLB3PS 0x00780000 /* TLB3 Page Size */ |
139 | 140 | ||
141 | /* MMUCFG bits */ | ||
142 | #define MMUCFG_MAVN_NASK 0x00000003 | ||
143 | #define MMUCFG_MAVN_V1_0 0x00000000 | ||
144 | #define MMUCFG_MAVN_V2_0 0x00000001 | ||
145 | #define MMUCFG_NTLB_MASK 0x0000000c | ||
146 | #define MMUCFG_NTLB_SHIFT 2 | ||
147 | #define MMUCFG_PIDSIZE_MASK 0x000007c0 | ||
148 | #define MMUCFG_PIDSIZE_SHIFT 6 | ||
149 | #define MMUCFG_TWC 0x00008000 | ||
150 | #define MMUCFG_LRAT 0x00010000 | ||
151 | #define MMUCFG_RASIZE_MASK 0x00fe0000 | ||
152 | #define MMUCFG_RASIZE_SHIFT 17 | ||
153 | #define MMUCFG_LPIDSIZE_MASK 0x0f000000 | ||
154 | #define MMUCFG_LPIDSIZE_SHIFT 24 | ||
155 | |||
140 | /* TLBnCFG encoding */ | 156 | /* TLBnCFG encoding */ |
141 | #define TLBnCFG_N_ENTRY 0x00000fff /* number of entries */ | 157 | #define TLBnCFG_N_ENTRY 0x00000fff /* number of entries */ |
142 | #define TLBnCFG_HES 0x00002000 /* HW select supported */ | 158 | #define TLBnCFG_HES 0x00002000 /* HW select supported */ |
@@ -229,6 +245,10 @@ extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT]; | |||
229 | extern int mmu_linear_psize; | 245 | extern int mmu_linear_psize; |
230 | extern int mmu_vmemmap_psize; | 246 | extern int mmu_vmemmap_psize; |
231 | 247 | ||
248 | #ifdef CONFIG_PPC64 | ||
249 | extern unsigned long linear_map_top; | ||
250 | #endif | ||
251 | |||
232 | #endif /* !__ASSEMBLY__ */ | 252 | #endif /* !__ASSEMBLY__ */ |
233 | 253 | ||
234 | #endif /* _ASM_POWERPC_MMU_BOOK3E_H_ */ | 254 | #endif /* _ASM_POWERPC_MMU_BOOK3E_H_ */ |