diff options
Diffstat (limited to 'arch/powerpc/include/asm/kvm.h')
-rw-r--r-- | arch/powerpc/include/asm/kvm.h | 184 |
1 files changed, 184 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/kvm.h b/arch/powerpc/include/asm/kvm.h index 18ea6963ad77..d2ca5ed3877b 100644 --- a/arch/powerpc/include/asm/kvm.h +++ b/arch/powerpc/include/asm/kvm.h | |||
@@ -45,6 +45,114 @@ struct kvm_regs { | |||
45 | __u64 gpr[32]; | 45 | __u64 gpr[32]; |
46 | }; | 46 | }; |
47 | 47 | ||
48 | #define KVM_SREGS_E_IMPL_NONE 0 | ||
49 | #define KVM_SREGS_E_IMPL_FSL 1 | ||
50 | |||
51 | #define KVM_SREGS_E_FSL_PIDn (1 << 0) /* PID1/PID2 */ | ||
52 | |||
53 | /* | ||
54 | * Feature bits indicate which sections of the sregs struct are valid, | ||
55 | * both in KVM_GET_SREGS and KVM_SET_SREGS. On KVM_SET_SREGS, registers | ||
56 | * corresponding to unset feature bits will not be modified. This allows | ||
57 | * restoring a checkpoint made without that feature, while keeping the | ||
58 | * default values of the new registers. | ||
59 | * | ||
60 | * KVM_SREGS_E_BASE contains: | ||
61 | * CSRR0/1 (refers to SRR2/3 on 40x) | ||
62 | * ESR | ||
63 | * DEAR | ||
64 | * MCSR | ||
65 | * TSR | ||
66 | * TCR | ||
67 | * DEC | ||
68 | * TB | ||
69 | * VRSAVE (USPRG0) | ||
70 | */ | ||
71 | #define KVM_SREGS_E_BASE (1 << 0) | ||
72 | |||
73 | /* | ||
74 | * KVM_SREGS_E_ARCH206 contains: | ||
75 | * | ||
76 | * PIR | ||
77 | * MCSRR0/1 | ||
78 | * DECAR | ||
79 | * IVPR | ||
80 | */ | ||
81 | #define KVM_SREGS_E_ARCH206 (1 << 1) | ||
82 | |||
83 | /* | ||
84 | * Contains EPCR, plus the upper half of 64-bit registers | ||
85 | * that are 32-bit on 32-bit implementations. | ||
86 | */ | ||
87 | #define KVM_SREGS_E_64 (1 << 2) | ||
88 | |||
89 | #define KVM_SREGS_E_SPRG8 (1 << 3) | ||
90 | #define KVM_SREGS_E_MCIVPR (1 << 4) | ||
91 | |||
92 | /* | ||
93 | * IVORs are used -- contains IVOR0-15, plus additional IVORs | ||
94 | * in combination with an appropriate feature bit. | ||
95 | */ | ||
96 | #define KVM_SREGS_E_IVOR (1 << 5) | ||
97 | |||
98 | /* | ||
99 | * Contains MAS0-4, MAS6-7, TLBnCFG, MMUCFG. | ||
100 | * Also TLBnPS if MMUCFG[MAVN] = 1. | ||
101 | */ | ||
102 | #define KVM_SREGS_E_ARCH206_MMU (1 << 6) | ||
103 | |||
104 | /* DBSR, DBCR, IAC, DAC, DVC */ | ||
105 | #define KVM_SREGS_E_DEBUG (1 << 7) | ||
106 | |||
107 | /* Enhanced debug -- DSRR0/1, SPRG9 */ | ||
108 | #define KVM_SREGS_E_ED (1 << 8) | ||
109 | |||
110 | /* Embedded Floating Point (SPE) -- IVOR32-34 if KVM_SREGS_E_IVOR */ | ||
111 | #define KVM_SREGS_E_SPE (1 << 9) | ||
112 | |||
113 | /* External Proxy (EXP) -- EPR */ | ||
114 | #define KVM_SREGS_EXP (1 << 10) | ||
115 | |||
116 | /* External PID (E.PD) -- EPSC/EPLC */ | ||
117 | #define KVM_SREGS_E_PD (1 << 11) | ||
118 | |||
119 | /* Processor Control (E.PC) -- IVOR36-37 if KVM_SREGS_E_IVOR */ | ||
120 | #define KVM_SREGS_E_PC (1 << 12) | ||
121 | |||
122 | /* Page table (E.PT) -- EPTCFG */ | ||
123 | #define KVM_SREGS_E_PT (1 << 13) | ||
124 | |||
125 | /* Embedded Performance Monitor (E.PM) -- IVOR35 if KVM_SREGS_E_IVOR */ | ||
126 | #define KVM_SREGS_E_PM (1 << 14) | ||
127 | |||
128 | /* | ||
129 | * Special updates: | ||
130 | * | ||
131 | * Some registers may change even while a vcpu is not running. | ||
132 | * To avoid losing these changes, by default these registers are | ||
133 | * not updated by KVM_SET_SREGS. To force an update, set the bit | ||
134 | * in u.e.update_special corresponding to the register to be updated. | ||
135 | * | ||
136 | * The update_special field is zero on return from KVM_GET_SREGS. | ||
137 | * | ||
138 | * When restoring a checkpoint, the caller can set update_special | ||
139 | * to 0xffffffff to ensure that everything is restored, even new features | ||
140 | * that the caller doesn't know about. | ||
141 | */ | ||
142 | #define KVM_SREGS_E_UPDATE_MCSR (1 << 0) | ||
143 | #define KVM_SREGS_E_UPDATE_TSR (1 << 1) | ||
144 | #define KVM_SREGS_E_UPDATE_DEC (1 << 2) | ||
145 | #define KVM_SREGS_E_UPDATE_DBSR (1 << 3) | ||
146 | |||
147 | /* | ||
148 | * In KVM_SET_SREGS, reserved/pad fields must be left untouched from a | ||
149 | * previous KVM_GET_REGS. | ||
150 | * | ||
151 | * Unless otherwise indicated, setting any register with KVM_SET_SREGS | ||
152 | * directly sets its value. It does not trigger any special semantics such | ||
153 | * as write-one-to-clear. Calling KVM_SET_SREGS on an unmodified struct | ||
154 | * just received from KVM_GET_SREGS is always a no-op. | ||
155 | */ | ||
48 | struct kvm_sregs { | 156 | struct kvm_sregs { |
49 | __u32 pvr; | 157 | __u32 pvr; |
50 | union { | 158 | union { |
@@ -62,6 +170,82 @@ struct kvm_sregs { | |||
62 | __u64 dbat[8]; | 170 | __u64 dbat[8]; |
63 | } ppc32; | 171 | } ppc32; |
64 | } s; | 172 | } s; |
173 | struct { | ||
174 | union { | ||
175 | struct { /* KVM_SREGS_E_IMPL_FSL */ | ||
176 | __u32 features; /* KVM_SREGS_E_FSL_ */ | ||
177 | __u32 svr; | ||
178 | __u64 mcar; | ||
179 | __u32 hid0; | ||
180 | |||
181 | /* KVM_SREGS_E_FSL_PIDn */ | ||
182 | __u32 pid1, pid2; | ||
183 | } fsl; | ||
184 | __u8 pad[256]; | ||
185 | } impl; | ||
186 | |||
187 | __u32 features; /* KVM_SREGS_E_ */ | ||
188 | __u32 impl_id; /* KVM_SREGS_E_IMPL_ */ | ||
189 | __u32 update_special; /* KVM_SREGS_E_UPDATE_ */ | ||
190 | __u32 pir; /* read-only */ | ||
191 | __u64 sprg8; | ||
192 | __u64 sprg9; /* E.ED */ | ||
193 | __u64 csrr0; | ||
194 | __u64 dsrr0; /* E.ED */ | ||
195 | __u64 mcsrr0; | ||
196 | __u32 csrr1; | ||
197 | __u32 dsrr1; /* E.ED */ | ||
198 | __u32 mcsrr1; | ||
199 | __u32 esr; | ||
200 | __u64 dear; | ||
201 | __u64 ivpr; | ||
202 | __u64 mcivpr; | ||
203 | __u64 mcsr; /* KVM_SREGS_E_UPDATE_MCSR */ | ||
204 | |||
205 | __u32 tsr; /* KVM_SREGS_E_UPDATE_TSR */ | ||
206 | __u32 tcr; | ||
207 | __u32 decar; | ||
208 | __u32 dec; /* KVM_SREGS_E_UPDATE_DEC */ | ||
209 | |||
210 | /* | ||
211 | * Userspace can read TB directly, but the | ||
212 | * value reported here is consistent with "dec". | ||
213 | * | ||
214 | * Read-only. | ||
215 | */ | ||
216 | __u64 tb; | ||
217 | |||
218 | __u32 dbsr; /* KVM_SREGS_E_UPDATE_DBSR */ | ||
219 | __u32 dbcr[3]; | ||
220 | __u32 iac[4]; | ||
221 | __u32 dac[2]; | ||
222 | __u32 dvc[2]; | ||
223 | __u8 num_iac; /* read-only */ | ||
224 | __u8 num_dac; /* read-only */ | ||
225 | __u8 num_dvc; /* read-only */ | ||
226 | __u8 pad; | ||
227 | |||
228 | __u32 epr; /* EXP */ | ||
229 | __u32 vrsave; /* a.k.a. USPRG0 */ | ||
230 | __u32 epcr; /* KVM_SREGS_E_64 */ | ||
231 | |||
232 | __u32 mas0; | ||
233 | __u32 mas1; | ||
234 | __u64 mas2; | ||
235 | __u64 mas7_3; | ||
236 | __u32 mas4; | ||
237 | __u32 mas6; | ||
238 | |||
239 | __u32 ivor_low[16]; /* IVOR0-15 */ | ||
240 | __u32 ivor_high[18]; /* IVOR32+, plus room to expand */ | ||
241 | |||
242 | __u32 mmucfg; /* read-only */ | ||
243 | __u32 eptcfg; /* E.PT, read-only */ | ||
244 | __u32 tlbcfg[4];/* read-only */ | ||
245 | __u32 tlbps[4]; /* read-only */ | ||
246 | |||
247 | __u32 eplc, epsc; /* E.PD */ | ||
248 | } e; | ||
65 | __u8 pad[1020]; | 249 | __u8 pad[1020]; |
66 | } u; | 250 | } u; |
67 | }; | 251 | }; |