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-rw-r--r--arch/powerpc/boot/Makefile57
-rw-r--r--arch/powerpc/boot/dts/bsc9131rdb.dts34
-rw-r--r--arch/powerpc/boot/dts/bsc9131rdb.dtsi142
-rw-r--r--arch/powerpc/boot/dts/fsl/bsc9131si-post.dtsi193
-rw-r--r--arch/powerpc/boot/dts/fsl/bsc9131si-pre.dtsi (renamed from arch/powerpc/boot/dts/fsl/p3060si-pre.dtsi)84
-rw-r--r--arch/powerpc/boot/dts/fsl/p1021si-post.dtsi16
-rw-r--r--arch/powerpc/boot/dts/fsl/p3060si-post.dtsi302
-rw-r--r--arch/powerpc/boot/dts/mgcoge.dts23
-rw-r--r--arch/powerpc/boot/dts/mpc8536ds.dtsi8
-rw-r--r--arch/powerpc/boot/dts/mpc8544ds.dtsi9
-rw-r--r--arch/powerpc/boot/dts/mpc8572ds.dtsi17
-rw-r--r--arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts8
-rw-r--r--arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts11
-rw-r--r--arch/powerpc/boot/dts/p1010rdb.dtsi12
-rw-r--r--arch/powerpc/boot/dts/p1021rdb-pc.dtsi (renamed from arch/powerpc/boot/dts/p1021rdb.dtsi)2
-rw-r--r--arch/powerpc/boot/dts/p1021rdb-pc_32b.dts (renamed from arch/powerpc/boot/dts/p1021rdb.dts)4
-rw-r--r--arch/powerpc/boot/dts/p1021rdb-pc_36b.dts (renamed from arch/powerpc/boot/dts/p1021rdb_36b.dts)4
-rw-r--r--arch/powerpc/boot/dts/p1022ds.dtsi20
-rw-r--r--arch/powerpc/boot/dts/p1024rdb.dtsi228
-rw-r--r--arch/powerpc/boot/dts/p1024rdb_32b.dts87
-rw-r--r--arch/powerpc/boot/dts/p1024rdb_36b.dts87
-rw-r--r--arch/powerpc/boot/dts/p1025rdb.dtsi40
-rw-r--r--arch/powerpc/boot/dts/p2020ds.dtsi10
-rw-r--r--arch/powerpc/boot/dts/p2020rdb.dts2
-rw-r--r--arch/powerpc/boot/dts/p2041rdb.dts41
-rw-r--r--arch/powerpc/boot/dts/p3060qds.dts242
-rw-r--r--arch/powerpc/boot/dts/sbc8560.dts406
-rw-r--r--arch/powerpc/boot/flatdevtree_env.h27
28 files changed, 1009 insertions, 1107 deletions
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index e8461cb18d04..b7d833382be4 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -62,26 +62,45 @@ libfdtheader := fdt.h libfdt.h libfdt_internal.h
62$(addprefix $(obj)/,$(libfdt) libfdt-wrapper.o simpleboot.o epapr.o): \ 62$(addprefix $(obj)/,$(libfdt) libfdt-wrapper.o simpleboot.o epapr.o): \
63 $(addprefix $(obj)/,$(libfdtheader)) 63 $(addprefix $(obj)/,$(libfdtheader))
64 64
65src-wlib := string.S crt0.S crtsavres.S stdio.c main.c \ 65src-wlib-y := string.S crt0.S crtsavres.S stdio.c main.c \
66 $(libfdt) libfdt-wrapper.c \ 66 $(libfdt) libfdt-wrapper.c \
67 ns16550.c serial.c simple_alloc.c div64.S util.S \ 67 ns16550.c serial.c simple_alloc.c div64.S util.S \
68 gunzip_util.c elf_util.c $(zlib) devtree.c oflib.c ofconsole.c \ 68 gunzip_util.c elf_util.c $(zlib) devtree.c stdlib.c \
69 4xx.c ebony.c mv64x60.c mpsc.c mv64x60_i2c.c cuboot.c bamboo.c \ 69 oflib.c ofconsole.c cuboot.c mpsc.c cpm-serial.c \
70 cpm-serial.c stdlib.c mpc52xx-psc.c planetcore.c uartlite.c \ 70 uartlite.c mpc52xx-psc.c
71 fsl-soc.c mpc8xx.c pq2.c ugecon.c 71src-wlib-$(CONFIG_40x) += 4xx.c planetcore.c
72src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c \ 72src-wlib-$(CONFIG_44x) += 4xx.c ebony.c bamboo.c
73 cuboot-ebony.c cuboot-hotfoot.c epapr.c treeboot-ebony.c \ 73src-wlib-$(CONFIG_8xx) += mpc8xx.c planetcore.c
74 prpmc2800.c \ 74src-wlib-$(CONFIG_PPC_82xx) += pq2.c fsl-soc.c planetcore.c
75 ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \ 75src-wlib-$(CONFIG_EMBEDDED6xx) += mv64x60.c mv64x60_i2c.c ugecon.c
76 cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c \ 76
77 cuboot-bamboo.c cuboot-mpc7448hpc2.c cuboot-taishan.c \ 77src-plat-y := of.c
78 fixed-head.S ep88xc.c ep405.c cuboot-c2k.c \ 78src-plat-$(CONFIG_40x) += fixed-head.S ep405.c cuboot-hotfoot.c \
79 cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \ 79 treeboot-walnut.c cuboot-acadia.c \
80 cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \ 80 cuboot-kilauea.c simpleboot.c \
81 virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \ 81 virtex405-head.S virtex.c
82 cuboot-acadia.c cuboot-amigaone.c cuboot-kilauea.c \ 82src-plat-$(CONFIG_44x) += treeboot-ebony.c cuboot-ebony.c treeboot-bamboo.c \
83 gamecube-head.S gamecube.c wii-head.S wii.c treeboot-iss4xx.c \ 83 cuboot-bamboo.c cuboot-sam440ep.c \
84 treeboot-currituck.c 84 cuboot-sequoia.c cuboot-rainier.c \
85 cuboot-taishan.c cuboot-katmai.c \
86 cuboot-warp.c cuboot-yosemite.c \
87 treeboot-iss4xx.c treeboot-currituck.c \
88 simpleboot.c fixed-head.S virtex.c
89src-plat-$(CONFIG_8xx) += cuboot-8xx.c fixed-head.S ep88xc.c redboot-8xx.c
90src-plat-$(CONFIG_PPC_MPC52xx) += cuboot-52xx.c
91src-plat-$(CONFIG_PPC_82xx) += cuboot-pq2.c fixed-head.S ep8248e.c cuboot-824x.c
92src-plat-$(CONFIG_PPC_83xx) += cuboot-83xx.c fixed-head.S redboot-83xx.c
93src-plat-$(CONFIG_FSL_SOC_BOOKE) += cuboot-85xx.c cuboot-85xx-cpm2.c
94src-plat-$(CONFIG_EMBEDDED6xx) += cuboot-pq2.c cuboot-mpc7448hpc2.c \
95 cuboot-c2k.c gamecube-head.S \
96 gamecube.c wii-head.S wii.c holly.c \
97 prpmc2800.c
98src-plat-$(CONFIG_AMIGAONE) += cuboot-amigaone.c
99src-plat-$(CONFIG_PPC_PS3) += ps3-head.S ps3-hvcall.S ps3.c
100src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c
101
102src-wlib := $(sort $(src-wlib-y))
103src-plat := $(sort $(src-plat-y))
85src-boot := $(src-wlib) $(src-plat) empty.c 104src-boot := $(src-wlib) $(src-plat) empty.c
86 105
87src-boot := $(addprefix $(obj)/, $(src-boot)) 106src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -257,7 +276,6 @@ image-$(CONFIG_TQM8548) += cuImage.tqm8548
257image-$(CONFIG_TQM8555) += cuImage.tqm8555 276image-$(CONFIG_TQM8555) += cuImage.tqm8555
258image-$(CONFIG_TQM8560) += cuImage.tqm8560 277image-$(CONFIG_TQM8560) += cuImage.tqm8560
259image-$(CONFIG_SBC8548) += cuImage.sbc8548 278image-$(CONFIG_SBC8548) += cuImage.sbc8548
260image-$(CONFIG_SBC8560) += cuImage.sbc8560
261image-$(CONFIG_KSI8560) += cuImage.ksi8560 279image-$(CONFIG_KSI8560) += cuImage.ksi8560
262 280
263# Board ports in arch/powerpc/platform/embedded6xx/Kconfig 281# Board ports in arch/powerpc/platform/embedded6xx/Kconfig
@@ -412,4 +430,3 @@ $(wrapper-installed): $(DESTDIR)$(WRAPPER_BINDIR) $(srctree)/$(obj)/wrapper | $(
412 $(call cmd,install_wrapper) 430 $(call cmd,install_wrapper)
413 431
414$(obj)/bootwrapper_install: $(all-installed) 432$(obj)/bootwrapper_install: $(all-installed)
415
diff --git a/arch/powerpc/boot/dts/bsc9131rdb.dts b/arch/powerpc/boot/dts/bsc9131rdb.dts
new file mode 100644
index 000000000000..e13d2d4877b0
--- /dev/null
+++ b/arch/powerpc/boot/dts/bsc9131rdb.dts
@@ -0,0 +1,34 @@
1/*
2 * BSC9131 RDB Device Tree Source
3 *
4 * Copyright 2011-2012 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/include/ "fsl/bsc9131si-pre.dtsi"
13
14/ {
15 model = "fsl,bsc9131rdb";
16 compatible = "fsl,bsc9131rdb";
17
18 memory {
19 device_type = "memory";
20 };
21
22 board_ifc: ifc: ifc@ff71e000 {
23 /* NAND Flash on board */
24 ranges = <0x0 0x0 0x0 0xff800000 0x00004000>;
25 reg = <0x0 0xff71e000 0x0 0x2000>;
26 };
27
28 board_soc: soc: soc@ff700000 {
29 ranges = <0x0 0x0 0xff700000 0x100000>;
30 };
31};
32
33/include/ "bsc9131rdb.dtsi"
34/include/ "fsl/bsc9131si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/bsc9131rdb.dtsi b/arch/powerpc/boot/dts/bsc9131rdb.dtsi
new file mode 100644
index 000000000000..638adda2c218
--- /dev/null
+++ b/arch/powerpc/boot/dts/bsc9131rdb.dtsi
@@ -0,0 +1,142 @@
1/*
2 * BSC9131 RDB Device Tree Source stub (no addresses or top-level ranges)
3 *
4 * Copyright 2011-2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&board_ifc {
36
37 nand@0,0 {
38 #address-cells = <1>;
39 #size-cells = <1>;
40 compatible = "fsl,ifc-nand";
41 reg = <0x0 0x0 0x4000>;
42
43 partition@0 {
44 /* This location must not be altered */
45 /* 3MB for u-boot Bootloader Image */
46 reg = <0x0 0x00300000>;
47 label = "NAND U-Boot Image";
48 read-only;
49 };
50
51 partition@300000 {
52 /* 1MB for DTB Image */
53 reg = <0x00300000 0x00100000>;
54 label = "NAND DTB Image";
55 };
56
57 partition@400000 {
58 /* 8MB for Linux Kernel Image */
59 reg = <0x00400000 0x00800000>;
60 label = "NAND Linux Kernel Image";
61 };
62
63 partition@c00000 {
64 /* Rest space for Root file System Image */
65 reg = <0x00c00000 0x07400000>;
66 label = "NAND RFS Image";
67 };
68 };
69};
70
71&board_soc {
72 /* BSC9131RDB does not have any device on i2c@3100 */
73 i2c@3100 {
74 status = "disabled";
75 };
76
77 spi@7000 {
78 flash@0 {
79 #address-cells = <1>;
80 #size-cells = <1>;
81 compatible = "spansion,s25sl12801";
82 reg = <0>;
83 spi-max-frequency = <50000000>;
84
85 /* 512KB for u-boot Bootloader Image */
86 partition@0 {
87 reg = <0x0 0x00080000>;
88 label = "SPI Flash U-Boot Image";
89 read-only;
90 };
91
92 /* 512KB for DTB Image */
93 partition@80000 {
94 reg = <0x00080000 0x00080000>;
95 label = "SPI Flash DTB Image";
96 };
97
98 /* 4MB for Linux Kernel Image */
99 partition@100000 {
100 reg = <0x00100000 0x00400000>;
101 label = "SPI Flash Kernel Image";
102 };
103
104 /*11MB for RFS Image */
105 partition@500000 {
106 reg = <0x00500000 0x00B00000>;
107 label = "SPI Flash RFS Image";
108 };
109
110 };
111 };
112
113 usb@22000 {
114 phy_type = "ulpi";
115 };
116
117 mdio@24000 {
118 phy0: ethernet-phy@0 {
119 interrupts = <3 1 0 0>;
120 reg = <0x0>;
121 };
122
123 phy1: ethernet-phy@1 {
124 interrupts = <2 1 0 0>;
125 reg = <0x3>;
126 };
127 };
128
129 sdhci@2e000 {
130 status = "disabled";
131 };
132
133 enet0: ethernet@b0000 {
134 phy-handle = <&phy0>;
135 phy-connection-type = "rgmii-id";
136 };
137
138 enet1: ethernet@b1000 {
139 phy-handle = <&phy1>;
140 phy-connection-type = "rgmii-id";
141 };
142};
diff --git a/arch/powerpc/boot/dts/fsl/bsc9131si-post.dtsi b/arch/powerpc/boot/dts/fsl/bsc9131si-post.dtsi
new file mode 100644
index 000000000000..5180d9d37989
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/bsc9131si-post.dtsi
@@ -0,0 +1,193 @@
1/*
2 * BSC9131 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011-2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&ifc {
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,ifc", "simple-bus";
39 interrupts = <16 2 0 0 20 2 0 0>;
40};
41
42&soc {
43 #address-cells = <1>;
44 #size-cells = <1>;
45 device_type = "soc";
46 compatible = "fsl,bsc9131-immr", "simple-bus";
47 bus-frequency = <0>; // Filled out by uboot.
48
49 ecm-law@0 {
50 compatible = "fsl,ecm-law";
51 reg = <0x0 0x1000>;
52 fsl,num-laws = <12>;
53 };
54
55 ecm@1000 {
56 compatible = "fsl,bsc9131-ecm", "fsl,ecm";
57 reg = <0x1000 0x1000>;
58 interrupts = <16 2 0 0>;
59 };
60
61 memory-controller@2000 {
62 compatible = "fsl,bsc9131-memory-controller";
63 reg = <0x2000 0x1000>;
64 interrupts = <16 2 0 0>;
65 };
66
67/include/ "pq3-i2c-0.dtsi"
68 i2c@3000 {
69 interrupts = <17 2 0 0>;
70 };
71
72/include/ "pq3-i2c-1.dtsi"
73 i2c@3100 {
74 interrupts = <17 2 0 0>;
75 };
76
77/include/ "pq3-duart-0.dtsi"
78 serial0: serial@4500 {
79 interrupts = <18 2 0 0>;
80 };
81
82 serial1: serial@4600 {
83 interrupts = <18 2 0 0 >;
84 };
85/include/ "pq3-espi-0.dtsi"
86 spi0: spi@7000 {
87 fsl,espi-num-chipselects = <1>;
88 interrupts = <22 0x2 0 0>;
89 };
90
91/include/ "pq3-gpio-0.dtsi"
92 gpio-controller@f000 {
93 interrupts = <19 0x2 0 0>;
94 };
95
96 L2: l2-cache-controller@20000 {
97 compatible = "fsl,bsc9131-l2-cache-controller";
98 reg = <0x20000 0x1000>;
99 cache-line-size = <32>; // 32 bytes
100 cache-size = <0x40000>; // L2,256K
101 interrupts = <16 2 0 0>;
102 };
103
104/include/ "pq3-dma-0.dtsi"
105
106dma@21300 {
107
108 dma-channel@0 {
109 interrupts = <62 2 0 0>;
110 };
111
112 dma-channel@80 {
113 interrupts = <63 2 0 0>;
114 };
115
116 dma-channel@100 {
117 interrupts = <64 2 0 0>;
118 };
119
120 dma-channel@180 {
121 interrupts = <65 2 0 0>;
122 };
123};
124
125/include/ "pq3-usb2-dr-0.dtsi"
126usb@22000 {
127 compatible = "fsl-usb2-dr","fsl-usb2-dr-v2.2";
128 interrupts = <40 0x2 0 0>;
129};
130
131/include/ "pq3-esdhc-0.dtsi"
132 sdhc@2e000 {
133 fsl,sdhci-auto-cmd12;
134 interrupts = <41 0x2 0 0>;
135 };
136
137/include/ "pq3-sec4.4-0.dtsi"
138crypto@30000 {
139 interrupts = <57 2 0 0>;
140
141 sec_jr0: jr@1000 {
142 interrupts = <58 2 0 0>;
143 };
144
145 sec_jr1: jr@2000 {
146 interrupts = <59 2 0 0>;
147 };
148
149 sec_jr2: jr@3000 {
150 interrupts = <60 2 0 0>;
151 };
152
153 sec_jr3: jr@4000 {
154 interrupts = <61 2 0 0>;
155 };
156};
157
158/include/ "pq3-mpic.dtsi"
159
160timer@41100 {
161 compatible = "fsl,mpic-v1.2-msgr", "fsl,mpic-msg";
162 reg = <0x41400 0x200>;
163 interrupts = <
164 0xb0 2
165 0xb1 2
166 0xb2 2
167 0xb3 2>;
168};
169
170/include/ "pq3-etsec2-0.dtsi"
171enet0: ethernet@b0000 {
172 queue-group@b0000 {
173 fsl,rx-bit-map = <0xff>;
174 fsl,tx-bit-map = <0xff>;
175 interrupts = <26 2 0 0 27 2 0 0 28 2 0 0>;
176 };
177};
178
179/include/ "pq3-etsec2-1.dtsi"
180enet1: ethernet@b1000 {
181 queue-group@b1000 {
182 fsl,rx-bit-map = <0xff>;
183 fsl,tx-bit-map = <0xff>;
184 interrupts = <33 2 0 0 34 2 0 0 35 2 0 0>;
185 };
186};
187
188global-utilities@e0000 {
189 compatible = "fsl,bsc9131-guts";
190 reg = <0xe0000 0x1000>;
191 fsl,has-rstcr;
192 };
193};
diff --git a/arch/powerpc/boot/dts/fsl/p3060si-pre.dtsi b/arch/powerpc/boot/dts/fsl/bsc9131si-pre.dtsi
index 00c8e70e7b90..743e4aeda349 100644
--- a/arch/powerpc/boot/dts/fsl/p3060si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/bsc9131si-pre.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * P3060 Silicon/SoC Device Tree Source (pre include) 2 * BSC9131 Silicon/SoC Device Tree Source (pre include)
3 * 3 *
4 * Copyright 2011 Freescale Semiconductor Inc. 4 * Copyright 2011-2012 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -34,92 +34,26 @@
34 34
35/dts-v1/; 35/dts-v1/;
36/ { 36/ {
37 compatible = "fsl,P3060"; 37 compatible = "fsl,BSC9131";
38 #address-cells = <2>; 38 #address-cells = <2>;
39 #size-cells = <2>; 39 #size-cells = <2>;
40 interrupt-parent = <&mpic>; 40 interrupt-parent = <&mpic>;
41 41
42 aliases { 42 aliases {
43 ccsr = &soc;
44 dcsr = &dcsr;
45
46 serial0 = &serial0; 43 serial0 = &serial0;
47 serial1 = &serial1; 44 ethernet0 = &enet0;
48 serial2 = &serial2; 45 ethernet1 = &enet1;
49 serial3 = &serial3;
50 pci0 = &pci0;
51 pci1 = &pci1;
52 usb0 = &usb0;
53 usb1 = &usb1;
54 dma0 = &dma0;
55 dma1 = &dma1;
56 msi0 = &msi0;
57 msi1 = &msi1;
58 msi2 = &msi2;
59
60 crypto = &crypto;
61 sec_jr0 = &sec_jr0;
62 sec_jr1 = &sec_jr1;
63 sec_jr2 = &sec_jr2;
64 sec_jr3 = &sec_jr3;
65 rtic_a = &rtic_a;
66 rtic_b = &rtic_b;
67 rtic_c = &rtic_c;
68 rtic_d = &rtic_d;
69 sec_mon = &sec_mon;
70 }; 46 };
71 47
72 cpus { 48 cpus {
73 #address-cells = <1>; 49 #address-cells = <1>;
74 #size-cells = <0>; 50 #size-cells = <0>;
75 51
76 cpu0: PowerPC,e500mc@0 { 52 PowerPC,BSC9131@0 {
77 device_type = "cpu";
78 reg = <0>;
79 next-level-cache = <&L2_0>;
80 L2_0: l2-cache {
81 next-level-cache = <&cpc>;
82 };
83 };
84 cpu1: PowerPC,e500mc@1 {
85 device_type = "cpu";
86 reg = <1>;
87 next-level-cache = <&L2_1>;
88 L2_1: l2-cache {
89 next-level-cache = <&cpc>;
90 };
91 };
92 cpu4: PowerPC,e500mc@4 {
93 device_type = "cpu";
94 reg = <4>;
95 next-level-cache = <&L2_4>;
96 L2_4: l2-cache {
97 next-level-cache = <&cpc>;
98 };
99 };
100 cpu5: PowerPC,e500mc@5 {
101 device_type = "cpu";
102 reg = <5>;
103 next-level-cache = <&L2_5>;
104 L2_5: l2-cache {
105 next-level-cache = <&cpc>;
106 };
107 };
108 cpu6: PowerPC,e500mc@6 {
109 device_type = "cpu";
110 reg = <6>;
111 next-level-cache = <&L2_6>;
112 L2_6: l2-cache {
113 next-level-cache = <&cpc>;
114 };
115 };
116 cpu7: PowerPC,e500mc@7 {
117 device_type = "cpu"; 53 device_type = "cpu";
118 reg = <7>; 54 compatible = "fsl,e500v2";
119 next-level-cache = <&L2_7>; 55 reg = <0x0>;
120 L2_7: l2-cache { 56 next-level-cache = <&L2>;
121 next-level-cache = <&cpc>;
122 };
123 }; 57 };
124 }; 58 };
125}; 59};
diff --git a/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
index 4252ef85fb7a..adb82fd9057f 100644
--- a/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * P1021/P1012 Silicon/SoC Device Tree Source (post include) 2 * P1021/P1012 Silicon/SoC Device Tree Source (post include)
3 * 3 *
4 * Copyright 2011 Freescale Semiconductor Inc. 4 * Copyright 2011-2012 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -213,6 +213,20 @@
213 interrupt-parent = <&qeic>; 213 interrupt-parent = <&qeic>;
214 }; 214 };
215 215
216 ucc@2600 {
217 cell-index = <7>;
218 reg = <0x2600 0x200>;
219 interrupts = <42>;
220 interrupt-parent = <&qeic>;
221 };
222
223 ucc@2200 {
224 cell-index = <3>;
225 reg = <0x2200 0x200>;
226 interrupts = <34>;
227 interrupt-parent = <&qeic>;
228 };
229
216 muram@10000 { 230 muram@10000 {
217 #address-cells = <1>; 231 #address-cells = <1>;
218 #size-cells = <1>; 232 #size-cells = <1>;
diff --git a/arch/powerpc/boot/dts/fsl/p3060si-post.dtsi b/arch/powerpc/boot/dts/fsl/p3060si-post.dtsi
deleted file mode 100644
index b3e56929eee2..000000000000
--- a/arch/powerpc/boot/dts/fsl/p3060si-post.dtsi
+++ /dev/null
@@ -1,302 +0,0 @@
1/*
2 * P3060 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 compatible = "fsl,p3060-elbc", "fsl,elbc", "simple-bus";
37 interrupts = <25 2 0 0>;
38 #address-cells = <2>;
39 #size-cells = <1>;
40};
41
42/* controller at 0x200000 */
43&pci0 {
44 compatible = "fsl,p3060-pcie", "fsl,qoriq-pcie-v2.2";
45 device_type = "pci";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0x0 0xff>;
49 clock-frequency = <33333333>;
50 interrupts = <16 2 1 15>;
51 pcie@0 {
52 reg = <0 0 0 0 0>;
53 #interrupt-cells = <1>;
54 #size-cells = <2>;
55 #address-cells = <3>;
56 device_type = "pci";
57 interrupts = <16 2 1 15>;
58 interrupt-map-mask = <0xf800 0 0 7>;
59 interrupt-map = <
60 /* IDSEL 0x0 */
61 0000 0 0 1 &mpic 40 1 0 0
62 0000 0 0 2 &mpic 1 1 0 0
63 0000 0 0 3 &mpic 2 1 0 0
64 0000 0 0 4 &mpic 3 1 0 0
65 >;
66 };
67};
68
69/* controller at 0x201000 */
70&pci1 {
71 compatible = "fsl,p3060-pcie", "fsl,qoriq-pcie-v2.2";
72 device_type = "pci";
73 #size-cells = <2>;
74 #address-cells = <3>;
75 bus-range = <0 0xff>;
76 clock-frequency = <33333333>;
77 interrupts = <16 2 1 14>;
78 pcie@0 {
79 reg = <0 0 0 0 0>;
80 #interrupt-cells = <1>;
81 #size-cells = <2>;
82 #address-cells = <3>;
83 device_type = "pci";
84 interrupts = <16 2 1 14>;
85 interrupt-map-mask = <0xf800 0 0 7>;
86 interrupt-map = <
87 /* IDSEL 0x0 */
88 0000 0 0 1 &mpic 41 1 0 0
89 0000 0 0 2 &mpic 5 1 0 0
90 0000 0 0 3 &mpic 6 1 0 0
91 0000 0 0 4 &mpic 7 1 0 0
92 >;
93 };
94};
95
96&rio {
97 compatible = "fsl,srio";
98 interrupts = <16 2 1 11>;
99 #address-cells = <2>;
100 #size-cells = <2>;
101 fsl,srio-rmu-handle = <&rmu>;
102 ranges;
103
104 port1 {
105 #address-cells = <2>;
106 #size-cells = <2>;
107 cell-index = <1>;
108 };
109
110 port2 {
111 #address-cells = <2>;
112 #size-cells = <2>;
113 cell-index = <2>;
114 };
115};
116
117&dcsr {
118 #address-cells = <1>;
119 #size-cells = <1>;
120 compatible = "fsl,dcsr", "simple-bus";
121
122 dcsr-epu@0 {
123 compatible = "fsl,dcsr-epu";
124 interrupts = <52 2 0 0
125 84 2 0 0
126 85 2 0 0>;
127 reg = <0x0 0x1000>;
128 };
129 dcsr-npc {
130 compatible = "fsl,dcsr-npc";
131 reg = <0x1000 0x1000 0x1000000 0x8000>;
132 };
133 dcsr-nxc@2000 {
134 compatible = "fsl,dcsr-nxc";
135 reg = <0x2000 0x1000>;
136 };
137 dcsr-corenet {
138 compatible = "fsl,dcsr-corenet";
139 reg = <0x8000 0x1000 0xB0000 0x1000>;
140 };
141 dcsr-dpaa@9000 {
142 compatible = "fsl,p3060-dcsr-dpaa", "fsl,dcsr-dpaa";
143 reg = <0x9000 0x1000>;
144 };
145 dcsr-ocn@11000 {
146 compatible = "fsl,p3060-dcsr-ocn", "fsl,dcsr-ocn";
147 reg = <0x11000 0x1000>;
148 };
149 dcsr-ddr@12000 {
150 compatible = "fsl,dcsr-ddr";
151 dev-handle = <&ddr1>;
152 reg = <0x12000 0x1000>;
153 };
154 dcsr-nal@18000 {
155 compatible = "fsl,p3060-dcsr-nal", "fsl,dcsr-nal";
156 reg = <0x18000 0x1000>;
157 };
158 dcsr-rcpm@22000 {
159 compatible = "fsl,p3060-dcsr-rcpm", "fsl,dcsr-rcpm";
160 reg = <0x22000 0x1000>;
161 };
162 dcsr-cpu-sb-proxy@40000 {
163 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
164 cpu-handle = <&cpu0>;
165 reg = <0x40000 0x1000>;
166 };
167 dcsr-cpu-sb-proxy@41000 {
168 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
169 cpu-handle = <&cpu1>;
170 reg = <0x41000 0x1000>;
171 };
172 dcsr-cpu-sb-proxy@44000 {
173 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
174 cpu-handle = <&cpu4>;
175 reg = <0x44000 0x1000>;
176 };
177 dcsr-cpu-sb-proxy@45000 {
178 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
179 cpu-handle = <&cpu5>;
180 reg = <0x45000 0x1000>;
181 };
182 dcsr-cpu-sb-proxy@46000 {
183 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
184 cpu-handle = <&cpu6>;
185 reg = <0x46000 0x1000>;
186 };
187 dcsr-cpu-sb-proxy@47000 {
188 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
189 cpu-handle = <&cpu7>;
190 reg = <0x47000 0x1000>;
191 };
192
193};
194
195&soc {
196 #address-cells = <1>;
197 #size-cells = <1>;
198 device_type = "soc";
199 compatible = "simple-bus";
200
201 soc-sram-error {
202 compatible = "fsl,soc-sram-error";
203 interrupts = <16 2 1 29>;
204 };
205
206 corenet-law@0 {
207 compatible = "fsl,corenet-law";
208 reg = <0x0 0x1000>;
209 fsl,num-laws = <32>;
210 };
211
212 ddr1: memory-controller@8000 {
213 compatible = "fsl,qoriq-memory-controller-v4.4", "fsl,qoriq-memory-controller";
214 reg = <0x8000 0x1000>;
215 interrupts = <16 2 1 23>;
216 };
217
218 cpc: l3-cache-controller@10000 {
219 compatible = "fsl,p3060-l3-cache-controller", "cache";
220 reg = <0x10000 0x1000
221 0x11000 0x1000>;
222 interrupts = <16 2 1 27
223 16 2 1 26>;
224 };
225
226 corenet-cf@18000 {
227 compatible = "fsl,corenet-cf";
228 reg = <0x18000 0x1000>;
229 interrupts = <16 2 1 31>;
230 fsl,ccf-num-csdids = <32>;
231 fsl,ccf-num-snoopids = <32>;
232 };
233
234 iommu@20000 {
235 compatible = "fsl,pamu-v1.0", "fsl,pamu";
236 reg = <0x20000 0x5000>;
237 interrupts = <
238 24 2 0 0
239 16 2 1 30>;
240 };
241
242/include/ "qoriq-rmu-0.dtsi"
243/include/ "qoriq-mpic.dtsi"
244
245 guts: global-utilities@e0000 {
246 compatible = "fsl,qoriq-device-config-1.0";
247 reg = <0xe0000 0xe00>;
248 fsl,has-rstcr;
249 #sleep-cells = <1>;
250 fsl,liodn-bits = <12>;
251 };
252
253 pins: global-utilities@e0e00 {
254 compatible = "fsl,qoriq-pin-control-1.0";
255 reg = <0xe0e00 0x200>;
256 #sleep-cells = <2>;
257 };
258
259 clockgen: global-utilities@e1000 {
260 compatible = "fsl,p3060-clockgen", "fsl,qoriq-clockgen-1.0";
261 reg = <0xe1000 0x1000>;
262 clock-frequency = <0>;
263 };
264
265 rcpm: global-utilities@e2000 {
266 compatible = "fsl,qoriq-rcpm-1.0";
267 reg = <0xe2000 0x1000>;
268 #sleep-cells = <1>;
269 };
270
271 sfp: sfp@e8000 {
272 compatible = "fsl,p3060-sfp", "fsl,qoriq-sfp-1.0";
273 reg = <0xe8000 0x1000>;
274 };
275
276 serdes: serdes@ea000 {
277 compatible = "fsl,p3060-serdes";
278 reg = <0xea000 0x1000>;
279 };
280
281/include/ "qoriq-dma-0.dtsi"
282/include/ "qoriq-dma-1.dtsi"
283/include/ "qoriq-espi-0.dtsi"
284 spi@110000 {
285 fsl,espi-num-chipselects = <4>;
286 };
287
288/include/ "qoriq-i2c-0.dtsi"
289/include/ "qoriq-i2c-1.dtsi"
290/include/ "qoriq-duart-0.dtsi"
291/include/ "qoriq-duart-1.dtsi"
292/include/ "qoriq-gpio-0.dtsi"
293/include/ "qoriq-usb2-mph-0.dtsi"
294 usb@210000 {
295 compatible = "fsl-usb2-mph-v2.2", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
296 };
297/include/ "qoriq-usb2-dr-0.dtsi"
298 usb@211000 {
299 compatible = "fsl-usb2-dr-v2.2", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
300 };
301/include/ "qoriq-sec4.1-0.dtsi"
302};
diff --git a/arch/powerpc/boot/dts/mgcoge.dts b/arch/powerpc/boot/dts/mgcoge.dts
index ededaf5ac015..d72fb5e219d0 100644
--- a/arch/powerpc/boot/dts/mgcoge.dts
+++ b/arch/powerpc/boot/dts/mgcoge.dts
@@ -222,6 +222,29 @@
222 interrupt-parent = <&PIC>; 222 interrupt-parent = <&PIC>;
223 usb-clock = <5>; 223 usb-clock = <5>;
224 }; 224 };
225 spi@11aa0 {
226 cell-index = <0>;
227 compatible = "fsl,spi", "fsl,cpm2-spi";
228 reg = <0x11a80 0x40 0x89fc 0x2>;
229 interrupts = <2 8>;
230 interrupt-parent = <&PIC>;
231 gpios = < &cpm2_pio_d 19 0>;
232 #address-cells = <1>;
233 #size-cells = <0>;
234 ds3106@1 {
235 compatible = "gen,spidev";
236 reg = <0>;
237 spi-max-frequency = <8000000>;
238 };
239 };
240
241 };
242
243 cpm2_pio_d: gpio-controller@10d60 {
244 #gpio-cells = <2>;
245 compatible = "fsl,cpm2-pario-bank";
246 reg = <0x10d60 0x14>;
247 gpio-controller;
225 }; 248 };
226 249
227 cpm2_pio_c: gpio-controller@10d40 { 250 cpm2_pio_c: gpio-controller@10d40 {
diff --git a/arch/powerpc/boot/dts/mpc8536ds.dtsi b/arch/powerpc/boot/dts/mpc8536ds.dtsi
index cc46dbd9746d..d304a2d68c62 100644
--- a/arch/powerpc/boot/dts/mpc8536ds.dtsi
+++ b/arch/powerpc/boot/dts/mpc8536ds.dtsi
@@ -203,6 +203,14 @@
203 reg = <1>; 203 reg = <1>;
204 device_type = "ethernet-phy"; 204 device_type = "ethernet-phy";
205 }; 205 };
206 sgmii_phy0: sgmii-phy@0 {
207 interrupts = <6 1 0 0>;
208 reg = <0x1d>;
209 };
210 sgmii_phy1: sgmii-phy@1 {
211 interrupts = <6 1 0 0>;
212 reg = <0x1c>;
213 };
206 tbi0: tbi-phy@11 { 214 tbi0: tbi-phy@11 {
207 reg = <0x11>; 215 reg = <0x11>;
208 device_type = "tbi-phy"; 216 device_type = "tbi-phy";
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dtsi b/arch/powerpc/boot/dts/mpc8544ds.dtsi
index 270f64b90f4e..77ebc9f1d37c 100644
--- a/arch/powerpc/boot/dts/mpc8544ds.dtsi
+++ b/arch/powerpc/boot/dts/mpc8544ds.dtsi
@@ -51,6 +51,15 @@
51 device_type = "ethernet-phy"; 51 device_type = "ethernet-phy";
52 }; 52 };
53 53
54 sgmii_phy0: sgmii-phy@0 {
55 interrupts = <6 1 0 0>;
56 reg = <0x1c>;
57 };
58 sgmii_phy1: sgmii-phy@1 {
59 interrupts = <6 1 0 0>;
60 reg = <0x1d>;
61 };
62
54 tbi0: tbi-phy@11 { 63 tbi0: tbi-phy@11 {
55 reg = <0x11>; 64 reg = <0x11>;
56 device_type = "tbi-phy"; 65 device_type = "tbi-phy";
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dtsi b/arch/powerpc/boot/dts/mpc8572ds.dtsi
index 14178944e220..357490bb84da 100644
--- a/arch/powerpc/boot/dts/mpc8572ds.dtsi
+++ b/arch/powerpc/boot/dts/mpc8572ds.dtsi
@@ -169,6 +169,23 @@
169 reg = <0x3>; 169 reg = <0x3>;
170 }; 170 };
171 171
172 sgmii_phy0: sgmii-phy@0 {
173 interrupts = <6 1 0 0>;
174 reg = <0x1c>;
175 };
176 sgmii_phy1: sgmii-phy@1 {
177 interrupts = <6 1 0 0>;
178 reg = <0x1d>;
179 };
180 sgmii_phy2: sgmii-phy@2 {
181 interrupts = <7 1 0 0>;
182 reg = <0x1e>;
183 };
184 sgmii_phy3: sgmii-phy@3 {
185 interrupts = <7 1 0 0>;
186 reg = <0x1f>;
187 };
188
172 tbi0: tbi-phy@11 { 189 tbi0: tbi-phy@11 {
173 reg = <0x11>; 190 reg = <0x11>;
174 device_type = "tbi-phy"; 191 device_type = "tbi-phy";
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
index d34d12712125..ef9ef56b3eeb 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
@@ -67,10 +67,10 @@
67 msi@41600 { 67 msi@41600 {
68 msi-available-ranges = <0 0x80>; 68 msi-available-ranges = <0 0x80>;
69 interrupts = < 69 interrupts = <
70 0xe0 0 70 0xe0 0 0 0
71 0xe1 0 71 0xe1 0 0 0
72 0xe2 0 72 0xe2 0 0 0
73 0xe3 0>; 73 0xe3 0 0 0>;
74 }; 74 };
75 timer@42100 { 75 timer@42100 {
76 status = "disabled"; 76 status = "disabled";
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
index d6a8fafc0d0d..24564ee108e5 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
@@ -67,9 +67,6 @@
67 ethernet@24000 { 67 ethernet@24000 {
68 status = "disabled"; 68 status = "disabled";
69 }; 69 };
70 mdio@24520 {
71 status = "disabled";
72 };
73 ptp_clock@24e00 { 70 ptp_clock@24e00 {
74 status = "disabled"; 71 status = "disabled";
75 }; 72 };
@@ -100,10 +97,10 @@
100 msi@41600 { 97 msi@41600 {
101 msi-available-ranges = <0x80 0x80>; 98 msi-available-ranges = <0x80 0x80>;
102 interrupts = < 99 interrupts = <
103 0xe4 0 100 0xe4 0 0 0
104 0xe5 0 101 0xe5 0 0 0
105 0xe6 0 102 0xe6 0 0 0
106 0xe7 0>; 103 0xe7 0 0 0>;
107 }; 104 };
108 global-utilities@e0000 { 105 global-utilities@e0000 {
109 status = "disabled"; 106 status = "disabled";
diff --git a/arch/powerpc/boot/dts/p1010rdb.dtsi b/arch/powerpc/boot/dts/p1010rdb.dtsi
index 49776143a1b8..ec7c27a64671 100644
--- a/arch/powerpc/boot/dts/p1010rdb.dtsi
+++ b/arch/powerpc/boot/dts/p1010rdb.dtsi
@@ -126,12 +126,24 @@
126 126
127&board_soc { 127&board_soc {
128 i2c@3000 { 128 i2c@3000 {
129 eeprom@50 {
130 compatible = "st,24c256";
131 reg = <0x50>;
132 };
133
129 rtc@68 { 134 rtc@68 {
130 compatible = "pericom,pt7c4338"; 135 compatible = "pericom,pt7c4338";
131 reg = <0x68>; 136 reg = <0x68>;
132 }; 137 };
133 }; 138 };
134 139
140 i2c@3100 {
141 eeprom@52 {
142 compatible = "atmel,24c01";
143 reg = <0x52>;
144 };
145 };
146
135 spi@7000 { 147 spi@7000 {
136 flash@0 { 148 flash@0 {
137 #address-cells = <1>; 149 #address-cells = <1>;
diff --git a/arch/powerpc/boot/dts/p1021rdb.dtsi b/arch/powerpc/boot/dts/p1021rdb-pc.dtsi
index b973461ab751..c13abfbbe2e2 100644
--- a/arch/powerpc/boot/dts/p1021rdb.dtsi
+++ b/arch/powerpc/boot/dts/p1021rdb-pc.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * P1021 RDB Device Tree Source stub (no addresses or top-level ranges) 2 * P1021 RDB Device Tree Source stub (no addresses or top-level ranges)
3 * 3 *
4 * Copyright 2011 Freescale Semiconductor Inc. 4 * Copyright 2012 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
diff --git a/arch/powerpc/boot/dts/p1021rdb.dts b/arch/powerpc/boot/dts/p1021rdb-pc_32b.dts
index 90b6b4caa273..7cefa12b629a 100644
--- a/arch/powerpc/boot/dts/p1021rdb.dts
+++ b/arch/powerpc/boot/dts/p1021rdb-pc_32b.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * P1021 RDB Device Tree Source 2 * P1021 RDB Device Tree Source
3 * 3 *
4 * Copyright 2011 Freescale Semiconductor Inc. 4 * Copyright 2012 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -92,5 +92,5 @@
92 }; 92 };
93}; 93};
94 94
95/include/ "p1021rdb.dtsi" 95/include/ "p1021rdb-pc.dtsi"
96/include/ "fsl/p1021si-post.dtsi" 96/include/ "fsl/p1021si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1021rdb_36b.dts b/arch/powerpc/boot/dts/p1021rdb-pc_36b.dts
index ea6d8b5fa10b..53d0c889039c 100644
--- a/arch/powerpc/boot/dts/p1021rdb_36b.dts
+++ b/arch/powerpc/boot/dts/p1021rdb-pc_36b.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * P1021 RDB Device Tree Source (36-bit address map) 2 * P1021 RDB Device Tree Source (36-bit address map)
3 * 3 *
4 * Copyright 2011 Freescale Semiconductor Inc. 4 * Copyright 2012 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -92,5 +92,5 @@
92 }; 92 };
93}; 93};
94 94
95/include/ "p1021rdb.dtsi" 95/include/ "p1021rdb-pc.dtsi"
96/include/ "fsl/p1021si-post.dtsi" 96/include/ "fsl/p1021si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1022ds.dtsi b/arch/powerpc/boot/dts/p1022ds.dtsi
index 7cdb505036bb..c3344b04d8ff 100644
--- a/arch/powerpc/boot/dts/p1022ds.dtsi
+++ b/arch/powerpc/boot/dts/p1022ds.dtsi
@@ -33,22 +33,6 @@
33 */ 33 */
34 34
35&board_lbc { 35&board_lbc {
36 /*
37 * This node is used to access the pixis via "indirect" mode,
38 * which is done by writing the pixis register index to chip
39 * select 0 and the value to/from chip select 1. Indirect
40 * mode is the only way to access the pixis when DIU video
41 * is enabled. Note that this assumes that the first column
42 * of the 'ranges' property above is the chip select number.
43 */
44 board-control@0,0 {
45 compatible = "fsl,p1022ds-indirect-pixis";
46 reg = <0x0 0x0 1 /* CS0 */
47 0x1 0x0 1>; /* CS1 */
48 interrupt-parent = <&mpic>;
49 interrupts = <8 0 0 0>;
50 };
51
52 nor@0,0 { 36 nor@0,0 {
53 #address-cells = <1>; 37 #address-cells = <1>;
54 #size-cells = <1>; 38 #size-cells = <1>;
@@ -161,6 +145,10 @@
161 * the clock is enabled. 145 * the clock is enabled.
162 */ 146 */
163 }; 147 };
148 rtc@68 {
149 compatible = "dallas,ds1339";
150 reg = <0x68>;
151 };
164 }; 152 };
165 153
166 spi@7000 { 154 spi@7000 {
diff --git a/arch/powerpc/boot/dts/p1024rdb.dtsi b/arch/powerpc/boot/dts/p1024rdb.dtsi
new file mode 100644
index 000000000000..b05dcb40f800
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1024rdb.dtsi
@@ -0,0 +1,228 @@
1/*
2 * P1024 RDB Device Tree Source stub (no addresses or top-level ranges)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 nor@0,0 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
40 reg = <0x0 0x0 0x1000000>;
41 bank-width = <2>;
42 device-width = <1>;
43
44 partition@0 {
45 /* This location must not be altered */
46 /* 256KB for Vitesse 7385 Switch firmware */
47 reg = <0x0 0x00040000>;
48 label = "NOR Vitesse-7385 Firmware";
49 read-only;
50 };
51
52 partition@40000 {
53 /* 256KB for DTB Image */
54 reg = <0x00040000 0x00040000>;
55 label = "NOR DTB Image";
56 };
57
58 partition@80000 {
59 /* 3.5 MB for Linux Kernel Image */
60 reg = <0x00080000 0x00380000>;
61 label = "NOR Linux Kernel Image";
62 };
63
64 partition@400000 {
65 /* 11MB for JFFS2 based Root file System */
66 reg = <0x00400000 0x00b00000>;
67 label = "NOR JFFS2 Root File System";
68 };
69
70 partition@f00000 {
71 /* This location must not be altered */
72 /* 512KB for u-boot Bootloader Image */
73 /* 512KB for u-boot Environment Variables */
74 reg = <0x00f00000 0x00100000>;
75 label = "NOR U-Boot Image";
76 read-only;
77 };
78 };
79
80 nand@1,0 {
81 #address-cells = <1>;
82 #size-cells = <1>;
83 compatible = "fsl,p1020-fcm-nand",
84 "fsl,elbc-fcm-nand";
85 reg = <0x1 0x0 0x40000>;
86
87 partition@0 {
88 /* This location must not be altered */
89 /* 1MB for u-boot Bootloader Image */
90 reg = <0x0 0x00100000>;
91 label = "NAND U-Boot Image";
92 read-only;
93 };
94
95 partition@100000 {
96 /* 1MB for DTB Image */
97 reg = <0x00100000 0x00100000>;
98 label = "NAND DTB Image";
99 };
100
101 partition@200000 {
102 /* 4MB for Linux Kernel Image */
103 reg = <0x00200000 0x00400000>;
104 label = "NAND Linux Kernel Image";
105 };
106
107 partition@600000 {
108 /* 4MB for Compressed Root file System Image */
109 reg = <0x00600000 0x00400000>;
110 label = "NAND Compressed RFS Image";
111 };
112
113 partition@a00000 {
114 /* 15MB for JFFS2 based Root file System */
115 reg = <0x00a00000 0x00f00000>;
116 label = "NAND JFFS2 Root File System";
117 };
118
119 partition@1900000 {
120 /* 7MB for User Writable Area */
121 reg = <0x01900000 0x00700000>;
122 label = "NAND Writable User area";
123 };
124 };
125};
126
127&soc {
128 spi@7000 {
129 flash@0 {
130 #address-cells = <1>;
131 #size-cells = <1>;
132 compatible = "spansion,m25p80";
133 reg = <0>;
134 spi-max-frequency = <40000000>;
135
136 partition@0 {
137 /* 512KB for u-boot Bootloader Image */
138 reg = <0x0 0x00080000>;
139 label = "SPI U-Boot Image";
140 read-only;
141 };
142
143 partition@80000 {
144 /* 512KB for DTB Image */
145 reg = <0x00080000 0x00080000>;
146 label = "SPI DTB Image";
147 };
148
149 partition@100000 {
150 /* 4MB for Linux Kernel Image */
151 reg = <0x00100000 0x00400000>;
152 label = "SPI Linux Kernel Image";
153 };
154
155 partition@500000 {
156 /* 4MB for Compressed RFS Image */
157 reg = <0x00500000 0x00400000>;
158 label = "SPI Compressed RFS Image";
159 };
160
161 partition@900000 {
162 /* 7MB for JFFS2 based RFS */
163 reg = <0x00900000 0x00700000>;
164 label = "SPI JFFS2 RFS";
165 };
166 };
167 };
168
169 i2c@3000 {
170 rtc@68 {
171 compatible = "dallas,ds1339";
172 reg = <0x68>;
173 };
174 };
175
176 usb@22000 {
177 phy_type = "ulpi";
178 };
179
180 usb@23000 {
181 status = "disabled";
182 };
183
184 mdio@24000 {
185 phy0: ethernet-phy@0 {
186 interrupts = <3 1 0 0>;
187 reg = <0x0>;
188 };
189 phy1: ethernet-phy@1 {
190 interrupts = <2 1 0 0>;
191 reg = <0x1>;
192 };
193 phy2: ethernet-phy@2 {
194 interrupts = <1 1 0 0>;
195 reg = <0x2>;
196 };
197 };
198
199 mdio@25000 {
200 tbi0: tbi-phy@11 {
201 reg = <0x11>;
202 device_type = "tbi-phy";
203 };
204 };
205
206 mdio@26000 {
207 tbi1: tbi-phy@11 {
208 reg = <0x11>;
209 device_type = "tbi-phy";
210 };
211 };
212
213 ethernet@b0000 {
214 phy-handle = <&phy2>;
215 phy-connection-type = "rgmii-id";
216 };
217
218 ethernet@b1000 {
219 phy-handle = <&phy0>;
220 tbi-handle = <&tbi0>;
221 phy-connection-type = "sgmii";
222 };
223
224 ethernet@b2000 {
225 phy-handle = <&phy1>;
226 phy-connection-type = "rgmii-id";
227 };
228};
diff --git a/arch/powerpc/boot/dts/p1024rdb_32b.dts b/arch/powerpc/boot/dts/p1024rdb_32b.dts
new file mode 100644
index 000000000000..90e803e9ba5f
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1024rdb_32b.dts
@@ -0,0 +1,87 @@
1/*
2 * P1024 RDB 32Bit Physical Address Map Device Tree Source
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p1020si-pre.dtsi"
36/ {
37 model = "fsl,P1024RDB";
38 compatible = "fsl,P1024RDB";
39
40 memory {
41 device_type = "memory";
42 };
43
44 lbc: localbus@ffe05000 {
45 reg = <0x0 0xffe05000 0 0x1000>;
46 ranges = <0x0 0x0 0x0 0xef000000 0x01000000
47 0x1 0x0 0x0 0xff800000 0x00040000>;
48 };
49
50 soc: soc@ffe00000 {
51 ranges = <0x0 0x0 0xffe00000 0x100000>;
52 };
53
54 pci0: pcie@ffe09000 {
55 reg = <0x0 0xffe09000 0 0x1000>;
56 ranges = <0x2000000 0x0 0xe0000000 0x0 0xa0000000 0x0 0x20000000
57 0x1000000 0x0 0x00000000 0x0 0xffc10000 0x0 0x10000>;
58 pcie@0 {
59 ranges = <0x2000000 0x0 0xe0000000
60 0x2000000 0x0 0xe0000000
61 0x0 0x20000000
62
63 0x1000000 0x0 0x0
64 0x1000000 0x0 0x0
65 0x0 0x100000>;
66 };
67 };
68
69 pci1: pcie@ffe0a000 {
70 reg = <0x0 0xffe0a000 0 0x1000>;
71 ranges = <0x2000000 0x0 0xe0000000 0x0 0x80000000 0x0 0x20000000
72 0x1000000 0x0 0x00000000 0x0 0xffc00000 0x0 0x10000>;
73 pcie@0 {
74 reg = <0x0 0x0 0x0 0x0 0x0>;
75 ranges = <0x2000000 0x0 0xe0000000
76 0x2000000 0x0 0xe0000000
77 0x0 0x20000000
78
79 0x1000000 0x0 0x0
80 0x1000000 0x0 0x0
81 0x0 0x100000>;
82 };
83 };
84};
85
86/include/ "p1024rdb.dtsi"
87/include/ "fsl/p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1024rdb_36b.dts b/arch/powerpc/boot/dts/p1024rdb_36b.dts
new file mode 100644
index 000000000000..3656825b65a1
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1024rdb_36b.dts
@@ -0,0 +1,87 @@
1/*
2 * P1024 RDB 36Bit Physical Address Map Device Tree Source
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p1020si-pre.dtsi"
36/ {
37 model = "fsl,P1024RDB";
38 compatible = "fsl,P1024RDB";
39
40 memory {
41 device_type = "memory";
42 };
43
44 lbc: localbus@fffe05000 {
45 reg = <0xf 0xffe05000 0 0x1000>;
46 ranges = <0x0 0x0 0xf 0xef000000 0x01000000
47 0x1 0x0 0xf 0xff800000 0x00040000>;
48 };
49
50 soc: soc@fffe00000 {
51 ranges = <0x0 0xf 0xffe00000 0x100000>;
52 };
53
54 pci0: pcie@fffe09000 {
55 reg = <0xf 0xffe09000 0 0x1000>;
56 ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
57 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
58 pcie@0 {
59 ranges = <0x2000000 0x0 0xe0000000
60 0x2000000 0x0 0xe0000000
61 0x0 0x20000000
62
63 0x1000000 0x0 0x0
64 0x1000000 0x0 0x0
65 0x0 0x100000>;
66 };
67 };
68
69 pci1: pcie@fffe0a000 {
70 reg = <0xf 0xffe0a000 0 0x1000>;
71 ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
72 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
73 pcie@0 {
74 reg = <0x0 0x0 0x0 0x0 0x0>;
75 ranges = <0x2000000 0x0 0xe0000000
76 0x2000000 0x0 0xe0000000
77 0x0 0x20000000
78
79 0x1000000 0x0 0x0
80 0x1000000 0x0 0x0
81 0x0 0x100000>;
82 };
83 };
84};
85
86/include/ "p1024rdb.dtsi"
87/include/ "fsl/p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1025rdb.dtsi b/arch/powerpc/boot/dts/p1025rdb.dtsi
index cf3676fc714b..f50256482297 100644
--- a/arch/powerpc/boot/dts/p1025rdb.dtsi
+++ b/arch/powerpc/boot/dts/p1025rdb.dtsi
@@ -282,5 +282,45 @@
282 0x1 0x4 0x2 0x0 0x2 0x0 /* ENET5_RX_DV_SER5_CTS_B */ 282 0x1 0x4 0x2 0x0 0x2 0x0 /* ENET5_RX_DV_SER5_CTS_B */
283 0x1 0x8 0x2 0x0 0x2 0x0>; /* ENET5_RX_ER_SER5_CD_B */ 283 0x1 0x8 0x2 0x0 0x2 0x0>; /* ENET5_RX_ER_SER5_CD_B */
284 }; 284 };
285
286 pio3: ucc_pin@03 {
287 pio-map = <
288 /* port pin dir open_drain assignment has_irq */
289 0x0 0x16 0x2 0x0 0x2 0x0 /* SER7_CD_B*/
290 0x0 0x12 0x2 0x0 0x2 0x0 /* SER7_CTS_B*/
291 0x0 0x13 0x1 0x0 0x2 0x0 /* SER7_RTS_B*/
292 0x0 0x14 0x2 0x0 0x2 0x0 /* SER7_RXD0*/
293 0x0 0x15 0x1 0x0 0x2 0x0>; /* SER7_TXD0*/
294 };
295
296 pio4: ucc_pin@04 {
297 pio-map = <
298 /* port pin dir open_drain assignment has_irq */
299 0x1 0x0 0x2 0x0 0x2 0x0 /* SER3_CD_B*/
300 0x0 0x1c 0x2 0x0 0x2 0x0 /* SER3_CTS_B*/
301 0x0 0x1d 0x1 0x0 0x2 0x0 /* SER3_RTS_B*/
302 0x0 0x1e 0x2 0x0 0x2 0x0 /* SER3_RXD0*/
303 0x0 0x1f 0x1 0x0 0x2 0x0>; /* SER3_TXD0*/
304 };
305 };
306};
307
308&qe {
309 serial2: ucc@2600 {
310 device_type = "serial";
311 compatible = "ucc_uart";
312 port-number = <0>;
313 rx-clock-name = "brg6";
314 tx-clock-name = "brg6";
315 pio-handle = <&pio3>;
316 };
317
318 serial3: ucc@2200 {
319 device_type = "serial";
320 compatible = "ucc_uart";
321 port-number = <1>;
322 rx-clock-name = "brg2";
323 tx-clock-name = "brg2";
324 pio-handle = <&pio4>;
285 }; 325 };
286}; 326};
diff --git a/arch/powerpc/boot/dts/p2020ds.dtsi b/arch/powerpc/boot/dts/p2020ds.dtsi
index d3b939c573b0..e699cf95b063 100644
--- a/arch/powerpc/boot/dts/p2020ds.dtsi
+++ b/arch/powerpc/boot/dts/p2020ds.dtsi
@@ -150,6 +150,16 @@
150 interrupts = <3 1 0 0>; 150 interrupts = <3 1 0 0>;
151 reg = <0x2>; 151 reg = <0x2>;
152 }; 152 };
153
154 sgmii_phy1: sgmii-phy@1 {
155 interrupts = <5 1 0 0>;
156 reg = <0x1c>;
157 };
158 sgmii_phy2: sgmii-phy@2 {
159 interrupts = <5 1 0 0>;
160 reg = <0x1d>;
161 };
162
153 tbi0: tbi-phy@11 { 163 tbi0: tbi-phy@11 {
154 reg = <0x11>; 164 reg = <0x11>;
155 device_type = "tbi-phy"; 165 device_type = "tbi-phy";
diff --git a/arch/powerpc/boot/dts/p2020rdb.dts b/arch/powerpc/boot/dts/p2020rdb.dts
index 153bc76bb48e..4d52bce1d5b0 100644
--- a/arch/powerpc/boot/dts/p2020rdb.dts
+++ b/arch/powerpc/boot/dts/p2020rdb.dts
@@ -34,7 +34,7 @@
34 34
35 /* NOR and NAND Flashes */ 35 /* NOR and NAND Flashes */
36 ranges = <0x0 0x0 0x0 0xef000000 0x01000000 36 ranges = <0x0 0x0 0x0 0xef000000 0x01000000
37 0x1 0x0 0x0 0xff800000 0x00040000 37 0x1 0x0 0x0 0xffa00000 0x00040000
38 0x2 0x0 0x0 0xffb00000 0x00020000>; 38 0x2 0x0 0x0 0xffb00000 0x00020000>;
39 39
40 nor@0,0 { 40 nor@0,0 {
diff --git a/arch/powerpc/boot/dts/p2041rdb.dts b/arch/powerpc/boot/dts/p2041rdb.dts
index 285213976a7f..baab0347dab0 100644
--- a/arch/powerpc/boot/dts/p2041rdb.dts
+++ b/arch/powerpc/boot/dts/p2041rdb.dts
@@ -121,7 +121,8 @@
121 121
122 lbc: localbus@ffe124000 { 122 lbc: localbus@ffe124000 {
123 reg = <0xf 0xfe124000 0 0x1000>; 123 reg = <0xf 0xfe124000 0 0x1000>;
124 ranges = <0 0 0xf 0xe8000000 0x08000000>; 124 ranges = <0 0 0xf 0xe8000000 0x08000000
125 1 0 0xf 0xffa00000 0x00040000>;
125 126
126 flash@0,0 { 127 flash@0,0 {
127 compatible = "cfi-flash"; 128 compatible = "cfi-flash";
@@ -129,6 +130,44 @@
129 bank-width = <2>; 130 bank-width = <2>;
130 device-width = <2>; 131 device-width = <2>;
131 }; 132 };
133
134 nand@1,0 {
135 #address-cells = <1>;
136 #size-cells = <1>;
137 compatible = "fsl,elbc-fcm-nand";
138 reg = <0x1 0x0 0x40000>;
139
140 partition@0 {
141 label = "NAND U-Boot Image";
142 reg = <0x0 0x02000000>;
143 read-only;
144 };
145
146 partition@2000000 {
147 label = "NAND Root File System";
148 reg = <0x02000000 0x10000000>;
149 };
150
151 partition@12000000 {
152 label = "NAND Compressed RFS Image";
153 reg = <0x12000000 0x08000000>;
154 };
155
156 partition@1a000000 {
157 label = "NAND Linux Kernel Image";
158 reg = <0x1a000000 0x04000000>;
159 };
160
161 partition@1e000000 {
162 label = "NAND DTB Image";
163 reg = <0x1e000000 0x01000000>;
164 };
165
166 partition@1f000000 {
167 label = "NAND Writable User area";
168 reg = <0x1f000000 0x01000000>;
169 };
170 };
132 }; 171 };
133 172
134 pci0: pcie@ffe200000 { 173 pci0: pcie@ffe200000 {
diff --git a/arch/powerpc/boot/dts/p3060qds.dts b/arch/powerpc/boot/dts/p3060qds.dts
deleted file mode 100644
index 9ae875c8a211..000000000000
--- a/arch/powerpc/boot/dts/p3060qds.dts
+++ /dev/null
@@ -1,242 +0,0 @@
1/*
2 * P3060QDS Device Tree Source
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p3060si-pre.dtsi"
36
37/ {
38 model = "fsl,P3060QDS";
39 compatible = "fsl,P3060QDS";
40 #address-cells = <2>;
41 #size-cells = <2>;
42 interrupt-parent = <&mpic>;
43
44 memory {
45 device_type = "memory";
46 };
47
48 dcsr: dcsr@f00000000 {
49 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
50 };
51
52 soc: soc@ffe000000 {
53 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
54 reg = <0xf 0xfe000000 0 0x00001000>;
55 spi@110000 {
56 flash@0 {
57 #address-cells = <1>;
58 #size-cells = <1>;
59 compatible = "spansion,s25sl12801";
60 reg = <0>;
61 spi-max-frequency = <40000000>; /* input clock */
62 partition@u-boot {
63 label = "u-boot";
64 reg = <0x00000000 0x00100000>;
65 read-only;
66 };
67 partition@kernel {
68 label = "kernel";
69 reg = <0x00100000 0x00500000>;
70 read-only;
71 };
72 partition@dtb {
73 label = "dtb";
74 reg = <0x00600000 0x00100000>;
75 read-only;
76 };
77 partition@fs {
78 label = "file system";
79 reg = <0x00700000 0x00900000>;
80 };
81 };
82 flash@1 {
83 #address-cells = <1>;
84 #size-cells = <1>;
85 compatible = "spansion,en25q32b";
86 reg = <1>;
87 spi-max-frequency = <40000000>; /* input clock */
88 partition@spi1 {
89 label = "spi1";
90 reg = <0x00000000 0x00400000>;
91 };
92 };
93 flash@2 {
94 #address-cells = <1>;
95 #size-cells = <1>;
96 compatible = "atmel,at45db081d";
97 reg = <2>;
98 spi-max-frequency = <40000000>; /* input clock */
99 partition@spi1 {
100 label = "spi2";
101 reg = <0x00000000 0x00100000>;
102 };
103 };
104 flash@3 {
105 #address-cells = <1>;
106 #size-cells = <1>;
107 compatible = "spansion,sst25wf040";
108 reg = <3>;
109 spi-max-frequency = <40000000>; /* input clock */
110 partition@spi3 {
111 label = "spi3";
112 reg = <0x00000000 0x00080000>;
113 };
114 };
115 };
116
117 i2c@118000 {
118 eeprom@51 {
119 compatible = "at24,24c256";
120 reg = <0x51>;
121 };
122 eeprom@53 {
123 compatible = "at24,24c256";
124 reg = <0x53>;
125 };
126 rtc@68 {
127 compatible = "dallas,ds3232";
128 reg = <0x68>;
129 interrupts = <0x1 0x1 0 0>;
130 };
131 };
132
133 usb0: usb@210000 {
134 phy_type = "ulpi";
135 };
136
137 usb1: usb@211000 {
138 dr_mode = "host";
139 phy_type = "ulpi";
140 };
141 };
142
143 rio: rapidio@ffe0c0000 {
144 reg = <0xf 0xfe0c0000 0 0x11000>;
145
146 port1 {
147 ranges = <0 0 0xc 0x20000000 0 0x10000000>;
148 };
149 port2 {
150 ranges = <0 0 0xc 0x30000000 0 0x10000000>;
151 };
152 };
153
154 lbc: localbus@ffe124000 {
155 reg = <0xf 0xfe124000 0 0x1000>;
156 ranges = <0 0 0xf 0xe8000000 0x08000000
157 2 0 0xf 0xffa00000 0x00040000
158 3 0 0xf 0xffdf0000 0x00008000>;
159
160 flash@0,0 {
161 compatible = "cfi-flash";
162 reg = <0 0 0x08000000>;
163 bank-width = <2>;
164 device-width = <2>;
165 };
166
167 nand@2,0 {
168 #address-cells = <1>;
169 #size-cells = <1>;
170 compatible = "fsl,elbc-fcm-nand";
171 reg = <0x2 0x0 0x40000>;
172
173 partition@0 {
174 label = "NAND U-Boot Image";
175 reg = <0x0 0x02000000>;
176 read-only;
177 };
178
179 partition@2000000 {
180 label = "NAND Root File System";
181 reg = <0x02000000 0x10000000>;
182 };
183
184 partition@12000000 {
185 label = "NAND Compressed RFS Image";
186 reg = <0x12000000 0x08000000>;
187 };
188
189 partition@1a000000 {
190 label = "NAND Linux Kernel Image";
191 reg = <0x1a000000 0x04000000>;
192 };
193
194 partition@1e000000 {
195 label = "NAND DTB Image";
196 reg = <0x1e000000 0x01000000>;
197 };
198
199 partition@1f000000 {
200 label = "NAND Writable User area";
201 reg = <0x1f000000 0x21000000>;
202 };
203 };
204
205 board-control@3,0 {
206 compatible = "fsl,p3060qds-fpga", "fsl,fpga-qixis";
207 reg = <3 0 0x100>;
208 };
209 };
210
211 pci0: pcie@ffe200000 {
212 reg = <0xf 0xfe200000 0 0x1000>;
213 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
214 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
215 pcie@0 {
216 ranges = <0x02000000 0 0xe0000000
217 0x02000000 0 0xe0000000
218 0 0x20000000
219
220 0x01000000 0 0x00000000
221 0x01000000 0 0x00000000
222 0 0x00010000>;
223 };
224 };
225
226 pci1: pcie@ffe201000 {
227 reg = <0xf 0xfe201000 0 0x1000>;
228 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
229 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
230 pcie@0 {
231 ranges = <0x02000000 0 0xe0000000
232 0x02000000 0 0xe0000000
233 0 0x20000000
234
235 0x01000000 0 0x00000000
236 0x01000000 0 0x00000000
237 0 0x00010000>;
238 };
239 };
240};
241
242/include/ "fsl/p3060si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/sbc8560.dts b/arch/powerpc/boot/dts/sbc8560.dts
deleted file mode 100644
index 72078eb15616..000000000000
--- a/arch/powerpc/boot/dts/sbc8560.dts
+++ /dev/null
@@ -1,406 +0,0 @@
1/*
2 * SBC8560 Device Tree Source
3 *
4 * Copyright 2007 Wind River Systems Inc.
5 *
6 * Paul Gortmaker (see MAINTAINERS for contact information)
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14/dts-v1/;
15
16/ {
17 model = "SBC8560";
18 compatible = "SBC8560";
19 #address-cells = <1>;
20 #size-cells = <1>;
21
22 aliases {
23 ethernet0 = &enet0;
24 ethernet1 = &enet1;
25 ethernet2 = &enet2;
26 ethernet3 = &enet3;
27 serial0 = &serial0;
28 serial1 = &serial1;
29 pci0 = &pci0;
30 };
31
32 cpus {
33 #address-cells = <1>;
34 #size-cells = <0>;
35
36 PowerPC,8560@0 {
37 device_type = "cpu";
38 reg = <0>;
39 d-cache-line-size = <0x20>; // 32 bytes
40 i-cache-line-size = <0x20>; // 32 bytes
41 d-cache-size = <0x8000>; // L1, 32K
42 i-cache-size = <0x8000>; // L1, 32K
43 timebase-frequency = <0>; // From uboot
44 bus-frequency = <0>;
45 clock-frequency = <0>;
46 next-level-cache = <&L2>;
47 };
48 };
49
50 memory {
51 device_type = "memory";
52 reg = <0x00000000 0x20000000>;
53 };
54
55 soc@ff700000 {
56 #address-cells = <1>;
57 #size-cells = <1>;
58 device_type = "soc";
59 ranges = <0x0 0xff700000 0x00100000>;
60 clock-frequency = <0>;
61
62 ecm-law@0 {
63 compatible = "fsl,ecm-law";
64 reg = <0x0 0x1000>;
65 fsl,num-laws = <8>;
66 };
67
68 ecm@1000 {
69 compatible = "fsl,mpc8560-ecm", "fsl,ecm";
70 reg = <0x1000 0x1000>;
71 interrupts = <17 2>;
72 interrupt-parent = <&mpic>;
73 };
74
75 memory-controller@2000 {
76 compatible = "fsl,mpc8560-memory-controller";
77 reg = <0x2000 0x1000>;
78 interrupt-parent = <&mpic>;
79 interrupts = <0x12 0x2>;
80 };
81
82 L2: l2-cache-controller@20000 {
83 compatible = "fsl,mpc8560-l2-cache-controller";
84 reg = <0x20000 0x1000>;
85 cache-line-size = <0x20>; // 32 bytes
86 cache-size = <0x40000>; // L2, 256K
87 interrupt-parent = <&mpic>;
88 interrupts = <0x10 0x2>;
89 };
90
91 i2c@3000 {
92 #address-cells = <1>;
93 #size-cells = <0>;
94 cell-index = <0>;
95 compatible = "fsl-i2c";
96 reg = <0x3000 0x100>;
97 interrupts = <0x2b 0x2>;
98 interrupt-parent = <&mpic>;
99 dfsrr;
100 };
101
102 i2c@3100 {
103 #address-cells = <1>;
104 #size-cells = <0>;
105 cell-index = <1>;
106 compatible = "fsl-i2c";
107 reg = <0x3100 0x100>;
108 interrupts = <0x2b 0x2>;
109 interrupt-parent = <&mpic>;
110 dfsrr;
111 };
112
113 dma@21300 {
114 #address-cells = <1>;
115 #size-cells = <1>;
116 compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
117 reg = <0x21300 0x4>;
118 ranges = <0x0 0x21100 0x200>;
119 cell-index = <0>;
120 dma-channel@0 {
121 compatible = "fsl,mpc8560-dma-channel",
122 "fsl,eloplus-dma-channel";
123 reg = <0x0 0x80>;
124 cell-index = <0>;
125 interrupt-parent = <&mpic>;
126 interrupts = <20 2>;
127 };
128 dma-channel@80 {
129 compatible = "fsl,mpc8560-dma-channel",
130 "fsl,eloplus-dma-channel";
131 reg = <0x80 0x80>;
132 cell-index = <1>;
133 interrupt-parent = <&mpic>;
134 interrupts = <21 2>;
135 };
136 dma-channel@100 {
137 compatible = "fsl,mpc8560-dma-channel",
138 "fsl,eloplus-dma-channel";
139 reg = <0x100 0x80>;
140 cell-index = <2>;
141 interrupt-parent = <&mpic>;
142 interrupts = <22 2>;
143 };
144 dma-channel@180 {
145 compatible = "fsl,mpc8560-dma-channel",
146 "fsl,eloplus-dma-channel";
147 reg = <0x180 0x80>;
148 cell-index = <3>;
149 interrupt-parent = <&mpic>;
150 interrupts = <23 2>;
151 };
152 };
153
154 enet0: ethernet@24000 {
155 #address-cells = <1>;
156 #size-cells = <1>;
157 cell-index = <0>;
158 device_type = "network";
159 model = "TSEC";
160 compatible = "gianfar";
161 reg = <0x24000 0x1000>;
162 ranges = <0x0 0x24000 0x1000>;
163 local-mac-address = [ 00 00 00 00 00 00 ];
164 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
165 interrupt-parent = <&mpic>;
166 tbi-handle = <&tbi0>;
167 phy-handle = <&phy0>;
168
169 mdio@520 {
170 #address-cells = <1>;
171 #size-cells = <0>;
172 compatible = "fsl,gianfar-mdio";
173 reg = <0x520 0x20>;
174 phy0: ethernet-phy@19 {
175 interrupt-parent = <&mpic>;
176 interrupts = <0x6 0x1>;
177 reg = <0x19>;
178 device_type = "ethernet-phy";
179 };
180 phy1: ethernet-phy@1a {
181 interrupt-parent = <&mpic>;
182 interrupts = <0x7 0x1>;
183 reg = <0x1a>;
184 device_type = "ethernet-phy";
185 };
186 phy2: ethernet-phy@1b {
187 interrupt-parent = <&mpic>;
188 interrupts = <0x8 0x1>;
189 reg = <0x1b>;
190 device_type = "ethernet-phy";
191 };
192 phy3: ethernet-phy@1c {
193 interrupt-parent = <&mpic>;
194 interrupts = <0x8 0x1>;
195 reg = <0x1c>;
196 device_type = "ethernet-phy";
197 };
198 tbi0: tbi-phy@11 {
199 reg = <0x11>;
200 device_type = "tbi-phy";
201 };
202 };
203 };
204
205 enet1: ethernet@25000 {
206 #address-cells = <1>;
207 #size-cells = <1>;
208 cell-index = <1>;
209 device_type = "network";
210 model = "TSEC";
211 compatible = "gianfar";
212 reg = <0x25000 0x1000>;
213 ranges = <0x0 0x25000 0x1000>;
214 local-mac-address = [ 00 00 00 00 00 00 ];
215 interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
216 interrupt-parent = <&mpic>;
217 tbi-handle = <&tbi1>;
218 phy-handle = <&phy1>;
219
220 mdio@520 {
221 #address-cells = <1>;
222 #size-cells = <0>;
223 compatible = "fsl,gianfar-tbi";
224 reg = <0x520 0x20>;
225
226 tbi1: tbi-phy@11 {
227 reg = <0x11>;
228 device_type = "tbi-phy";
229 };
230 };
231 };
232
233 mpic: pic@40000 {
234 interrupt-controller;
235 #address-cells = <0>;
236 #interrupt-cells = <2>;
237 compatible = "chrp,open-pic";
238 reg = <0x40000 0x40000>;
239 device_type = "open-pic";
240 };
241
242 cpm@919c0 {
243 #address-cells = <1>;
244 #size-cells = <1>;
245 compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
246 reg = <0x919c0 0x30>;
247 ranges;
248
249 muram@80000 {
250 #address-cells = <1>;
251 #size-cells = <1>;
252 ranges = <0x0 0x80000 0x10000>;
253
254 data@0 {
255 compatible = "fsl,cpm-muram-data";
256 reg = <0x0 0x4000 0x9000 0x2000>;
257 };
258 };
259
260 brg@919f0 {
261 compatible = "fsl,mpc8560-brg",
262 "fsl,cpm2-brg",
263 "fsl,cpm-brg";
264 reg = <0x919f0 0x10 0x915f0 0x10>;
265 clock-frequency = <165000000>;
266 };
267
268 cpmpic: pic@90c00 {
269 interrupt-controller;
270 #address-cells = <0>;
271 #interrupt-cells = <2>;
272 interrupts = <0x2e 0x2>;
273 interrupt-parent = <&mpic>;
274 reg = <0x90c00 0x80>;
275 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
276 };
277
278 enet2: ethernet@91320 {
279 device_type = "network";
280 compatible = "fsl,mpc8560-fcc-enet",
281 "fsl,cpm2-fcc-enet";
282 reg = <0x91320 0x20 0x88500 0x100 0x913b0 0x1>;
283 local-mac-address = [ 00 00 00 00 00 00 ];
284 fsl,cpm-command = <0x16200300>;
285 interrupts = <0x21 0x8>;
286 interrupt-parent = <&cpmpic>;
287 phy-handle = <&phy2>;
288 };
289
290 enet3: ethernet@91340 {
291 device_type = "network";
292 compatible = "fsl,mpc8560-fcc-enet",
293 "fsl,cpm2-fcc-enet";
294 reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
295 local-mac-address = [ 00 00 00 00 00 00 ];
296 fsl,cpm-command = <0x1a400300>;
297 interrupts = <0x22 0x8>;
298 interrupt-parent = <&cpmpic>;
299 phy-handle = <&phy3>;
300 };
301 };
302
303 global-utilities@e0000 {
304 compatible = "fsl,mpc8560-guts";
305 reg = <0xe0000 0x1000>;
306 };
307 };
308
309 pci0: pci@ff708000 {
310 #interrupt-cells = <1>;
311 #size-cells = <2>;
312 #address-cells = <3>;
313 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
314 device_type = "pci";
315 reg = <0xff708000 0x1000>;
316 clock-frequency = <66666666>;
317 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
318 interrupt-map = <
319
320 /* IDSEL 0x02 */
321 0x1000 0x0 0x0 0x1 &mpic 0x2 0x1
322 0x1000 0x0 0x0 0x2 &mpic 0x3 0x1
323 0x1000 0x0 0x0 0x3 &mpic 0x4 0x1
324 0x1000 0x0 0x0 0x4 &mpic 0x5 0x1>;
325
326 interrupt-parent = <&mpic>;
327 interrupts = <0x18 0x2>;
328 bus-range = <0x0 0x0>;
329 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
330 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
331 };
332
333 localbus@ff705000 {
334 compatible = "fsl,mpc8560-localbus", "simple-bus";
335 #address-cells = <2>;
336 #size-cells = <1>;
337 reg = <0xff705000 0x100>; // BRx, ORx, etc.
338
339 ranges = <
340 0x0 0x0 0xff800000 0x0800000 // 8MB boot flash
341 0x1 0x0 0xe4000000 0x4000000 // 64MB flash
342 0x3 0x0 0x20000000 0x4000000 // 64MB SDRAM
343 0x4 0x0 0x24000000 0x4000000 // 64MB SDRAM
344 0x5 0x0 0xfc000000 0x0c00000 // EPLD
345 0x6 0x0 0xe0000000 0x4000000 // 64MB flash
346 0x7 0x0 0x80000000 0x0200000 // ATM1,2
347 >;
348
349 epld@5,0 {
350 compatible = "wrs,epld-localbus";
351 #address-cells = <2>;
352 #size-cells = <1>;
353 reg = <0x5 0x0 0xc00000>;
354 ranges = <
355 0x0 0x0 0x5 0x000000 0x1fff // LED disp.
356 0x1 0x0 0x5 0x100000 0x1fff // switches
357 0x2 0x0 0x5 0x200000 0x1fff // ID reg.
358 0x3 0x0 0x5 0x300000 0x1fff // status reg.
359 0x4 0x0 0x5 0x400000 0x1fff // reset reg.
360 0x5 0x0 0x5 0x500000 0x1fff // Wind port
361 0x7 0x0 0x5 0x700000 0x1fff // UART #1
362 0x8 0x0 0x5 0x800000 0x1fff // UART #2
363 0x9 0x0 0x5 0x900000 0x1fff // RTC
364 0xb 0x0 0x5 0xb00000 0x1fff // EEPROM
365 >;
366
367 bidr@2,0 {
368 compatible = "wrs,sbc8560-bidr";
369 reg = <0x2 0x0 0x10>;
370 };
371
372 bcsr@3,0 {
373 compatible = "wrs,sbc8560-bcsr";
374 reg = <0x3 0x0 0x10>;
375 };
376
377 brstcr@4,0 {
378 compatible = "wrs,sbc8560-brstcr";
379 reg = <0x4 0x0 0x10>;
380 };
381
382 serial0: serial@7,0 {
383 device_type = "serial";
384 compatible = "ns16550";
385 reg = <0x7 0x0 0x100>;
386 clock-frequency = <1843200>;
387 interrupts = <0x9 0x2>;
388 interrupt-parent = <&mpic>;
389 };
390
391 serial1: serial@8,0 {
392 device_type = "serial";
393 compatible = "ns16550";
394 reg = <0x8 0x0 0x100>;
395 clock-frequency = <1843200>;
396 interrupts = <0xa 0x2>;
397 interrupt-parent = <&mpic>;
398 };
399
400 rtc@9,0 {
401 compatible = "m48t59";
402 reg = <0x9 0x0 0x1fff>;
403 };
404 };
405 };
406};
diff --git a/arch/powerpc/boot/flatdevtree_env.h b/arch/powerpc/boot/flatdevtree_env.h
deleted file mode 100644
index 66e0ebb1a364..000000000000
--- a/arch/powerpc/boot/flatdevtree_env.h
+++ /dev/null
@@ -1,27 +0,0 @@
1/*
2 * This file adds the header file glue so that the shared files
3 * flatdevicetree.[ch] can compile and work in the powerpc bootwrapper.
4 *
5 * strncmp & strchr copied from <file:lib/string.c>
6 * Copyright (C) 1991, 1992 Linus Torvalds
7 *
8 * Maintained by: Mark A. Greer <mgreer@mvista.com>
9 */
10#ifndef _PPC_BOOT_FLATDEVTREE_ENV_H_
11#define _PPC_BOOT_FLATDEVTREE_ENV_H_
12
13#include <stdarg.h>
14#include <stddef.h>
15#include "types.h"
16#include "string.h"
17#include "stdio.h"
18#include "ops.h"
19
20#define be16_to_cpu(x) (x)
21#define cpu_to_be16(x) (x)
22#define be32_to_cpu(x) (x)
23#define cpu_to_be32(x) (x)
24#define be64_to_cpu(x) (x)
25#define cpu_to_be64(x) (x)
26
27#endif /* _PPC_BOOT_FLATDEVTREE_ENV_H_ */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-28 13:56:23 -0500