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-rw-r--r--arch/powerpc/boot/.gitignore1
-rw-r--r--arch/powerpc/boot/Makefile7
-rw-r--r--arch/powerpc/boot/dts/fsl/elo3-dma-2.dtsi82
-rw-r--r--arch/powerpc/boot/dts/fsl/p1020si-post.dtsi3
-rw-r--r--arch/powerpc/boot/dts/fsl/p1021si-post.dtsi3
-rw-r--r--arch/powerpc/boot/dts/fsl/p1022si-post.dtsi3
-rw-r--r--arch/powerpc/boot/dts/fsl/p1023si-post.dtsi3
-rw-r--r--arch/powerpc/boot/dts/kilauea.dts2
-rw-r--r--arch/powerpc/boot/dts/mvme5100.dts185
-rw-r--r--arch/powerpc/boot/dts/p1010rdb-pa.dts23
-rw-r--r--arch/powerpc/boot/dts/p1010rdb-pa.dtsi85
-rw-r--r--arch/powerpc/boot/dts/p1010rdb-pa_36b.dts (renamed from arch/powerpc/boot/dts/p1010rdb_36b.dts)47
-rw-r--r--arch/powerpc/boot/dts/p1010rdb-pb.dts35
-rw-r--r--arch/powerpc/boot/dts/p1010rdb-pb_36b.dts58
-rw-r--r--arch/powerpc/boot/dts/p1010rdb.dts66
-rw-r--r--arch/powerpc/boot/dts/p1010rdb.dtsi43
-rw-r--r--arch/powerpc/boot/dts/p1010rdb_32b.dtsi79
-rw-r--r--arch/powerpc/boot/dts/p1010rdb_36b.dtsi79
-rw-r--r--arch/powerpc/boot/dts/p1022ds.dtsi3
-rw-r--r--arch/powerpc/boot/dts/p1025twr.dts95
-rw-r--r--arch/powerpc/boot/dts/p1025twr.dtsi280
-rw-r--r--arch/powerpc/boot/dts/virtex440-ml507.dts2
-rw-r--r--arch/powerpc/boot/mvme5100.c27
-rwxr-xr-xarch/powerpc/boot/wrapper4
24 files changed, 1053 insertions, 162 deletions
diff --git a/arch/powerpc/boot/.gitignore b/arch/powerpc/boot/.gitignore
index 554734ff302e..d61c03525777 100644
--- a/arch/powerpc/boot/.gitignore
+++ b/arch/powerpc/boot/.gitignore
@@ -16,6 +16,7 @@ mktree
16uImage 16uImage
17cuImage.* 17cuImage.*
18dtbImage.* 18dtbImage.*
19*.dtb
19treeImage.* 20treeImage.*
20zImage 21zImage
21zImage.initrd 22zImage.initrd
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index ca7f08cc4afd..90e9d9548660 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -71,9 +71,9 @@ src-wlib-y := string.S crt0.S crtsavres.S stdio.c main.c \
71 uartlite.c mpc52xx-psc.c 71 uartlite.c mpc52xx-psc.c
72src-wlib-$(CONFIG_40x) += 4xx.c planetcore.c 72src-wlib-$(CONFIG_40x) += 4xx.c planetcore.c
73src-wlib-$(CONFIG_44x) += 4xx.c ebony.c bamboo.c 73src-wlib-$(CONFIG_44x) += 4xx.c ebony.c bamboo.c
74src-wlib-$(CONFIG_8xx) += mpc8xx.c planetcore.c 74src-wlib-$(CONFIG_8xx) += mpc8xx.c planetcore.c fsl-soc.c
75src-wlib-$(CONFIG_PPC_82xx) += pq2.c fsl-soc.c planetcore.c 75src-wlib-$(CONFIG_PPC_82xx) += pq2.c fsl-soc.c planetcore.c
76src-wlib-$(CONFIG_EMBEDDED6xx) += mv64x60.c mv64x60_i2c.c ugecon.c 76src-wlib-$(CONFIG_EMBEDDED6xx) += mv64x60.c mv64x60_i2c.c ugecon.c fsl-soc.c
77 77
78src-plat-y := of.c epapr.c 78src-plat-y := of.c epapr.c
79src-plat-$(CONFIG_40x) += fixed-head.S ep405.c cuboot-hotfoot.c \ 79src-plat-$(CONFIG_40x) += fixed-head.S ep405.c cuboot-hotfoot.c \
@@ -95,7 +95,7 @@ src-plat-$(CONFIG_FSL_SOC_BOOKE) += cuboot-85xx.c cuboot-85xx-cpm2.c
95src-plat-$(CONFIG_EMBEDDED6xx) += cuboot-pq2.c cuboot-mpc7448hpc2.c \ 95src-plat-$(CONFIG_EMBEDDED6xx) += cuboot-pq2.c cuboot-mpc7448hpc2.c \
96 cuboot-c2k.c gamecube-head.S \ 96 cuboot-c2k.c gamecube-head.S \
97 gamecube.c wii-head.S wii.c holly.c \ 97 gamecube.c wii-head.S wii.c holly.c \
98 prpmc2800.c 98 prpmc2800.c fixed-head.S mvme5100.c
99src-plat-$(CONFIG_AMIGAONE) += cuboot-amigaone.c 99src-plat-$(CONFIG_AMIGAONE) += cuboot-amigaone.c
100src-plat-$(CONFIG_PPC_PS3) += ps3-head.S ps3-hvcall.S ps3.c 100src-plat-$(CONFIG_PPC_PS3) += ps3-head.S ps3-hvcall.S ps3.c
101src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c epapr-wrapper.c 101src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c epapr-wrapper.c
@@ -286,6 +286,7 @@ image-$(CONFIG_MPC7448HPC2) += cuImage.mpc7448hpc2
286image-$(CONFIG_PPC_C2K) += cuImage.c2k 286image-$(CONFIG_PPC_C2K) += cuImage.c2k
287image-$(CONFIG_GAMECUBE) += dtbImage.gamecube 287image-$(CONFIG_GAMECUBE) += dtbImage.gamecube
288image-$(CONFIG_WII) += dtbImage.wii 288image-$(CONFIG_WII) += dtbImage.wii
289image-$(CONFIG_MVME5100) += dtbImage.mvme5100
289 290
290# Board port in arch/powerpc/platform/amigaone/Kconfig 291# Board port in arch/powerpc/platform/amigaone/Kconfig
291image-$(CONFIG_AMIGAONE) += cuImage.amigaone 292image-$(CONFIG_AMIGAONE) += cuImage.amigaone
diff --git a/arch/powerpc/boot/dts/fsl/elo3-dma-2.dtsi b/arch/powerpc/boot/dts/fsl/elo3-dma-2.dtsi
new file mode 100644
index 000000000000..d3cc8d0f7c25
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/elo3-dma-2.dtsi
@@ -0,0 +1,82 @@
1/*
2 * QorIQ Elo3 DMA device tree stub [ controller @ offset 0x102300 ]
3 *
4 * Copyright 2013 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35dma2: dma@102300 {
36 #address-cells = <1>;
37 #size-cells = <1>;
38 compatible = "fsl,elo3-dma";
39 reg = <0x102300 0x4>,
40 <0x102600 0x4>;
41 ranges = <0x0 0x102100 0x500>;
42 dma-channel@0 {
43 compatible = "fsl,eloplus-dma-channel";
44 reg = <0x0 0x80>;
45 interrupts = <464 2 0 0>;
46 };
47 dma-channel@80 {
48 compatible = "fsl,eloplus-dma-channel";
49 reg = <0x80 0x80>;
50 interrupts = <465 2 0 0>;
51 };
52 dma-channel@100 {
53 compatible = "fsl,eloplus-dma-channel";
54 reg = <0x100 0x80>;
55 interrupts = <466 2 0 0>;
56 };
57 dma-channel@180 {
58 compatible = "fsl,eloplus-dma-channel";
59 reg = <0x180 0x80>;
60 interrupts = <467 2 0 0>;
61 };
62 dma-channel@300 {
63 compatible = "fsl,eloplus-dma-channel";
64 reg = <0x300 0x80>;
65 interrupts = <468 2 0 0>;
66 };
67 dma-channel@380 {
68 compatible = "fsl,eloplus-dma-channel";
69 reg = <0x380 0x80>;
70 interrupts = <469 2 0 0>;
71 };
72 dma-channel@400 {
73 compatible = "fsl,eloplus-dma-channel";
74 reg = <0x400 0x80>;
75 interrupts = <470 2 0 0>;
76 };
77 dma-channel@480 {
78 compatible = "fsl,eloplus-dma-channel";
79 reg = <0x480 0x80>;
80 interrupts = <471 2 0 0>;
81 };
82};
diff --git a/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi
index 68cc5e7f6477..642dc3a83d0e 100644
--- a/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi
@@ -36,7 +36,8 @@
36 #address-cells = <2>; 36 #address-cells = <2>;
37 #size-cells = <1>; 37 #size-cells = <1>;
38 compatible = "fsl,p1020-elbc", "fsl,elbc", "simple-bus"; 38 compatible = "fsl,p1020-elbc", "fsl,elbc", "simple-bus";
39 interrupts = <19 2 0 0>; 39 interrupts = <19 2 0 0>,
40 <16 2 0 0>;
40}; 41};
41 42
42/* controller at 0x9000 */ 43/* controller at 0x9000 */
diff --git a/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
index adb82fd9057f..407cb5fd0f5b 100644
--- a/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
@@ -36,7 +36,8 @@
36 #address-cells = <2>; 36 #address-cells = <2>;
37 #size-cells = <1>; 37 #size-cells = <1>;
38 compatible = "fsl,p1021-elbc", "fsl,elbc", "simple-bus"; 38 compatible = "fsl,p1021-elbc", "fsl,elbc", "simple-bus";
39 interrupts = <19 2 0 0>; 39 interrupts = <19 2 0 0>,
40 <16 2 0 0>;
40}; 41};
41 42
42/* controller at 0x9000 */ 43/* controller at 0x9000 */
diff --git a/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
index e179803a81ef..ebf202234549 100644
--- a/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
@@ -40,7 +40,8 @@
40 * pin muxing when the DIU is enabled. 40 * pin muxing when the DIU is enabled.
41 */ 41 */
42 compatible = "fsl,p1022-elbc", "fsl,elbc"; 42 compatible = "fsl,p1022-elbc", "fsl,elbc";
43 interrupts = <19 2 0 0>; 43 interrupts = <19 2 0 0>,
44 <16 2 0 0>;
44}; 45};
45 46
46/* controller at 0x9000 */ 47/* controller at 0x9000 */
diff --git a/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
index f1105bffa915..81437fdf1db4 100644
--- a/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
@@ -36,7 +36,8 @@
36 #address-cells = <2>; 36 #address-cells = <2>;
37 #size-cells = <1>; 37 #size-cells = <1>;
38 compatible = "fsl,p1023-elbc", "fsl,elbc", "simple-bus"; 38 compatible = "fsl,p1023-elbc", "fsl,elbc", "simple-bus";
39 interrupts = <19 2 0 0>; 39 interrupts = <19 2 0 0>,
40 <16 2 0 0>;
40}; 41};
41 42
42/* controller at 0xa000 */ 43/* controller at 0xa000 */
diff --git a/arch/powerpc/boot/dts/kilauea.dts b/arch/powerpc/boot/dts/kilauea.dts
index 1613d6e4049e..5ba7f01e2a29 100644
--- a/arch/powerpc/boot/dts/kilauea.dts
+++ b/arch/powerpc/boot/dts/kilauea.dts
@@ -406,7 +406,7 @@
406 406
407 MSI: ppc4xx-msi@C10000000 { 407 MSI: ppc4xx-msi@C10000000 {
408 compatible = "amcc,ppc4xx-msi", "ppc4xx-msi"; 408 compatible = "amcc,ppc4xx-msi", "ppc4xx-msi";
409 reg = < 0x0 0xEF620000 0x100>; 409 reg = <0xEF620000 0x100>;
410 sdr-base = <0x4B0>; 410 sdr-base = <0x4B0>;
411 msi-data = <0x00000000>; 411 msi-data = <0x00000000>;
412 msi-mask = <0x44440000>; 412 msi-mask = <0x44440000>;
diff --git a/arch/powerpc/boot/dts/mvme5100.dts b/arch/powerpc/boot/dts/mvme5100.dts
new file mode 100644
index 000000000000..1ecb341a232a
--- /dev/null
+++ b/arch/powerpc/boot/dts/mvme5100.dts
@@ -0,0 +1,185 @@
1/*
2 * Device Tree Source for Motorola/Emerson MVME5100.
3 *
4 * Copyright 2013 CSC Australia Pty. Ltd.
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without
8 * any warranty of any kind, whether express or implied.
9 */
10
11/dts-v1/;
12
13/ {
14 model = "MVME5100";
15 compatible = "MVME5100";
16 #address-cells = <1>;
17 #size-cells = <1>;
18
19 aliases {
20 serial0 = &serial0;
21 pci0 = &pci0;
22 };
23
24 cpus {
25 #address-cells = <1>;
26 #size-cells = <0>;
27
28 PowerPC,7410 {
29 device_type = "cpu";
30 reg = <0x0>;
31 /* Following required by dtc but not used */
32 d-cache-line-size = <32>;
33 i-cache-line-size = <32>;
34 i-cache-size = <32768>;
35 d-cache-size = <32768>;
36 timebase-frequency = <25000000>;
37 clock-frequency = <500000000>;
38 bus-frequency = <100000000>;
39 };
40 };
41
42 memory {
43 device_type = "memory";
44 reg = <0x0 0x20000000>;
45 };
46
47 hawk@fef80000 {
48 #address-cells = <1>;
49 #size-cells = <1>;
50 compatible = "hawk-bridge", "simple-bus";
51 ranges = <0x0 0xfef80000 0x10000>;
52 reg = <0xfef80000 0x10000>;
53
54 serial0: serial@8000 {
55 device_type = "serial";
56 compatible = "ns16550";
57 reg = <0x8000 0x80>;
58 reg-shift = <4>;
59 clock-frequency = <1843200>;
60 current-speed = <9600>;
61 interrupts = <1 1>; // IRQ1 Level Active Low.
62 interrupt-parent = <&mpic>;
63 };
64
65 serial1: serial@8200 {
66 device_type = "serial";
67 compatible = "ns16550";
68 reg = <0x8200 0x80>;
69 reg-shift = <4>;
70 clock-frequency = <1843200>;
71 current-speed = <9600>;
72 interrupts = <1 1>; // IRQ1 Level Active Low.
73 interrupt-parent = <&mpic>;
74 };
75
76 mpic: interrupt-controller@f3f80000 {
77 #interrupt-cells = <2>;
78 #address-cells = <0>;
79 device_type = "open-pic";
80 compatible = "chrp,open-pic";
81 interrupt-controller;
82 reg = <0xf3f80000 0x40000>;
83 };
84 };
85
86 pci0: pci@feff0000 {
87 #address-cells = <3>;
88 #size-cells = <2>;
89 #interrupt-cells = <1>;
90 device_type = "pci";
91 compatible = "hawk-pci";
92 reg = <0xfec00000 0x400000>;
93 8259-interrupt-acknowledge = <0xfeff0030>;
94 ranges = <0x1000000 0x0 0x0 0xfe000000 0x0 0x800000
95 0x2000000 0x0 0x80000000 0x80000000 0x0 0x74000000>;
96 bus-range = <0 255>;
97 clock-frequency = <33333333>;
98 interrupt-parent = <&mpic>;
99 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
100 interrupt-map = <
101
102 /*
103 * This definition (IDSEL 11) duplicates the
104 * interrupts definition in the i8259
105 * interrupt controller below.
106 *
107 * Do not change the interrupt sense/polarity from
108 * 0x2 to anything else, doing so will cause endless
109 * "spurious" i8259 interrupts to be fielded.
110 */
111 // IDSEL 11 - iPMC712 PCI/ISA Bridge
112 0x5800 0x0 0x0 0x1 &mpic 0x0 0x2
113 0x5800 0x0 0x0 0x2 &mpic 0x0 0x2
114 0x5800 0x0 0x0 0x3 &mpic 0x0 0x2
115 0x5800 0x0 0x0 0x4 &mpic 0x0 0x2
116
117 /* IDSEL 12 - Not Used */
118
119 /* IDSEL 13 - Universe VME Bridge */
120 0x6800 0x0 0x0 0x1 &mpic 0x5 0x1
121 0x6800 0x0 0x0 0x2 &mpic 0x6 0x1
122 0x6800 0x0 0x0 0x3 &mpic 0x7 0x1
123 0x6800 0x0 0x0 0x4 &mpic 0x8 0x1
124
125 /* IDSEL 14 - ENET 1 */
126 0x7000 0x0 0x0 0x1 &mpic 0x2 0x1
127
128 /* IDSEL 15 - Not Used */
129
130 /* IDSEL 16 - PMC Slot 1 */
131 0x8000 0x0 0x0 0x1 &mpic 0x9 0x1
132 0x8000 0x0 0x0 0x2 &mpic 0xa 0x1
133 0x8000 0x0 0x0 0x3 &mpic 0xb 0x1
134 0x8000 0x0 0x0 0x4 &mpic 0xc 0x1
135
136 /* IDSEL 17 - PMC Slot 2 */
137 0x8800 0x0 0x0 0x1 &mpic 0xc 0x1
138 0x8800 0x0 0x0 0x2 &mpic 0x9 0x1
139 0x8800 0x0 0x0 0x3 &mpic 0xa 0x1
140 0x8800 0x0 0x0 0x4 &mpic 0xb 0x1
141
142 /* IDSEL 18 - Not Used */
143
144 /* IDSEL 19 - ENET 2 */
145 0x9800 0x0 0x0 0x1 &mpic 0xd 0x1
146
147 /* IDSEL 20 - PMCSPAN (PCI-X) */
148 0xa000 0x0 0x0 0x1 &mpic 0x9 0x1
149 0xa000 0x0 0x0 0x2 &mpic 0xa 0x1
150 0xa000 0x0 0x0 0x3 &mpic 0xb 0x1
151 0xa000 0x0 0x0 0x4 &mpic 0xc 0x1
152
153 >;
154
155 isa {
156 #address-cells = <2>;
157 #size-cells = <1>;
158 #interrupt-cells = <2>;
159 device_type = "isa";
160 compatible = "isa";
161 ranges = <0x00000001 0 0x01000000 0 0x00000000 0x00001000>;
162 interrupt-parent = <&i8259>;
163
164 i8259: interrupt-controller@20 {
165 #interrupt-cells = <2>;
166 #address-cells = <0>;
167 interrupts = <0 2>;
168 device_type = "interrupt-controller";
169 compatible = "chrp,iic";
170 interrupt-controller;
171 reg = <1 0x00000020 0x00000002
172 1 0x000000a0 0x00000002
173 1 0x000004d0 0x00000002>;
174 interrupt-parent = <&mpic>;
175 };
176
177 };
178
179 };
180
181 chosen {
182 linux,stdout-path = &serial0;
183 };
184
185};
diff --git a/arch/powerpc/boot/dts/p1010rdb-pa.dts b/arch/powerpc/boot/dts/p1010rdb-pa.dts
new file mode 100644
index 000000000000..767d4c032857
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1010rdb-pa.dts
@@ -0,0 +1,23 @@
1/*
2 * P1010 RDB Device Tree Source
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/include/ "fsl/p1010si-pre.dtsi"
13
14/ {
15 model = "fsl,P1010RDB";
16 compatible = "fsl,P1010RDB";
17
18 /include/ "p1010rdb_32b.dtsi"
19};
20
21/include/ "p1010rdb.dtsi"
22/include/ "p1010rdb-pa.dtsi"
23/include/ "fsl/p1010si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1010rdb-pa.dtsi b/arch/powerpc/boot/dts/p1010rdb-pa.dtsi
new file mode 100644
index 000000000000..434fb2d58575
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1010rdb-pa.dtsi
@@ -0,0 +1,85 @@
1/*
2 * P1010 RDB Device Tree Source stub (no addresses or top-level ranges)
3 *
4 * Copyright 2013 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&ifc_nand {
36 partition@0 {
37 /* This location must not be altered */
38 /* 1MB for u-boot Bootloader Image */
39 reg = <0x0 0x00100000>;
40 label = "NAND U-Boot Image";
41 read-only;
42 };
43
44 partition@100000 {
45 /* 1MB for DTB Image */
46 reg = <0x00100000 0x00100000>;
47 label = "NAND DTB Image";
48 };
49
50 partition@200000 {
51 /* 4MB for Linux Kernel Image */
52 reg = <0x00200000 0x00400000>;
53 label = "NAND Linux Kernel Image";
54 };
55
56 partition@600000 {
57 /* 4MB for Compressed Root file System Image */
58 reg = <0x00600000 0x00400000>;
59 label = "NAND Compressed RFS Image";
60 };
61
62 partition@a00000 {
63 /* 15MB for JFFS2 based Root file System */
64 reg = <0x00a00000 0x00f00000>;
65 label = "NAND JFFS2 Root File System";
66 };
67
68 partition@1900000 {
69 /* 7MB for User Area */
70 reg = <0x01900000 0x00700000>;
71 label = "NAND User area";
72 };
73};
74
75&phy0 {
76 interrupts = <1 1 0 0>;
77};
78
79&phy1 {
80 interrupts = <2 1 0 0>;
81};
82
83&phy2 {
84 interrupts = <4 1 0 0>;
85};
diff --git a/arch/powerpc/boot/dts/p1010rdb_36b.dts b/arch/powerpc/boot/dts/p1010rdb-pa_36b.dts
index 64776f4a4651..3033371bc007 100644
--- a/arch/powerpc/boot/dts/p1010rdb_36b.dts
+++ b/arch/powerpc/boot/dts/p1010rdb-pa_36b.dts
@@ -38,52 +38,9 @@
38 model = "fsl,P1010RDB"; 38 model = "fsl,P1010RDB";
39 compatible = "fsl,P1010RDB"; 39 compatible = "fsl,P1010RDB";
40 40
41 memory { 41 /include/ "p1010rdb_36b.dtsi"
42 device_type = "memory";
43 };
44
45 board_ifc: ifc: ifc@fffe1e000 {
46 /* NOR, NAND Flashes and CPLD on board */
47 ranges = <0x0 0x0 0xf 0xee000000 0x02000000
48 0x1 0x0 0xf 0xff800000 0x00010000
49 0x3 0x0 0xf 0xffb00000 0x00000020>;
50 reg = <0xf 0xffe1e000 0 0x2000>;
51 };
52
53 board_soc: soc: soc@fffe00000 {
54 ranges = <0x0 0xf 0xffe00000 0x100000>;
55 };
56
57 pci0: pcie@fffe09000 {
58 reg = <0xf 0xffe09000 0 0x1000>;
59 ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
60 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
61 pcie@0 {
62 ranges = <0x2000000 0x0 0xc0000000
63 0x2000000 0x0 0xc0000000
64 0x0 0x20000000
65
66 0x1000000 0x0 0x0
67 0x1000000 0x0 0x0
68 0x0 0x100000>;
69 };
70 };
71
72 pci1: pcie@fffe0a000 {
73 reg = <0xf 0xffe0a000 0 0x1000>;
74 ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
75 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
76 pcie@0 {
77 ranges = <0x2000000 0x0 0xc0000000
78 0x2000000 0x0 0xc0000000
79 0x0 0x20000000
80
81 0x1000000 0x0 0x0
82 0x1000000 0x0 0x0
83 0x0 0x100000>;
84 };
85 };
86}; 42};
87 43
88/include/ "p1010rdb.dtsi" 44/include/ "p1010rdb.dtsi"
45/include/ "p1010rdb-pa.dtsi"
89/include/ "fsl/p1010si-post.dtsi" 46/include/ "fsl/p1010si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1010rdb-pb.dts b/arch/powerpc/boot/dts/p1010rdb-pb.dts
new file mode 100644
index 000000000000..6eeb7d3185be
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1010rdb-pb.dts
@@ -0,0 +1,35 @@
1/*
2 * P1010 RDB Device Tree Source
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/include/ "fsl/p1010si-pre.dtsi"
13
14/ {
15 model = "fsl,P1010RDB-PB";
16 compatible = "fsl,P1010RDB-PB";
17
18 /include/ "p1010rdb_32b.dtsi"
19};
20
21/include/ "p1010rdb.dtsi"
22
23&phy0 {
24 interrupts = <0 1 0 0>;
25};
26
27&phy1 {
28 interrupts = <2 1 0 0>;
29};
30
31&phy2 {
32 interrupts = <1 1 0 0>;
33};
34
35/include/ "fsl/p1010si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1010rdb-pb_36b.dts b/arch/powerpc/boot/dts/p1010rdb-pb_36b.dts
new file mode 100644
index 000000000000..7ab3c907b326
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1010rdb-pb_36b.dts
@@ -0,0 +1,58 @@
1/*
2 * P1010 RDB Device Tree Source (36-bit address map)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p1010si-pre.dtsi"
36
37/ {
38 model = "fsl,P1010RDB-PB";
39 compatible = "fsl,P1010RDB-PB";
40
41 /include/ "p1010rdb_36b.dtsi"
42};
43
44/include/ "p1010rdb.dtsi"
45
46&phy0 {
47 interrupts = <0 1 0 0>;
48};
49
50&phy1 {
51 interrupts = <2 1 0 0>;
52};
53
54&phy2 {
55 interrupts = <1 1 0 0>;
56};
57
58/include/ "fsl/p1010si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1010rdb.dts b/arch/powerpc/boot/dts/p1010rdb.dts
deleted file mode 100644
index b868d22984e9..000000000000
--- a/arch/powerpc/boot/dts/p1010rdb.dts
+++ /dev/null
@@ -1,66 +0,0 @@
1/*
2 * P1010 RDB Device Tree Source
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/include/ "fsl/p1010si-pre.dtsi"
13
14/ {
15 model = "fsl,P1010RDB";
16 compatible = "fsl,P1010RDB";
17
18 memory {
19 device_type = "memory";
20 };
21
22 board_ifc: ifc: ifc@ffe1e000 {
23 /* NOR, NAND Flashes and CPLD on board */
24 ranges = <0x0 0x0 0x0 0xee000000 0x02000000
25 0x1 0x0 0x0 0xff800000 0x00010000
26 0x3 0x0 0x0 0xffb00000 0x00000020>;
27 reg = <0x0 0xffe1e000 0 0x2000>;
28 };
29
30 board_soc: soc: soc@ffe00000 {
31 ranges = <0x0 0x0 0xffe00000 0x100000>;
32 };
33
34 pci0: pcie@ffe09000 {
35 reg = <0 0xffe09000 0 0x1000>;
36 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
37 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
38 pcie@0 {
39 ranges = <0x2000000 0x0 0xa0000000
40 0x2000000 0x0 0xa0000000
41 0x0 0x20000000
42
43 0x1000000 0x0 0x0
44 0x1000000 0x0 0x0
45 0x0 0x100000>;
46 };
47 };
48
49 pci1: pcie@ffe0a000 {
50 reg = <0 0xffe0a000 0 0x1000>;
51 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
52 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
53 pcie@0 {
54 ranges = <0x2000000 0x0 0x80000000
55 0x2000000 0x0 0x80000000
56 0x0 0x20000000
57
58 0x1000000 0x0 0x0
59 0x1000000 0x0 0x0
60 0x0 0x100000>;
61 };
62 };
63};
64
65/include/ "p1010rdb.dtsi"
66/include/ "fsl/p1010si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1010rdb.dtsi b/arch/powerpc/boot/dts/p1010rdb.dtsi
index ec7c27a64671..ea534efa790d 100644
--- a/arch/powerpc/boot/dts/p1010rdb.dtsi
+++ b/arch/powerpc/boot/dts/p1010rdb.dtsi
@@ -69,49 +69,11 @@
69 }; 69 };
70 }; 70 };
71 71
72 nand@1,0 { 72 ifc_nand: nand@1,0 {
73 #address-cells = <1>; 73 #address-cells = <1>;
74 #size-cells = <1>; 74 #size-cells = <1>;
75 compatible = "fsl,ifc-nand"; 75 compatible = "fsl,ifc-nand";
76 reg = <0x1 0x0 0x10000>; 76 reg = <0x1 0x0 0x10000>;
77
78 partition@0 {
79 /* This location must not be altered */
80 /* 1MB for u-boot Bootloader Image */
81 reg = <0x0 0x00100000>;
82 label = "NAND U-Boot Image";
83 read-only;
84 };
85
86 partition@100000 {
87 /* 1MB for DTB Image */
88 reg = <0x00100000 0x00100000>;
89 label = "NAND DTB Image";
90 };
91
92 partition@200000 {
93 /* 4MB for Linux Kernel Image */
94 reg = <0x00200000 0x00400000>;
95 label = "NAND Linux Kernel Image";
96 };
97
98 partition@600000 {
99 /* 4MB for Compressed Root file System Image */
100 reg = <0x00600000 0x00400000>;
101 label = "NAND Compressed RFS Image";
102 };
103
104 partition@a00000 {
105 /* 15MB for JFFS2 based Root file System */
106 reg = <0x00a00000 0x00f00000>;
107 label = "NAND JFFS2 Root File System";
108 };
109
110 partition@1900000 {
111 /* 7MB for User Area */
112 reg = <0x01900000 0x00700000>;
113 label = "NAND User area";
114 };
115 }; 77 };
116 78
117 cpld@3,0 { 79 cpld@3,0 {
@@ -193,17 +155,14 @@
193 155
194 mdio@24000 { 156 mdio@24000 {
195 phy0: ethernet-phy@0 { 157 phy0: ethernet-phy@0 {
196 interrupts = <3 1 0 0>;
197 reg = <0x1>; 158 reg = <0x1>;
198 }; 159 };
199 160
200 phy1: ethernet-phy@1 { 161 phy1: ethernet-phy@1 {
201 interrupts = <2 1 0 0>;
202 reg = <0x0>; 162 reg = <0x0>;
203 }; 163 };
204 164
205 phy2: ethernet-phy@2 { 165 phy2: ethernet-phy@2 {
206 interrupts = <2 1 0 0>;
207 reg = <0x2>; 166 reg = <0x2>;
208 }; 167 };
209 168
diff --git a/arch/powerpc/boot/dts/p1010rdb_32b.dtsi b/arch/powerpc/boot/dts/p1010rdb_32b.dtsi
new file mode 100644
index 000000000000..fdc19aab2f70
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1010rdb_32b.dtsi
@@ -0,0 +1,79 @@
1/*
2 * P1010 RDB Device Tree Source stub (no addresses or top-level ranges)
3 *
4 * Copyright 2013 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35memory {
36 device_type = "memory";
37};
38
39board_ifc: ifc: ifc@ffe1e000 {
40 /* NOR, NAND Flashes and CPLD on board */
41 ranges = <0x0 0x0 0x0 0xee000000 0x02000000
42 0x1 0x0 0x0 0xff800000 0x00010000
43 0x3 0x0 0x0 0xffb00000 0x00000020>;
44 reg = <0x0 0xffe1e000 0 0x2000>;
45};
46
47board_soc: soc: soc@ffe00000 {
48 ranges = <0x0 0x0 0xffe00000 0x100000>;
49};
50
51pci0: pcie@ffe09000 {
52 reg = <0 0xffe09000 0 0x1000>;
53 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
54 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
55 pcie@0 {
56 ranges = <0x2000000 0x0 0xa0000000
57 0x2000000 0x0 0xa0000000
58 0x0 0x20000000
59
60 0x1000000 0x0 0x0
61 0x1000000 0x0 0x0
62 0x0 0x100000>;
63 };
64};
65
66pci1: pcie@ffe0a000 {
67 reg = <0 0xffe0a000 0 0x1000>;
68 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
69 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
70 pcie@0 {
71 ranges = <0x2000000 0x0 0x80000000
72 0x2000000 0x0 0x80000000
73 0x0 0x20000000
74
75 0x1000000 0x0 0x0
76 0x1000000 0x0 0x0
77 0x0 0x100000>;
78 };
79};
diff --git a/arch/powerpc/boot/dts/p1010rdb_36b.dtsi b/arch/powerpc/boot/dts/p1010rdb_36b.dtsi
new file mode 100644
index 000000000000..de2fceed4f79
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1010rdb_36b.dtsi
@@ -0,0 +1,79 @@
1/*
2 * P1010 RDB Device Tree Source stub (no addresses or top-level ranges)
3 *
4 * Copyright 2013 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35memory {
36 device_type = "memory";
37};
38
39board_ifc: ifc: ifc@fffe1e000 {
40 /* NOR, NAND Flashes and CPLD on board */
41 ranges = <0x0 0x0 0xf 0xee000000 0x02000000
42 0x1 0x0 0xf 0xff800000 0x00010000
43 0x3 0x0 0xf 0xffb00000 0x00000020>;
44 reg = <0xf 0xffe1e000 0 0x2000>;
45};
46
47board_soc: soc: soc@fffe00000 {
48 ranges = <0x0 0xf 0xffe00000 0x100000>;
49};
50
51pci0: pcie@fffe09000 {
52 reg = <0xf 0xffe09000 0 0x1000>;
53 ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
54 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
55 pcie@0 {
56 ranges = <0x2000000 0x0 0xc0000000
57 0x2000000 0x0 0xc0000000
58 0x0 0x20000000
59
60 0x1000000 0x0 0x0
61 0x1000000 0x0 0x0
62 0x0 0x100000>;
63 };
64};
65
66pci1: pcie@fffe0a000 {
67 reg = <0xf 0xffe0a000 0 0x1000>;
68 ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
69 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
70 pcie@0 {
71 ranges = <0x2000000 0x0 0xc0000000
72 0x2000000 0x0 0xc0000000
73 0x0 0x20000000
74
75 0x1000000 0x0 0x0
76 0x1000000 0x0 0x0
77 0x0 0x100000>;
78 };
79};
diff --git a/arch/powerpc/boot/dts/p1022ds.dtsi b/arch/powerpc/boot/dts/p1022ds.dtsi
index 873da350d01b..957e0dc1dc0f 100644
--- a/arch/powerpc/boot/dts/p1022ds.dtsi
+++ b/arch/powerpc/boot/dts/p1022ds.dtsi
@@ -146,8 +146,9 @@
146 */ 146 */
147 }; 147 };
148 rtc@68 { 148 rtc@68 {
149 compatible = "dallas,ds1339"; 149 compatible = "dallas,ds3232";
150 reg = <0x68>; 150 reg = <0x68>;
151 interrupts = <0x1 0x1 0 0>;
151 }; 152 };
152 adt7461@4c { 153 adt7461@4c {
153 compatible = "adi,adt7461"; 154 compatible = "adi,adt7461";
diff --git a/arch/powerpc/boot/dts/p1025twr.dts b/arch/powerpc/boot/dts/p1025twr.dts
new file mode 100644
index 000000000000..9036a4987905
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1025twr.dts
@@ -0,0 +1,95 @@
1/*
2 * P1025 TWR Device Tree Source (32-bit address map)
3 *
4 * Copyright 2013 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p1021si-pre.dtsi"
36/ {
37 model = "fsl,P1025";
38 compatible = "fsl,TWR-P1025";
39
40 memory {
41 device_type = "memory";
42 };
43
44 lbc: localbus@ffe05000 {
45 reg = <0 0xffe05000 0 0x1000>;
46
47 /* NOR Flash and SSD1289 */
48 ranges = <0x0 0x0 0x0 0xec000000 0x04000000
49 0x2 0x0 0x0 0xe0000000 0x00020000>;
50 };
51
52 soc: soc@ffe00000 {
53 ranges = <0x0 0x0 0xffe00000 0x100000>;
54 };
55
56 pci0: pcie@ffe09000 {
57 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
58 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
59 reg = <0 0xffe09000 0 0x1000>;
60 pcie@0 {
61 ranges = <0x2000000 0x0 0xa0000000
62 0x2000000 0x0 0xa0000000
63 0x0 0x20000000
64
65 0x1000000 0x0 0x0
66 0x1000000 0x0 0x0
67 0x0 0x100000>;
68 };
69 };
70
71 pci1: pcie@ffe0a000 {
72 reg = <0 0xffe0a000 0 0x1000>;
73 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
74 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
75 pcie@0 {
76 ranges = <0x2000000 0x0 0x80000000
77 0x2000000 0x0 0x80000000
78 0x0 0x20000000
79
80 0x1000000 0x0 0x0
81 0x1000000 0x0 0x0
82 0x0 0x100000>;
83 };
84 };
85
86 qe: qe@ffe80000 {
87 ranges = <0x0 0x0 0xffe80000 0x40000>;
88 reg = <0 0xffe80000 0 0x480>;
89 brg-frequency = <0>;
90 bus-frequency = <0>;
91 };
92};
93
94/include/ "p1025twr.dtsi"
95/include/ "fsl/p1021si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1025twr.dtsi b/arch/powerpc/boot/dts/p1025twr.dtsi
new file mode 100644
index 000000000000..8453501c256e
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1025twr.dtsi
@@ -0,0 +1,280 @@
1/*
2 * P1025 TWR Device Tree Source stub (no addresses or top-level ranges)
3 *
4 * Copyright 2013 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/{
36 aliases {
37 ethernet3 = &enet3;
38 ethernet4 = &enet4;
39 };
40};
41
42&lbc {
43 nor@0,0 {
44 #address-cells = <1>;
45 #size-cells = <1>;
46 compatible = "cfi-flash";
47 reg = <0x0 0x0 0x4000000>;
48 bank-width = <2>;
49 device-width = <1>;
50
51 partition@0 {
52 /* This location must not be altered */
53 /* 256KB for Vitesse 7385 Switch firmware */
54 reg = <0x0 0x00040000>;
55 label = "NOR Vitesse-7385 Firmware";
56 read-only;
57 };
58
59 partition@40000 {
60 /* 256KB for DTB Image */
61 reg = <0x00040000 0x00040000>;
62 label = "NOR DTB Image";
63 };
64
65 partition@80000 {
66 /* 5.5 MB for Linux Kernel Image */
67 reg = <0x00080000 0x00580000>;
68 label = "NOR Linux Kernel Image";
69 };
70
71 partition@400000 {
72 /* 56.75MB for Root file System */
73 reg = <0x00600000 0x038c0000>;
74 label = "NOR Root File System";
75 };
76
77 partition@ec0000 {
78 /* This location must not be altered */
79 /* 256KB for QE ucode firmware*/
80 reg = <0x03ec0000 0x00040000>;
81 label = "NOR QE microcode firmware";
82 read-only;
83 };
84
85 partition@f00000 {
86 /* This location must not be altered */
87 /* 512KB for u-boot Bootloader Image */
88 /* 512KB for u-boot Environment Variables */
89 reg = <0x03f00000 0x00100000>;
90 label = "NOR U-Boot Image";
91 read-only;
92 };
93 };
94
95 /* CS2 for Display */
96 display@2,0 {
97 compatible = "solomon,ssd1289fb";
98 reg = <0x2 0x0000 0x0004>;
99 };
100
101};
102
103&soc {
104 usb@22000 {
105 phy_type = "ulpi";
106 };
107
108 mdio@24000 {
109 phy0: ethernet-phy@2 {
110 interrupt-parent = <&mpic>;
111 interrupts = <1 1 0 0>;
112 reg = <0x2>;
113 };
114
115 phy1: ethernet-phy@1 {
116 interrupt-parent = <&mpic>;
117 interrupts = <2 1 0 0>;
118 reg = <0x1>;
119 };
120
121 tbi0: tbi-phy@11 {
122 reg = <0x11>;
123 device_type = "tbi-phy";
124 };
125 };
126
127 mdio@25000 {
128 tbi1: tbi-phy@11 {
129 reg = <0x11>;
130 device_type = "tbi-phy";
131 };
132 };
133
134 mdio@26000 {
135 tbi2: tbi-phy@11 {
136 reg = <0x11>;
137 device_type = "tbi-phy";
138 };
139 };
140
141 enet0: ethernet@b0000 {
142 phy-handle = <&phy0>;
143 phy-connection-type = "rgmii-id";
144
145 };
146
147 enet1: ethernet@b1000 {
148 status = "disabled";
149 };
150
151 enet2: ethernet@b2000 {
152 phy-handle = <&phy1>;
153 phy-connection-type = "rgmii-id";
154 };
155
156 par_io@e0100 {
157 #address-cells = <1>;
158 #size-cells = <1>;
159 reg = <0xe0100 0x60>;
160 ranges = <0x0 0xe0100 0x60>;
161 device_type = "par_io";
162 num-ports = <3>;
163 pio1: ucc_pin@01 {
164 pio-map = <
165 /* port pin dir open_drain assignment has_irq */
166 0x1 0x13 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */
167 0x1 0x14 0x3 0x0 0x1 0x0 /* QE_MUX_MDIO */
168 0x0 0x17 0x2 0x0 0x2 0x0 /* CLK12 */
169 0x0 0x18 0x2 0x0 0x1 0x0 /* CLK9 */
170 0x0 0x7 0x1 0x0 0x2 0x0 /* ENET1_TXD0_SER1_TXD0 */
171 0x0 0x9 0x1 0x0 0x2 0x0 /* ENET1_TXD1_SER1_TXD1 */
172 0x0 0xb 0x1 0x0 0x2 0x0 /* ENET1_TXD2_SER1_TXD2 */
173 0x0 0xc 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */
174 0x0 0x6 0x2 0x0 0x2 0x0 /* ENET1_RXD0_SER1_RXD0 */
175 0x0 0xa 0x2 0x0 0x2 0x0 /* ENET1_RXD1_SER1_RXD1 */
176 0x0 0xe 0x2 0x0 0x2 0x0 /* ENET1_RXD2_SER1_RXD2 */
177 0x0 0xf 0x2 0x0 0x2 0x0 /* ENET1_RXD3_SER1_RXD3 */
178 0x0 0x5 0x1 0x0 0x2 0x0 /* ENET1_TX_EN_SER1_RTS_B */
179 0x0 0xd 0x1 0x0 0x2 0x0 /* ENET1_TX_ER */
180 0x0 0x4 0x2 0x0 0x2 0x0 /* ENET1_RX_DV_SER1_CTS_B */
181 0x0 0x8 0x2 0x0 0x2 0x0 /* ENET1_RX_ER_SER1_CD_B */
182 0x0 0x11 0x2 0x0 0x2 0x0 /* ENET1_CRS */
183 0x0 0x10 0x2 0x0 0x2 0x0>; /* ENET1_COL */
184 };
185
186 pio2: ucc_pin@02 {
187 pio-map = <
188 /* port pin dir open_drain assignment has_irq */
189 0x1 0x13 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */
190 0x1 0x14 0x3 0x0 0x1 0x0 /* QE_MUX_MDIO */
191 0x1 0xb 0x2 0x0 0x1 0x0 /* CLK13 */
192 0x1 0x7 0x1 0x0 0x2 0x0 /* ENET5_TXD0_SER5_TXD0 */
193 0x1 0xa 0x1 0x0 0x2 0x0 /* ENET5_TXD1_SER5_TXD1 */
194 0x1 0x6 0x2 0x0 0x2 0x0 /* ENET5_RXD0_SER5_RXD0 */
195 0x1 0x9 0x2 0x0 0x2 0x0 /* ENET5_RXD1_SER5_RXD1 */
196 0x1 0x5 0x1 0x0 0x2 0x0 /* ENET5_TX_EN_SER5_RTS_B */
197 0x1 0x4 0x2 0x0 0x2 0x0 /* ENET5_RX_DV_SER5_CTS_B */
198 0x1 0x8 0x2 0x0 0x2 0x0>; /* ENET5_RX_ER_SER5_CD_B */
199 };
200
201 pio3: ucc_pin@03 {
202 pio-map = <
203 /* port pin dir open_drain assignment has_irq */
204 0x0 0x16 0x2 0x0 0x2 0x0 /* SER7_CD_B*/
205 0x0 0x12 0x2 0x0 0x2 0x0 /* SER7_CTS_B*/
206 0x0 0x13 0x1 0x0 0x2 0x0 /* SER7_RTS_B*/
207 0x0 0x14 0x2 0x0 0x2 0x0 /* SER7_RXD0*/
208 0x0 0x15 0x1 0x0 0x2 0x0>; /* SER7_TXD0*/
209 };
210
211 pio4: ucc_pin@04 {
212 pio-map = <
213 /* port pin dir open_drain assignment has_irq */
214 0x1 0x0 0x2 0x0 0x2 0x0 /* SER3_CD_B*/
215 0x0 0x1c 0x2 0x0 0x2 0x0 /* SER3_CTS_B*/
216 0x0 0x1d 0x1 0x0 0x2 0x0 /* SER3_RTS_B*/
217 0x0 0x1e 0x2 0x0 0x2 0x0 /* SER3_RXD0*/
218 0x0 0x1f 0x1 0x0 0x2 0x0>; /* SER3_TXD0*/
219 };
220 };
221};
222
223&qe {
224 enet3: ucc@2000 {
225 device_type = "network";
226 compatible = "ucc_geth";
227 rx-clock-name = "clk12";
228 tx-clock-name = "clk9";
229 pio-handle = <&pio1>;
230 phy-handle = <&qe_phy0>;
231 phy-connection-type = "mii";
232 };
233
234 mdio@2120 {
235 qe_phy0: ethernet-phy@18 {
236 interrupt-parent = <&mpic>;
237 interrupts = <4 1 0 0>;
238 reg = <0x18>;
239 device_type = "ethernet-phy";
240 };
241 qe_phy1: ethernet-phy@19 {
242 interrupt-parent = <&mpic>;
243 interrupts = <5 1 0 0>;
244 reg = <0x19>;
245 device_type = "ethernet-phy";
246 };
247 tbi-phy@11 {
248 reg = <0x11>;
249 device_type = "tbi-phy";
250 };
251 };
252
253 enet4: ucc@2400 {
254 device_type = "network";
255 compatible = "ucc_geth";
256 rx-clock-name = "none";
257 tx-clock-name = "clk13";
258 pio-handle = <&pio2>;
259 phy-handle = <&qe_phy1>;
260 phy-connection-type = "rmii";
261 };
262
263 serial2: ucc@2600 {
264 device_type = "serial";
265 compatible = "ucc_uart";
266 port-number = <0>;
267 rx-clock-name = "brg6";
268 tx-clock-name = "brg6";
269 pio-handle = <&pio3>;
270 };
271
272 serial3: ucc@2200 {
273 device_type = "serial";
274 compatible = "ucc_uart";
275 port-number = <1>;
276 rx-clock-name = "brg2";
277 tx-clock-name = "brg2";
278 pio-handle = <&pio4>;
279 };
280};
diff --git a/arch/powerpc/boot/dts/virtex440-ml507.dts b/arch/powerpc/boot/dts/virtex440-ml507.dts
index fc7073bc547e..391a4e299783 100644
--- a/arch/powerpc/boot/dts/virtex440-ml507.dts
+++ b/arch/powerpc/boot/dts/virtex440-ml507.dts
@@ -257,6 +257,8 @@
257 #size-cells = <1>; 257 #size-cells = <1>;
258 compatible = "xlnx,compound"; 258 compatible = "xlnx,compound";
259 ethernet@81c00000 { 259 ethernet@81c00000 {
260 #address-cells = <1>;
261 #size-cells = <0>;
260 compatible = "xlnx,xps-ll-temac-1.01.b"; 262 compatible = "xlnx,xps-ll-temac-1.01.b";
261 device_type = "network"; 263 device_type = "network";
262 interrupt-parent = <&xps_intc_0>; 264 interrupt-parent = <&xps_intc_0>;
diff --git a/arch/powerpc/boot/mvme5100.c b/arch/powerpc/boot/mvme5100.c
new file mode 100644
index 000000000000..cb865f83c60b
--- /dev/null
+++ b/arch/powerpc/boot/mvme5100.c
@@ -0,0 +1,27 @@
1/*
2 * Motorola/Emerson MVME5100 with PPCBug firmware.
3 *
4 * Author: Stephen Chivers <schivers@csc.com>
5 *
6 * Copyright 2013 CSC Australia Pty. Ltd.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 */
13#include "types.h"
14#include "ops.h"
15#include "io.h"
16
17BSS_STACK(4096);
18
19void platform_init(unsigned long r3, unsigned long r4, unsigned long r5)
20{
21 u32 heapsize;
22
23 heapsize = 0x8000000 - (u32)_end; /* 128M */
24 simple_alloc_init(_end, heapsize, 32, 64);
25 fdt_init(_dtb_start);
26 serial_console_init();
27}
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index 2e1af74a64be..d27a25518b01 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -265,6 +265,10 @@ epapr)
265 link_address='0x20000000' 265 link_address='0x20000000'
266 pie=-pie 266 pie=-pie
267 ;; 267 ;;
268mvme5100)
269 platformo="$object/fixed-head.o $object/mvme5100.o"
270 binary=y
271 ;;
268esac 272esac
269 273
270vmz="$tmpdir/`basename \"$kernel\"`.$ext" 274vmz="$tmpdir/`basename \"$kernel\"`.$ext"