3 files changed, 10 insertions, 3 deletions

diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index ae08761ffff1..d665e767822a 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -411,7 +411,7 @@
                         0xe000 0 0 1 &i8259 12 2
                         0xe100 0 0 2 &i8259 9 2
                         0xe200 0 0 3 &i8259 10 2
-                        0xe300 0 0 4 &i8259 112
+                        0xe300 0 0 4 &i8259 11 2
 
                         // IDSEL 0x1d  Audio
                         0xe800 0 0 1 &i8259 6 2
diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
index 64d2d5bbcdf1..4199e89b4e50 100644
--- a/arch/powerpc/boot/dts/tqm8548-bigflash.dts
+++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
@@ -50,13 +50,14 @@
                 reg = <0x00000000 0x00000000>;  // Filled in by U-Boot
         };
 
-        soc8548@a0000000 {
+        soc@a0000000 {
                 #address-cells = <1>;
                 #size-cells = <1>;
                 device_type = "soc";
                 ranges = <0x0 0xa0000000 0x100000>;
                 reg = <0xa0000000 0x1000>;      // CCSRBAR
                 bus-frequency = <0>;
+                compatible = "fsl,mpc8548-immr", "simple-bus";
 
                 memory-controller@2000 {
                         compatible = "fsl,mpc8548-memory-controller";
@@ -83,6 +84,11 @@
                         interrupts = <43 2>;
                         interrupt-parent = <&mpic>;
                         dfsrr;
+
+                        rtc@68 {
+                                compatible = "dallas,ds1337";
+                                reg = <0x68>;
+                        };
                 };
 
                 i2c@3100 {
diff --git a/arch/powerpc/boot/dts/tqm8548.dts b/arch/powerpc/boot/dts/tqm8548.dts
index 2563112cabd3..58ee4185454b 100644
--- a/arch/powerpc/boot/dts/tqm8548.dts
+++ b/arch/powerpc/boot/dts/tqm8548.dts
@@ -50,13 +50,14 @@
                 reg = <0x00000000 0x00000000>;  // Filled in by U-Boot
         };
 
-        soc8548@e0000000 {
+        soc@e0000000 {
                 #address-cells = <1>;
                 #size-cells = <1>;
                 device_type = "soc";
                 ranges = <0x0 0xe0000000 0x100000>;
                 reg = <0xe0000000 0x1000>;      // CCSRBAR
                 bus-frequency = <0>;
+                compatible = "fsl,mpc8548-immr", "simple-bus";
 
                 memory-controller@2000 {
                         compatible = "fsl,mpc8548-memory-controller";