aboutsummaryrefslogtreecommitdiffstats
path: root/arch/powerpc/boot/dts
diff options
context:
space:
mode:
Diffstat (limited to 'arch/powerpc/boot/dts')
-rw-r--r--arch/powerpc/boot/dts/fsl/e500mc_power_isa.dtsi58
-rw-r--r--arch/powerpc/boot/dts/fsl/e500v2_power_isa.dtsi52
-rw-r--r--arch/powerpc/boot/dts/fsl/e5500_power_isa.dtsi59
-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi3
-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8544si-pre.dtsi3
-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi3
-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8568si-pre.dtsi3
-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8569si-pre.dtsi3
-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8572si-pre.dtsi3
-rw-r--r--arch/powerpc/boot/dts/fsl/p1010si-pre.dtsi3
-rw-r--r--arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi3
-rw-r--r--arch/powerpc/boot/dts/fsl/p1021si-pre.dtsi3
-rw-r--r--arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi3
-rw-r--r--arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi3
-rw-r--r--arch/powerpc/boot/dts/fsl/p2020si-pre.dtsi3
-rw-r--r--arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi3
-rw-r--r--arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi3
-rw-r--r--arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi3
-rw-r--r--arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi3
-rw-r--r--arch/powerpc/boot/dts/fsl/p5040si-post.dtsi320
-rw-r--r--arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi114
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-sec5.2-0.dtsi118
-rw-r--r--arch/powerpc/boot/dts/mpc8536ds.dtsi4
-rw-r--r--arch/powerpc/boot/dts/mpc8540ads.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc8541cds.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc8544ds.dts4
-rw-r--r--arch/powerpc/boot/dts/mpc8544ds.dtsi39
-rw-r--r--arch/powerpc/boot/dts/mpc8555cds.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc8560ads.dts2
-rw-r--r--arch/powerpc/boot/dts/o2d.dts47
-rw-r--r--arch/powerpc/boot/dts/o2d.dtsi139
-rw-r--r--arch/powerpc/boot/dts/o2d300.dts52
-rw-r--r--arch/powerpc/boot/dts/o2dnt2.dts48
-rw-r--r--arch/powerpc/boot/dts/o2i.dts33
-rw-r--r--arch/powerpc/boot/dts/o2mnt.dts33
-rw-r--r--arch/powerpc/boot/dts/o3dnt.dts48
-rw-r--r--arch/powerpc/boot/dts/p1020rdb_camp_core0.dts63
-rw-r--r--arch/powerpc/boot/dts/p1020rdb_camp_core1.dts141
-rw-r--r--arch/powerpc/boot/dts/p1022ds.dtsi4
-rw-r--r--arch/powerpc/boot/dts/p1022rdk.dts188
-rw-r--r--arch/powerpc/boot/dts/p2020rdb_camp_core0.dts67
-rw-r--r--arch/powerpc/boot/dts/p2020rdb_camp_core1.dts125
-rw-r--r--arch/powerpc/boot/dts/p2041rdb.dts4
-rw-r--r--arch/powerpc/boot/dts/p3041ds.dts4
-rw-r--r--arch/powerpc/boot/dts/p4080ds.dts4
-rw-r--r--arch/powerpc/boot/dts/p5020ds.dts4
-rw-r--r--arch/powerpc/boot/dts/p5040ds.dts207
47 files changed, 1638 insertions, 397 deletions
diff --git a/arch/powerpc/boot/dts/fsl/e500mc_power_isa.dtsi b/arch/powerpc/boot/dts/fsl/e500mc_power_isa.dtsi
new file mode 100644
index 000000000000..870c6535a053
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/e500mc_power_isa.dtsi
@@ -0,0 +1,58 @@
1/*
2 * e500mc Power ISA Device Tree Source (include)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/ {
36 cpus {
37 power-isa-version = "2.06";
38 power-isa-b; // Base
39 power-isa-e; // Embedded
40 power-isa-atb; // Alternate Time Base
41 power-isa-cs; // Cache Specification
42 power-isa-ds; // Decorated Storage
43 power-isa-e.ed; // Embedded.Enhanced Debug
44 power-isa-e.pd; // Embedded.External PID
45 power-isa-e.hv; // Embedded.Hypervisor
46 power-isa-e.le; // Embedded.Little-Endian
47 power-isa-e.pm; // Embedded.Performance Monitor
48 power-isa-e.pc; // Embedded.Processor Control
49 power-isa-ecl; // Embedded Cache Locking
50 power-isa-exp; // External Proxy
51 power-isa-fp; // Floating Point
52 power-isa-fp.r; // Floating Point.Record
53 power-isa-mmc; // Memory Coherence
54 power-isa-scpm; // Store Conditional Page Mobility
55 power-isa-wt; // Wait
56 mmu-type = "power-embedded";
57 };
58};
diff --git a/arch/powerpc/boot/dts/fsl/e500v2_power_isa.dtsi b/arch/powerpc/boot/dts/fsl/e500v2_power_isa.dtsi
new file mode 100644
index 000000000000..f4928144d2c8
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/e500v2_power_isa.dtsi
@@ -0,0 +1,52 @@
1/*
2 * e500v2 Power ISA Device Tree Source (include)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/ {
36 cpus {
37 power-isa-version = "2.03";
38 power-isa-b; // Base
39 power-isa-e; // Embedded
40 power-isa-atb; // Alternate Time Base
41 power-isa-cs; // Cache Specification
42 power-isa-e.le; // Embedded.Little-Endian
43 power-isa-e.pm; // Embedded.Performance Monitor
44 power-isa-ecl; // Embedded Cache Locking
45 power-isa-mmc; // Memory Coherence
46 power-isa-sp; // Signal Processing Engine
47 power-isa-sp.fd; // SPE.Embedded Float Scalar Double
48 power-isa-sp.fs; // SPE.Embedded Float Scalar Single
49 power-isa-sp.fv; // SPE.Embedded Float Vector
50 mmu-type = "power-embedded";
51 };
52};
diff --git a/arch/powerpc/boot/dts/fsl/e5500_power_isa.dtsi b/arch/powerpc/boot/dts/fsl/e5500_power_isa.dtsi
new file mode 100644
index 000000000000..3230212f7ad5
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/e5500_power_isa.dtsi
@@ -0,0 +1,59 @@
1/*
2 * e5500 Power ISA Device Tree Source (include)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/ {
36 cpus {
37 power-isa-version = "2.06";
38 power-isa-b; // Base
39 power-isa-e; // Embedded
40 power-isa-atb; // Alternate Time Base
41 power-isa-cs; // Cache Specification
42 power-isa-ds; // Decorated Storage
43 power-isa-e.ed; // Embedded.Enhanced Debug
44 power-isa-e.pd; // Embedded.External PID
45 power-isa-e.hv; // Embedded.Hypervisor
46 power-isa-e.le; // Embedded.Little-Endian
47 power-isa-e.pm; // Embedded.Performance Monitor
48 power-isa-e.pc; // Embedded.Processor Control
49 power-isa-ecl; // Embedded Cache Locking
50 power-isa-exp; // External Proxy
51 power-isa-fp; // Floating Point
52 power-isa-fp.r; // Floating Point.Record
53 power-isa-mmc; // Memory Coherence
54 power-isa-scpm; // Store Conditional Page Mobility
55 power-isa-wt; // Wait
56 power-isa-64; // 64-bit
57 mmu-type = "power-embedded";
58 };
59};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi b/arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi
index 7de45a784df6..152906f98a0f 100644
--- a/arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi
@@ -33,6 +33,9 @@
33 */ 33 */
34 34
35/dts-v1/; 35/dts-v1/;
36
37/include/ "e500v2_power_isa.dtsi"
38
36/ { 39/ {
37 compatible = "fsl,MPC8536"; 40 compatible = "fsl,MPC8536";
38 #address-cells = <2>; 41 #address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/fsl/mpc8544si-pre.dtsi b/arch/powerpc/boot/dts/fsl/mpc8544si-pre.dtsi
index 8777f9239d9e..5a69bafb652a 100644
--- a/arch/powerpc/boot/dts/fsl/mpc8544si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/mpc8544si-pre.dtsi
@@ -33,6 +33,9 @@
33 */ 33 */
34 34
35/dts-v1/; 35/dts-v1/;
36
37/include/ "e500v2_power_isa.dtsi"
38
36/ { 39/ {
37 compatible = "fsl,MPC8544"; 40 compatible = "fsl,MPC8544";
38 #address-cells = <2>; 41 #address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi b/arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi
index 720422d83529..fc1ce977422b 100644
--- a/arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi
@@ -33,6 +33,9 @@
33 */ 33 */
34 34
35/dts-v1/; 35/dts-v1/;
36
37/include/ "e500v2_power_isa.dtsi"
38
36/ { 39/ {
37 compatible = "fsl,MPC8548"; 40 compatible = "fsl,MPC8548";
38 #address-cells = <2>; 41 #address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/fsl/mpc8568si-pre.dtsi b/arch/powerpc/boot/dts/fsl/mpc8568si-pre.dtsi
index eacd62c5fe6c..122ca3bd0b03 100644
--- a/arch/powerpc/boot/dts/fsl/mpc8568si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/mpc8568si-pre.dtsi
@@ -33,6 +33,9 @@
33 */ 33 */
34 34
35/dts-v1/; 35/dts-v1/;
36
37/include/ "e500v2_power_isa.dtsi"
38
36/ { 39/ {
37 compatible = "fsl,MPC8568"; 40 compatible = "fsl,MPC8568";
38 #address-cells = <2>; 41 #address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/fsl/mpc8569si-pre.dtsi b/arch/powerpc/boot/dts/fsl/mpc8569si-pre.dtsi
index b07064d11930..2cd15a2a0422 100644
--- a/arch/powerpc/boot/dts/fsl/mpc8569si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/mpc8569si-pre.dtsi
@@ -33,6 +33,9 @@
33 */ 33 */
34 34
35/dts-v1/; 35/dts-v1/;
36
37/include/ "e500v2_power_isa.dtsi"
38
36/ { 39/ {
37 compatible = "fsl,MPC8569"; 40 compatible = "fsl,MPC8569";
38 #address-cells = <2>; 41 #address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/fsl/mpc8572si-pre.dtsi b/arch/powerpc/boot/dts/fsl/mpc8572si-pre.dtsi
index ca188326c2ca..28c2a862be96 100644
--- a/arch/powerpc/boot/dts/fsl/mpc8572si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/mpc8572si-pre.dtsi
@@ -33,6 +33,9 @@
33 */ 33 */
34 34
35/dts-v1/; 35/dts-v1/;
36
37/include/ "e500v2_power_isa.dtsi"
38
36/ { 39/ {
37 compatible = "fsl,MPC8572"; 40 compatible = "fsl,MPC8572";
38 #address-cells = <2>; 41 #address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/fsl/p1010si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p1010si-pre.dtsi
index 7354a8f90ea5..6e76f9b282a1 100644
--- a/arch/powerpc/boot/dts/fsl/p1010si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1010si-pre.dtsi
@@ -33,6 +33,9 @@
33 */ 33 */
34 34
35/dts-v1/; 35/dts-v1/;
36
37/include/ "e500v2_power_isa.dtsi"
38
36/ { 39/ {
37 compatible = "fsl,P1010"; 40 compatible = "fsl,P1010";
38 #address-cells = <2>; 41 #address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi
index 6f0376e554eb..fed9c4c8d962 100644
--- a/arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi
@@ -33,6 +33,9 @@
33 */ 33 */
34 34
35/dts-v1/; 35/dts-v1/;
36
37/include/ "e500v2_power_isa.dtsi"
38
36/ { 39/ {
37 compatible = "fsl,P1020"; 40 compatible = "fsl,P1020";
38 #address-cells = <2>; 41 #address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/fsl/p1021si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p1021si-pre.dtsi
index 4abd54bc3308..36161b500176 100644
--- a/arch/powerpc/boot/dts/fsl/p1021si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1021si-pre.dtsi
@@ -33,6 +33,9 @@
33 */ 33 */
34 34
35/dts-v1/; 35/dts-v1/;
36
37/include/ "e500v2_power_isa.dtsi"
38
36/ { 39/ {
37 compatible = "fsl,P1021"; 40 compatible = "fsl,P1021";
38 #address-cells = <2>; 41 #address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi
index e930f4f7ca89..1956dea040cc 100644
--- a/arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi
@@ -33,6 +33,9 @@
33 */ 33 */
34 34
35/dts-v1/; 35/dts-v1/;
36
37/include/ "e500v2_power_isa.dtsi"
38
36/ { 39/ {
37 compatible = "fsl,P1022"; 40 compatible = "fsl,P1022";
38 #address-cells = <2>; 41 #address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi
index ac45f6d93385..132a1521921a 100644
--- a/arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi
@@ -33,6 +33,9 @@
33 */ 33 */
34 34
35/dts-v1/; 35/dts-v1/;
36
37/include/ "e500v2_power_isa.dtsi"
38
36/ { 39/ {
37 compatible = "fsl,P1023"; 40 compatible = "fsl,P1023";
38 #address-cells = <2>; 41 #address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/fsl/p2020si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p2020si-pre.dtsi
index 3213288641d1..42bf3c6d25ca 100644
--- a/arch/powerpc/boot/dts/fsl/p2020si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2020si-pre.dtsi
@@ -33,6 +33,9 @@
33 */ 33 */
34 34
35/dts-v1/; 35/dts-v1/;
36
37/include/ "e500v2_power_isa.dtsi"
38
36/ { 39/ {
37 compatible = "fsl,P2020"; 40 compatible = "fsl,P2020";
38 #address-cells = <2>; 41 #address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
index 2d0a40d6b10f..7a2697d04549 100644
--- a/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
@@ -33,6 +33,9 @@
33 */ 33 */
34 34
35/dts-v1/; 35/dts-v1/;
36
37/include/ "e500mc_power_isa.dtsi"
38
36/ { 39/ {
37 compatible = "fsl,P2041"; 40 compatible = "fsl,P2041";
38 #address-cells = <2>; 41 #address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
index 136def3536b6..c9ca2c305cfe 100644
--- a/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
@@ -33,6 +33,9 @@
33 */ 33 */
34 34
35/dts-v1/; 35/dts-v1/;
36
37/include/ "e500mc_power_isa.dtsi"
38
36/ { 39/ {
37 compatible = "fsl,P3041"; 40 compatible = "fsl,P3041";
38 #address-cells = <2>; 41 #address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
index b9556ee3a639..493d9a056b5c 100644
--- a/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
@@ -33,6 +33,9 @@
33 */ 33 */
34 34
35/dts-v1/; 35/dts-v1/;
36
37/include/ "e500mc_power_isa.dtsi"
38
36/ { 39/ {
37 compatible = "fsl,P4080"; 40 compatible = "fsl,P4080";
38 #address-cells = <2>; 41 #address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
index ae823a47584e..0a198b0a77e5 100644
--- a/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
@@ -33,6 +33,9 @@
33 */ 33 */
34 34
35/dts-v1/; 35/dts-v1/;
36
37/include/ "e5500_power_isa.dtsi"
38
36/ { 39/ {
37 compatible = "fsl,P5020"; 40 compatible = "fsl,P5020";
38 #address-cells = <2>; 41 #address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
new file mode 100644
index 000000000000..db2c9a7b3a0e
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
@@ -0,0 +1,320 @@
1/*
2 * P5040 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * This software is provided by Freescale Semiconductor "as is" and any
24 * express or implied warranties, including, but not limited to, the implied
25 * warranties of merchantability and fitness for a particular purpose are
26 * disclaimed. In no event shall Freescale Semiconductor be liable for any
27 * direct, indirect, incidental, special, exemplary, or consequential damages
28 * (including, but not limited to, procurement of substitute goods or services;
29 * loss of use, data, or profits; or business interruption) however caused and
30 * on any theory of liability, whether in contract, strict liability, or tort
31 * (including negligence or otherwise) arising in any way out of the use of this
32 * software, even if advised of the possibility of such damage.
33 */
34
35&lbc {
36 compatible = "fsl,p5040-elbc", "fsl,elbc", "simple-bus";
37 interrupts = <25 2 0 0>;
38 #address-cells = <2>;
39 #size-cells = <1>;
40};
41
42/* controller at 0x200000 */
43&pci0 {
44 compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4";
45 device_type = "pci";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0x0 0xff>;
49 clock-frequency = <33333333>;
50 interrupts = <16 2 1 15>;
51 pcie@0 {
52 reg = <0 0 0 0 0>;
53 #interrupt-cells = <1>;
54 #size-cells = <2>;
55 #address-cells = <3>;
56 device_type = "pci";
57 interrupts = <16 2 1 15>;
58 interrupt-map-mask = <0xf800 0 0 7>;
59 interrupt-map = <
60 /* IDSEL 0x0 */
61 0000 0 0 1 &mpic 40 1 0 0
62 0000 0 0 2 &mpic 1 1 0 0
63 0000 0 0 3 &mpic 2 1 0 0
64 0000 0 0 4 &mpic 3 1 0 0
65 >;
66 };
67};
68
69/* controller at 0x201000 */
70&pci1 {
71 compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4";
72 device_type = "pci";
73 #size-cells = <2>;
74 #address-cells = <3>;
75 bus-range = <0 0xff>;
76 clock-frequency = <33333333>;
77 interrupts = <16 2 1 14>;
78 pcie@0 {
79 reg = <0 0 0 0 0>;
80 #interrupt-cells = <1>;
81 #size-cells = <2>;
82 #address-cells = <3>;
83 device_type = "pci";
84 interrupts = <16 2 1 14>;
85 interrupt-map-mask = <0xf800 0 0 7>;
86 interrupt-map = <
87 /* IDSEL 0x0 */
88 0000 0 0 1 &mpic 41 1 0 0
89 0000 0 0 2 &mpic 5 1 0 0
90 0000 0 0 3 &mpic 6 1 0 0
91 0000 0 0 4 &mpic 7 1 0 0
92 >;
93 };
94};
95
96/* controller at 0x202000 */
97&pci2 {
98 compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4";
99 device_type = "pci";
100 #size-cells = <2>;
101 #address-cells = <3>;
102 bus-range = <0x0 0xff>;
103 clock-frequency = <33333333>;
104 interrupts = <16 2 1 13>;
105 pcie@0 {
106 reg = <0 0 0 0 0>;
107 #interrupt-cells = <1>;
108 #size-cells = <2>;
109 #address-cells = <3>;
110 device_type = "pci";
111 interrupts = <16 2 1 13>;
112 interrupt-map-mask = <0xf800 0 0 7>;
113 interrupt-map = <
114 /* IDSEL 0x0 */
115 0000 0 0 1 &mpic 42 1 0 0
116 0000 0 0 2 &mpic 9 1 0 0
117 0000 0 0 3 &mpic 10 1 0 0
118 0000 0 0 4 &mpic 11 1 0 0
119 >;
120 };
121};
122
123&dcsr {
124 #address-cells = <1>;
125 #size-cells = <1>;
126 compatible = "fsl,dcsr", "simple-bus";
127
128 dcsr-epu@0 {
129 compatible = "fsl,dcsr-epu";
130 interrupts = <52 2 0 0
131 84 2 0 0
132 85 2 0 0>;
133 reg = <0x0 0x1000>;
134 };
135 dcsr-npc {
136 compatible = "fsl,dcsr-npc";
137 reg = <0x1000 0x1000 0x1000000 0x8000>;
138 };
139 dcsr-nxc@2000 {
140 compatible = "fsl,dcsr-nxc";
141 reg = <0x2000 0x1000>;
142 };
143 dcsr-corenet {
144 compatible = "fsl,dcsr-corenet";
145 reg = <0x8000 0x1000 0xB0000 0x1000>;
146 };
147 dcsr-dpaa@9000 {
148 compatible = "fsl,p5040-dcsr-dpaa", "fsl,dcsr-dpaa";
149 reg = <0x9000 0x1000>;
150 };
151 dcsr-ocn@11000 {
152 compatible = "fsl,p5040-dcsr-ocn", "fsl,dcsr-ocn";
153 reg = <0x11000 0x1000>;
154 };
155 dcsr-ddr@12000 {
156 compatible = "fsl,dcsr-ddr";
157 dev-handle = <&ddr1>;
158 reg = <0x12000 0x1000>;
159 };
160 dcsr-ddr@13000 {
161 compatible = "fsl,dcsr-ddr";
162 dev-handle = <&ddr2>;
163 reg = <0x13000 0x1000>;
164 };
165 dcsr-nal@18000 {
166 compatible = "fsl,p5040-dcsr-nal", "fsl,dcsr-nal";
167 reg = <0x18000 0x1000>;
168 };
169 dcsr-rcpm@22000 {
170 compatible = "fsl,p5040-dcsr-rcpm", "fsl,dcsr-rcpm";
171 reg = <0x22000 0x1000>;
172 };
173 dcsr-cpu-sb-proxy@40000 {
174 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
175 cpu-handle = <&cpu0>;
176 reg = <0x40000 0x1000>;
177 };
178 dcsr-cpu-sb-proxy@41000 {
179 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
180 cpu-handle = <&cpu1>;
181 reg = <0x41000 0x1000>;
182 };
183 dcsr-cpu-sb-proxy@42000 {
184 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
185 cpu-handle = <&cpu2>;
186 reg = <0x42000 0x1000>;
187 };
188 dcsr-cpu-sb-proxy@43000 {
189 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
190 cpu-handle = <&cpu3>;
191 reg = <0x43000 0x1000>;
192 };
193};
194
195&soc {
196 #address-cells = <1>;
197 #size-cells = <1>;
198 device_type = "soc";
199 compatible = "simple-bus";
200
201 soc-sram-error {
202 compatible = "fsl,soc-sram-error";
203 interrupts = <16 2 1 29>;
204 };
205
206 corenet-law@0 {
207 compatible = "fsl,corenet-law";
208 reg = <0x0 0x1000>;
209 fsl,num-laws = <32>;
210 };
211
212 ddr1: memory-controller@8000 {
213 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
214 reg = <0x8000 0x1000>;
215 interrupts = <16 2 1 23>;
216 };
217
218 ddr2: memory-controller@9000 {
219 compatible = "fsl,qoriq-memory-controller-v4.5","fsl,qoriq-memory-controller";
220 reg = <0x9000 0x1000>;
221 interrupts = <16 2 1 22>;
222 };
223
224 cpc: l3-cache-controller@10000 {
225 compatible = "fsl,p5040-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
226 reg = <0x10000 0x1000
227 0x11000 0x1000>;
228 interrupts = <16 2 1 27
229 16 2 1 26>;
230 };
231
232 corenet-cf@18000 {
233 compatible = "fsl,corenet-cf";
234 reg = <0x18000 0x1000>;
235 interrupts = <16 2 1 31>;
236 fsl,ccf-num-csdids = <32>;
237 fsl,ccf-num-snoopids = <32>;
238 };
239
240 iommu@20000 {
241 compatible = "fsl,pamu-v1.0", "fsl,pamu";
242 reg = <0x20000 0x5000>;
243 interrupts = <
244 24 2 0 0
245 16 2 1 30>;
246 };
247
248/include/ "qoriq-mpic.dtsi"
249
250 guts: global-utilities@e0000 {
251 compatible = "fsl,p5040-device-config", "fsl,qoriq-device-config-1.0";
252 reg = <0xe0000 0xe00>;
253 fsl,has-rstcr;
254 #sleep-cells = <1>;
255 fsl,liodn-bits = <12>;
256 };
257
258 pins: global-utilities@e0e00 {
259 compatible = "fsl,p5040-pin-control", "fsl,qoriq-pin-control-1.0";
260 reg = <0xe0e00 0x200>;
261 #sleep-cells = <2>;
262 };
263
264 clockgen: global-utilities@e1000 {
265 compatible = "fsl,p5040-clockgen", "fsl,qoriq-clockgen-1.0";
266 reg = <0xe1000 0x1000>;
267 clock-frequency = <0>;
268 };
269
270 rcpm: global-utilities@e2000 {
271 compatible = "fsl,p5040-rcpm", "fsl,qoriq-rcpm-1.0";
272 reg = <0xe2000 0x1000>;
273 #sleep-cells = <1>;
274 };
275
276 sfp: sfp@e8000 {
277 compatible = "fsl,p5040-sfp", "fsl,qoriq-sfp-1.0";
278 reg = <0xe8000 0x1000>;
279 };
280
281 serdes: serdes@ea000 {
282 compatible = "fsl,p5040-serdes";
283 reg = <0xea000 0x1000>;
284 };
285
286/include/ "qoriq-dma-0.dtsi"
287/include/ "qoriq-dma-1.dtsi"
288/include/ "qoriq-espi-0.dtsi"
289 spi@110000 {
290 fsl,espi-num-chipselects = <4>;
291 };
292
293/include/ "qoriq-esdhc-0.dtsi"
294 sdhc@114000 {
295 sdhci,auto-cmd12;
296 };
297
298/include/ "qoriq-i2c-0.dtsi"
299/include/ "qoriq-i2c-1.dtsi"
300/include/ "qoriq-duart-0.dtsi"
301/include/ "qoriq-duart-1.dtsi"
302/include/ "qoriq-gpio-0.dtsi"
303/include/ "qoriq-usb2-mph-0.dtsi"
304 usb0: usb@210000 {
305 compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
306 phy_type = "utmi";
307 port0;
308 };
309
310/include/ "qoriq-usb2-dr-0.dtsi"
311 usb1: usb@211000 {
312 compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
313 dr_mode = "host";
314 phy_type = "utmi";
315 };
316
317/include/ "qoriq-sata2-0.dtsi"
318/include/ "qoriq-sata2-1.dtsi"
319/include/ "qoriq-sec5.2-0.dtsi"
320};
diff --git a/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi
new file mode 100644
index 000000000000..40ca943f5d1c
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi
@@ -0,0 +1,114 @@
1/*
2 * P5040 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * This software is provided by Freescale Semiconductor "as is" and any
24 * express or implied warranties, including, but not limited to, the implied
25 * warranties of merchantability and fitness for a particular purpose are
26 * disclaimed. In no event shall Freescale Semiconductor be liable for any
27 * direct, indirect, incidental, special, exemplary, or consequential damages
28 * (including, but not limited to, procurement of substitute goods or services;
29 * loss of use, data, or profits; or business interruption) however caused and
30 * on any theory of liability, whether in contract, strict liability, or tort
31 * (including negligence or otherwise) arising in any way out of the use of this
32 * software, even if advised of the possibility of such damage.
33 */
34
35/dts-v1/;
36
37/include/ "e5500_power_isa.dtsi"
38
39/ {
40 compatible = "fsl,P5040";
41 #address-cells = <2>;
42 #size-cells = <2>;
43 interrupt-parent = <&mpic>;
44
45 aliases {
46 ccsr = &soc;
47 dcsr = &dcsr;
48
49 serial0 = &serial0;
50 serial1 = &serial1;
51 serial2 = &serial2;
52 serial3 = &serial3;
53 pci0 = &pci0;
54 pci1 = &pci1;
55 pci2 = &pci2;
56 usb0 = &usb0;
57 usb1 = &usb1;
58 dma0 = &dma0;
59 dma1 = &dma1;
60 sdhc = &sdhc;
61 msi0 = &msi0;
62 msi1 = &msi1;
63 msi2 = &msi2;
64
65 crypto = &crypto;
66 sec_jr0 = &sec_jr0;
67 sec_jr1 = &sec_jr1;
68 sec_jr2 = &sec_jr2;
69 sec_jr3 = &sec_jr3;
70 rtic_a = &rtic_a;
71 rtic_b = &rtic_b;
72 rtic_c = &rtic_c;
73 rtic_d = &rtic_d;
74 sec_mon = &sec_mon;
75 };
76
77 cpus {
78 #address-cells = <1>;
79 #size-cells = <0>;
80
81 cpu0: PowerPC,e5500@0 {
82 device_type = "cpu";
83 reg = <0>;
84 next-level-cache = <&L2_0>;
85 L2_0: l2-cache {
86 next-level-cache = <&cpc>;
87 };
88 };
89 cpu1: PowerPC,e5500@1 {
90 device_type = "cpu";
91 reg = <1>;
92 next-level-cache = <&L2_1>;
93 L2_1: l2-cache {
94 next-level-cache = <&cpc>;
95 };
96 };
97 cpu2: PowerPC,e5500@2 {
98 device_type = "cpu";
99 reg = <2>;
100 next-level-cache = <&L2_2>;
101 L2_2: l2-cache {
102 next-level-cache = <&cpc>;
103 };
104 };
105 cpu3: PowerPC,e5500@3 {
106 device_type = "cpu";
107 reg = <3>;
108 next-level-cache = <&L2_3>;
109 L2_3: l2-cache {
110 next-level-cache = <&cpc>;
111 };
112 };
113 };
114};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-sec5.2-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-sec5.2-0.dtsi
new file mode 100644
index 000000000000..7b2ab8a8c1f4
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-sec5.2-0.dtsi
@@ -0,0 +1,118 @@
1/*
2 * QorIQ Sec/Crypto 5.2 device tree stub [ controller @ offset 0x300000 ]
3 *
4 * Copyright 2011-2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35crypto: crypto@300000 {
36 compatible = "fsl,sec-v5.2", "fsl,sec-v5.0", "fsl,sec-v4.0";
37 #address-cells = <1>;
38 #size-cells = <1>;
39 reg = <0x300000 0x10000>;
40 ranges = <0 0x300000 0x10000>;
41 interrupts = <92 2 0 0>;
42
43 sec_jr0: jr@1000 {
44 compatible = "fsl,sec-v5.2-job-ring",
45 "fsl,sec-v5.0-job-ring",
46 "fsl,sec-v4.0-job-ring";
47 reg = <0x1000 0x1000>;
48 interrupts = <88 2 0 0>;
49 };
50
51 sec_jr1: jr@2000 {
52 compatible = "fsl,sec-v5.2-job-ring",
53 "fsl,sec-v5.0-job-ring",
54 "fsl,sec-v4.0-job-ring";
55 reg = <0x2000 0x1000>;
56 interrupts = <89 2 0 0>;
57 };
58
59 sec_jr2: jr@3000 {
60 compatible = "fsl,sec-v5.2-job-ring",
61 "fsl,sec-v5.0-job-ring",
62 "fsl,sec-v4.0-job-ring";
63 reg = <0x3000 0x1000>;
64 interrupts = <90 2 0 0>;
65 };
66
67 sec_jr3: jr@4000 {
68 compatible = "fsl,sec-v5.2-job-ring",
69 "fsl,sec-v5.0-job-ring",
70 "fsl,sec-v4.0-job-ring";
71 reg = <0x4000 0x1000>;
72 interrupts = <91 2 0 0>;
73 };
74
75 rtic@6000 {
76 compatible = "fsl,sec-v5.2-rtic",
77 "fsl,sec-v5.0-rtic",
78 "fsl,sec-v4.0-rtic";
79 #address-cells = <1>;
80 #size-cells = <1>;
81 reg = <0x6000 0x100>;
82 ranges = <0x0 0x6100 0xe00>;
83
84 rtic_a: rtic-a@0 {
85 compatible = "fsl,sec-v5.2-rtic-memory",
86 "fsl,sec-v5.0-rtic-memory",
87 "fsl,sec-v4.0-rtic-memory";
88 reg = <0x00 0x20 0x100 0x80>;
89 };
90
91 rtic_b: rtic-b@20 {
92 compatible = "fsl,sec-v5.2-rtic-memory",
93 "fsl,sec-v5.0-rtic-memory",
94 "fsl,sec-v4.0-rtic-memory";
95 reg = <0x20 0x20 0x200 0x80>;
96 };
97
98 rtic_c: rtic-c@40 {
99 compatible = "fsl,sec-v5.2-rtic-memory",
100 "fsl,sec-v5.0-rtic-memory",
101 "fsl,sec-v4.0-rtic-memory";
102 reg = <0x40 0x20 0x300 0x80>;
103 };
104
105 rtic_d: rtic-d@60 {
106 compatible = "fsl,sec-v5.2-rtic-memory",
107 "fsl,sec-v5.0-rtic-memory",
108 "fsl,sec-v4.0-rtic-memory";
109 reg = <0x60 0x20 0x500 0x80>;
110 };
111 };
112};
113
114sec_mon: sec_mon@314000 {
115 compatible = "fsl,sec-v5.2-mon", "fsl,sec-v5.0-mon", "fsl,sec-v4.0-mon";
116 reg = <0x314000 0x1000>;
117 interrupts = <93 2 0 0>;
118};
diff --git a/arch/powerpc/boot/dts/mpc8536ds.dtsi b/arch/powerpc/boot/dts/mpc8536ds.dtsi
index d304a2d68c62..7c3dde84d193 100644
--- a/arch/powerpc/boot/dts/mpc8536ds.dtsi
+++ b/arch/powerpc/boot/dts/mpc8536ds.dtsi
@@ -132,6 +132,10 @@
132 reg = <0x68>; 132 reg = <0x68>;
133 interrupts = <0 0x1 0 0>; 133 interrupts = <0 0x1 0 0>;
134 }; 134 };
135 adt7461@4c {
136 compatible = "adi,adt7461";
137 reg = <0x4c>;
138 };
135 }; 139 };
136 140
137 spi@7000 { 141 spi@7000 {
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts
index f99fb110c97f..2d31863accf5 100644
--- a/arch/powerpc/boot/dts/mpc8540ads.dts
+++ b/arch/powerpc/boot/dts/mpc8540ads.dts
@@ -11,6 +11,8 @@
11 11
12/dts-v1/; 12/dts-v1/;
13 13
14/include/ "fsl/e500v2_power_isa.dtsi"
15
14/ { 16/ {
15 model = "MPC8540ADS"; 17 model = "MPC8540ADS";
16 compatible = "MPC8540ADS", "MPC85xxADS"; 18 compatible = "MPC8540ADS", "MPC85xxADS";
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts
index 0f5e93912799..1c03c2667373 100644
--- a/arch/powerpc/boot/dts/mpc8541cds.dts
+++ b/arch/powerpc/boot/dts/mpc8541cds.dts
@@ -11,6 +11,8 @@
11 11
12/dts-v1/; 12/dts-v1/;
13 13
14/include/ "fsl/e500v2_power_isa.dtsi"
15
14/ { 16/ {
15 model = "MPC8541CDS"; 17 model = "MPC8541CDS";
16 compatible = "MPC8541CDS", "MPC85xxCDS"; 18 compatible = "MPC8541CDS", "MPC85xxCDS";
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts
index e934987e882b..ed38874c3a36 100644
--- a/arch/powerpc/boot/dts/mpc8544ds.dts
+++ b/arch/powerpc/boot/dts/mpc8544ds.dts
@@ -20,8 +20,10 @@
20 reg = <0 0 0 0>; // Filled by U-Boot 20 reg = <0 0 0 0>; // Filled by U-Boot
21 }; 21 };
22 22
23 lbc: localbus@e0005000 { 23 board_lbc: lbc: localbus@e0005000 {
24 reg = <0 0xe0005000 0 0x1000>; 24 reg = <0 0xe0005000 0 0x1000>;
25
26 ranges = <0x0 0x0 0x0 0xff800000 0x800000>;
25 }; 27 };
26 28
27 board_soc: soc: soc8544@e0000000 { 29 board_soc: soc: soc8544@e0000000 {
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dtsi b/arch/powerpc/boot/dts/mpc8544ds.dtsi
index 77ebc9f1d37c..b219d035d794 100644
--- a/arch/powerpc/boot/dts/mpc8544ds.dtsi
+++ b/arch/powerpc/boot/dts/mpc8544ds.dtsi
@@ -32,6 +32,45 @@
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */ 33 */
34 34
35&board_lbc {
36 nor@0,0 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
40 reg = <0x0 0x0 0x800000>;
41 bank-width = <2>;
42 device-width = <1>;
43
44 partition@0 {
45 reg = <0x0 0x10000>;
46 label = "dtb-nor";
47 };
48
49 partition@20000 {
50 reg = <0x20000 0x30000>;
51 label = "diagnostic-nor";
52 read-only;
53 };
54
55 partition@200000 {
56 reg = <0x200000 0x200000>;
57 label = "dink-nor";
58 read-only;
59 };
60
61 partition@400000 {
62 reg = <0x400000 0x380000>;
63 label = "kernel-nor";
64 };
65
66 partition@780000 {
67 reg = <0x780000 0x80000>;
68 label = "u-boot-nor";
69 read-only;
70 };
71 };
72};
73
35&board_soc { 74&board_soc {
36 enet0: ethernet@24000 { 75 enet0: ethernet@24000 {
37 phy-handle = <&phy0>; 76 phy-handle = <&phy0>;
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts
index fe10438613d6..36a7ea138c2f 100644
--- a/arch/powerpc/boot/dts/mpc8555cds.dts
+++ b/arch/powerpc/boot/dts/mpc8555cds.dts
@@ -11,6 +11,8 @@
11 11
12/dts-v1/; 12/dts-v1/;
13 13
14/include/ "fsl/e500v2_power_isa.dtsi"
15
14/ { 16/ {
15 model = "MPC8555CDS"; 17 model = "MPC8555CDS";
16 compatible = "MPC8555CDS", "MPC85xxCDS"; 18 compatible = "MPC8555CDS", "MPC85xxCDS";
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts
index 6e85e1ba0851..1a43f5a968f5 100644
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -11,6 +11,8 @@
11 11
12/dts-v1/; 12/dts-v1/;
13 13
14/include/ "fsl/e500v2_power_isa.dtsi"
15
14/ { 16/ {
15 model = "MPC8560ADS"; 17 model = "MPC8560ADS";
16 compatible = "MPC8560ADS", "MPC85xxADS"; 18 compatible = "MPC8560ADS", "MPC85xxADS";
diff --git a/arch/powerpc/boot/dts/o2d.dts b/arch/powerpc/boot/dts/o2d.dts
new file mode 100644
index 000000000000..9f6dd4d889b3
--- /dev/null
+++ b/arch/powerpc/boot/dts/o2d.dts
@@ -0,0 +1,47 @@
1/*
2 * O2D Device Tree Source
3 *
4 * Copyright (C) 2012 DENX Software Engineering
5 * Anatolij Gustschin <agust@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13/include/ "o2d.dtsi"
14
15/ {
16 model = "ifm,o2d";
17 compatible = "ifm,o2d";
18
19 memory {
20 reg = <0x00000000 0x08000000>; // 128MB
21 };
22
23 localbus {
24 ranges = <0 0 0xfc000000 0x02000000
25 3 0 0xe3000000 0x00100000>;
26
27 flash@0,0 {
28 compatible = "cfi-flash";
29 reg = <0 0 0x02000000>;
30 bank-width = <2>;
31 device-width = <2>;
32 #size-cells = <1>;
33 #address-cells = <1>;
34
35 partition@60000 {
36 label = "kernel";
37 reg = <0x00060000 0x00260000>;
38 read-only;
39 };
40 /* o2d specific partitions */
41 partition@2c0000 {
42 label = "o2d user defined";
43 reg = <0x002c0000 0x01d40000>;
44 };
45 };
46 };
47};
diff --git a/arch/powerpc/boot/dts/o2d.dtsi b/arch/powerpc/boot/dts/o2d.dtsi
new file mode 100644
index 000000000000..3444eb8f0ade
--- /dev/null
+++ b/arch/powerpc/boot/dts/o2d.dtsi
@@ -0,0 +1,139 @@
1/*
2 * O2D base Device Tree Source
3 *
4 * Copyright (C) 2012 DENX Software Engineering
5 * Anatolij Gustschin <agust@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13/include/ "mpc5200b.dtsi"
14
15/ {
16 model = "ifm,o2d";
17 compatible = "ifm,o2d";
18
19 memory {
20 reg = <0x00000000 0x04000000>; // 64MB
21 };
22
23 soc5200@f0000000 {
24
25 gpio_simple: gpio@b00 {
26 };
27
28 timer@600 { // General Purpose Timer
29 #gpio-cells = <2>;
30 gpio-controller;
31 fsl,has-wdt;
32 fsl,wdt-on-boot = <0>;
33 };
34
35 timer@610 {
36 #gpio-cells = <2>;
37 gpio-controller;
38 };
39
40 timer7: timer@670 {
41 };
42
43 rtc@800 {
44 status = "disabled";
45 };
46
47 psc@2000 { // PSC1
48 compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
49 #address-cells = <1>;
50 #size-cells = <0>;
51 cell-index = <0>;
52
53 spidev@0 {
54 compatible = "spidev";
55 spi-max-frequency = <250000>;
56 reg = <0>;
57 };
58 };
59
60 psc@2200 { // PSC2
61 status = "disabled";
62 };
63
64 psc@2400 { // PSC3
65 status = "disabled";
66 };
67
68 psc@2600 { // PSC4
69 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
70 };
71
72 psc@2800 { // PSC5
73 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
74 };
75
76 psc@2c00 { // PSC6
77 status = "disabled";
78 };
79
80 ethernet@3000 {
81 phy-handle = <&phy0>;
82 };
83
84 mdio@3000 {
85 phy0: ethernet-phy@0 {
86 reg = <0>;
87 };
88 };
89
90 sclpc@3c00 {
91 compatible = "fsl,mpc5200-lpbfifo";
92 reg = <0x3c00 0x60>;
93 interrupts = <3 23 0>;
94 };
95 };
96
97 localbus {
98 ranges = <0 0 0xff000000 0x01000000
99 3 0 0xe3000000 0x00100000>;
100
101 // flash device at LocalPlus Bus CS0
102 flash@0,0 {
103 compatible = "cfi-flash";
104 reg = <0 0 0x01000000>;
105 bank-width = <1>;
106 device-width = <2>;
107 #size-cells = <1>;
108 #address-cells = <1>;
109 no-unaligned-direct-access;
110
111 /* common layout for all machines */
112 partition@0 {
113 label = "u-boot";
114 reg = <0x00000000 0x00040000>;
115 read-only;
116 };
117 partition@40000 {
118 label = "env";
119 reg = <0x00040000 0x00020000>;
120 read-only;
121 };
122 };
123
124 csi@3,0 {
125 compatible = "ifm,o2d-csi";
126 reg = <3 0 0x00100000>;
127 ifm,csi-clk-handle = <&timer7>;
128 gpios = <&gpio_simple 23 0 /* imag_capture */
129 &gpio_simple 26 0 /* imag_reset */
130 &gpio_simple 29 0>; /* imag_master_en */
131
132 interrupts = <1 1 2>; /* IRQ1, edge falling */
133
134 ifm,csi-addr-bus-width = <24>;
135 ifm,csi-data-bus-width = <8>;
136 ifm,csi-wait-cycles = <0>;
137 };
138 };
139};
diff --git a/arch/powerpc/boot/dts/o2d300.dts b/arch/powerpc/boot/dts/o2d300.dts
new file mode 100644
index 000000000000..29affe0f0da3
--- /dev/null
+++ b/arch/powerpc/boot/dts/o2d300.dts
@@ -0,0 +1,52 @@
1/*
2 * O2D300 Device Tree Source
3 *
4 * Copyright (C) 2012 DENX Software Engineering
5 * Anatolij Gustschin <agust@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13/include/ "o2d.dtsi"
14
15/ {
16 model = "ifm,o2d300";
17 compatible = "ifm,o2d";
18
19 localbus {
20 ranges = <0 0 0xfc000000 0x02000000
21 3 0 0xe3000000 0x00100000>;
22 flash@0,0 {
23 compatible = "cfi-flash";
24 reg = <0 0 0x02000000>;
25 bank-width = <2>;
26 device-width = <2>;
27 #size-cells = <1>;
28 #address-cells = <1>;
29
30 partition@40000 {
31 label = "env_1";
32 reg = <0x00040000 0x00020000>;
33 read-only;
34 };
35 partition@60000 {
36 label = "env_2";
37 reg = <0x00060000 0x00020000>;
38 read-only;
39 };
40 partition@80000 {
41 label = "kernel";
42 reg = <0x00080000 0x00260000>;
43 read-only;
44 };
45 /* o2d300 specific partitions */
46 partition@2e0000 {
47 label = "o2d300 user defined";
48 reg = <0x002e0000 0x01d20000>;
49 };
50 };
51 };
52};
diff --git a/arch/powerpc/boot/dts/o2dnt2.dts b/arch/powerpc/boot/dts/o2dnt2.dts
new file mode 100644
index 000000000000..a0f5b97a4f06
--- /dev/null
+++ b/arch/powerpc/boot/dts/o2dnt2.dts
@@ -0,0 +1,48 @@
1/*
2 * O2DNT2 Device Tree Source
3 *
4 * Copyright (C) 2012 DENX Software Engineering
5 * Anatolij Gustschin <agust@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13/include/ "o2d.dtsi"
14
15/ {
16 model = "ifm,o2dnt2";
17 compatible = "ifm,o2d";
18
19 memory {
20 reg = <0x00000000 0x08000000>; // 128MB
21 };
22
23 localbus {
24 ranges = <0 0 0xfc000000 0x02000000
25 3 0 0xe3000000 0x00100000>;
26
27 flash@0,0 {
28 compatible = "cfi-flash";
29 reg = <0 0 0x02000000>;
30 bank-width = <2>;
31 device-width = <2>;
32 #size-cells = <1>;
33 #address-cells = <1>;
34
35 partition@60000 {
36 label = "kernel";
37 reg = <0x00060000 0x00260000>;
38 read-only;
39 };
40
41 /* o2dnt2 specific partitions */
42 partition@2c0000 {
43 label = "o2dnt2 user defined";
44 reg = <0x002c0000 0x01d40000>;
45 };
46 };
47 };
48};
diff --git a/arch/powerpc/boot/dts/o2i.dts b/arch/powerpc/boot/dts/o2i.dts
new file mode 100644
index 000000000000..e3cc99d1360b
--- /dev/null
+++ b/arch/powerpc/boot/dts/o2i.dts
@@ -0,0 +1,33 @@
1/*
2 * O2I Device Tree Source
3 *
4 * Copyright (C) 2012 DENX Software Engineering
5 * Anatolij Gustschin <agust@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13/include/ "o2d.dtsi"
14
15/ {
16 model = "ifm,o2i";
17 compatible = "ifm,o2d";
18
19 localbus {
20 flash@0,0 {
21 partition@60000 {
22 label = "kernel";
23 reg = <0x00060000 0x00260000>;
24 read-only;
25 };
26 /* o2i specific partitions */
27 partition@2c0000 {
28 label = "o2i user defined";
29 reg = <0x002c0000 0x00d40000>;
30 };
31 };
32 };
33};
diff --git a/arch/powerpc/boot/dts/o2mnt.dts b/arch/powerpc/boot/dts/o2mnt.dts
new file mode 100644
index 000000000000..d91859a9e940
--- /dev/null
+++ b/arch/powerpc/boot/dts/o2mnt.dts
@@ -0,0 +1,33 @@
1/*
2 * O2MNT Device Tree Source
3 *
4 * Copyright (C) 2012 DENX Software Engineering
5 * Anatolij Gustschin <agust@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13/include/ "o2d.dtsi"
14
15/ {
16 model = "ifm,o2mnt";
17 compatible = "ifm,o2d";
18
19 localbus {
20 flash@0,0 {
21 partition@60000 {
22 label = "kernel";
23 reg = <0x00060000 0x00260000>;
24 read-only;
25 };
26 /* add o2mnt specific partitions */
27 partition@2c0000 {
28 label = "o2mnt user defined";
29 reg = <0x002c0000 0x00d40000>;
30 };
31 };
32 };
33};
diff --git a/arch/powerpc/boot/dts/o3dnt.dts b/arch/powerpc/boot/dts/o3dnt.dts
new file mode 100644
index 000000000000..acce49326491
--- /dev/null
+++ b/arch/powerpc/boot/dts/o3dnt.dts
@@ -0,0 +1,48 @@
1/*
2 * O3DNT Device Tree Source
3 *
4 * Copyright (C) 2012 DENX Software Engineering
5 * Anatolij Gustschin <agust@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13/include/ "o2d.dtsi"
14
15/ {
16 model = "ifm,o3dnt";
17 compatible = "ifm,o2d";
18
19 memory {
20 reg = <0x00000000 0x04000000>; // 64MB
21 };
22
23 localbus {
24 ranges = <0 0 0xfc000000 0x01000000
25 3 0 0xe3000000 0x00100000>;
26
27 flash@0,0 {
28 compatible = "cfi-flash";
29 reg = <0 0 0x01000000>;
30 bank-width = <2>;
31 device-width = <2>;
32 #size-cells = <1>;
33 #address-cells = <1>;
34
35 partition@60000 {
36 label = "kernel";
37 reg = <0x00060000 0x00260000>;
38 read-only;
39 };
40
41 /* o3dnt specific partitions */
42 partition@2c0000 {
43 label = "o3dnt user defined";
44 reg = <0x002c0000 0x00d40000>;
45 };
46 };
47 };
48};
diff --git a/arch/powerpc/boot/dts/p1020rdb_camp_core0.dts b/arch/powerpc/boot/dts/p1020rdb_camp_core0.dts
deleted file mode 100644
index 41b4585c5da8..000000000000
--- a/arch/powerpc/boot/dts/p1020rdb_camp_core0.dts
+++ /dev/null
@@ -1,63 +0,0 @@
1/*
2 * P1020 RDB Core0 Device Tree Source in CAMP mode.
3 *
4 * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
5 * can be shared, all the other devices must be assigned to one core only.
6 * This dts file allows core0 to have memory, l2, i2c, spi, gpio, tdm, dma, usb,
7 * eth1, eth2, sdhc, crypto, global-util, message, pci0, pci1, msi.
8 *
9 * Please note to add "-b 0" for core0's dts compiling.
10 *
11 * Copyright 2011 Freescale Semiconductor Inc.
12 *
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License as published by the
15 * Free Software Foundation; either version 2 of the License, or (at your
16 * option) any later version.
17 */
18
19/include/ "p1020rdb.dts"
20
21/ {
22 model = "fsl,P1020RDB";
23 compatible = "fsl,P1020RDB", "fsl,MPC85XXRDB-CAMP";
24
25 aliases {
26 ethernet1 = &enet1;
27 ethernet2 = &enet2;
28 serial0 = &serial0;
29 pci0 = &pci0;
30 pci1 = &pci1;
31 };
32
33 cpus {
34 PowerPC,P1020@1 {
35 status = "disabled";
36 };
37 };
38
39 memory {
40 device_type = "memory";
41 };
42
43 localbus@ffe05000 {
44 status = "disabled";
45 };
46
47 soc@ffe00000 {
48 serial1: serial@4600 {
49 status = "disabled";
50 };
51
52 enet0: ethernet@b0000 {
53 status = "disabled";
54 };
55
56 mpic: pic@40000 {
57 protected-sources = <
58 42 29 30 34 /* serial1, enet0-queue-group0 */
59 17 18 24 45 /* enet0-queue-group1, crypto */
60 >;
61 };
62 };
63};
diff --git a/arch/powerpc/boot/dts/p1020rdb_camp_core1.dts b/arch/powerpc/boot/dts/p1020rdb_camp_core1.dts
deleted file mode 100644
index 517453821884..000000000000
--- a/arch/powerpc/boot/dts/p1020rdb_camp_core1.dts
+++ /dev/null
@@ -1,141 +0,0 @@
1/*
2 * P1020 RDB Core1 Device Tree Source in CAMP mode.
3 *
4 * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
5 * can be shared, all the other devices must be assigned to one core only.
6 * This dts allows core1 to have l2, eth0, crypto.
7 *
8 * Please note to add "-b 1" for core1's dts compiling.
9 *
10 * Copyright 2011 Freescale Semiconductor Inc.
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 */
17
18/include/ "p1020rdb.dts"
19
20/ {
21 model = "fsl,P1020RDB";
22 compatible = "fsl,P1020RDB", "fsl,MPC85XXRDB-CAMP";
23
24 aliases {
25 ethernet0 = &enet0;
26 serial0 = &serial1;
27 };
28
29 cpus {
30 PowerPC,P1020@0 {
31 status = "disabled";
32 };
33 };
34
35 memory {
36 device_type = "memory";
37 };
38
39 localbus@ffe05000 {
40 status = "disabled";
41 };
42
43 soc@ffe00000 {
44 ecm-law@0 {
45 status = "disabled";
46 };
47
48 ecm@1000 {
49 status = "disabled";
50 };
51
52 memory-controller@2000 {
53 status = "disabled";
54 };
55
56 i2c@3000 {
57 status = "disabled";
58 };
59
60 i2c@3100 {
61 status = "disabled";
62 };
63
64 serial0: serial@4500 {
65 status = "disabled";
66 };
67
68 spi@7000 {
69 status = "disabled";
70 };
71
72 gpio: gpio-controller@f000 {
73 status = "disabled";
74 };
75
76 dma@21300 {
77 status = "disabled";
78 };
79
80 mdio@24000 {
81 status = "disabled";
82 };
83
84 mdio@25000 {
85 status = "disabled";
86 };
87
88 enet1: ethernet@b1000 {
89 status = "disabled";
90 };
91
92 enet2: ethernet@b2000 {
93 status = "disabled";
94 };
95
96 usb@22000 {
97 status = "disabled";
98 };
99
100 sdhci@2e000 {
101 status = "disabled";
102 };
103
104 mpic: pic@40000 {
105 protected-sources = <
106 16 /* ecm, mem, L2, pci0, pci1 */
107 43 42 59 /* i2c, serial0, spi */
108 47 63 62 /* gpio, tdm */
109 20 21 22 23 /* dma */
110 03 02 /* mdio */
111 35 36 40 /* enet1-queue-group0 */
112 51 52 67 /* enet1-queue-group1 */
113 31 32 33 /* enet2-queue-group0 */
114 25 26 27 /* enet2-queue-group1 */
115 28 72 58 /* usb, sdhci, crypto */
116 0xb0 0xb1 0xb2 /* message */
117 0xb3 0xb4 0xb5
118 0xb6 0xb7
119 0xe0 0xe1 0xe2 /* msi */
120 0xe3 0xe4 0xe5
121 0xe6 0xe7 /* sdhci, crypto , pci */
122 >;
123 };
124
125 msi@41600 {
126 status = "disabled";
127 };
128
129 global-utilities@e0000 { //global utilities block
130 status = "disabled";
131 };
132 };
133
134 pci0: pcie@ffe09000 {
135 status = "disabled";
136 };
137
138 pci1: pcie@ffe0a000 {
139 status = "disabled";
140 };
141};
diff --git a/arch/powerpc/boot/dts/p1022ds.dtsi b/arch/powerpc/boot/dts/p1022ds.dtsi
index c3344b04d8ff..873da350d01b 100644
--- a/arch/powerpc/boot/dts/p1022ds.dtsi
+++ b/arch/powerpc/boot/dts/p1022ds.dtsi
@@ -149,6 +149,10 @@
149 compatible = "dallas,ds1339"; 149 compatible = "dallas,ds1339";
150 reg = <0x68>; 150 reg = <0x68>;
151 }; 151 };
152 adt7461@4c {
153 compatible = "adi,adt7461";
154 reg = <0x4c>;
155 };
152 }; 156 };
153 157
154 spi@7000 { 158 spi@7000 {
diff --git a/arch/powerpc/boot/dts/p1022rdk.dts b/arch/powerpc/boot/dts/p1022rdk.dts
new file mode 100644
index 000000000000..51d82de223f3
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1022rdk.dts
@@ -0,0 +1,188 @@
1/*
2 * P1022 RDK 32-bit Physical Address Map Device Tree Source
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p1022si-pre.dtsi"
36/ {
37 model = "fsl,P1022RDK";
38 compatible = "fsl,P1022RDK";
39
40 memory {
41 device_type = "memory";
42 };
43
44 board_lbc: lbc: localbus@ffe05000 {
45 /* The P1022 RDK does not have any localbus devices */
46 status = "disabled";
47 };
48
49 board_soc: soc: soc@ffe00000 {
50 ranges = <0x0 0x0 0xffe00000 0x100000>;
51
52 i2c@3100 {
53 wm8960:codec@1a {
54 compatible = "wlf,wm8960";
55 reg = <0x1a>;
56 /* MCLK source is a stand-alone oscillator */
57 clock-frequency = <12288000>;
58 };
59 rtc@68 {
60 compatible = "stm,m41t62";
61 reg = <0x68>;
62 };
63 adt7461@4c{
64 compatible = "adi,adt7461";
65 reg = <0x4c>;
66 };
67 zl6100@21{
68 compatible = "isil,zl6100";
69 reg = <0x21>;
70 };
71 zl6100@24{
72 compatible = "isil,zl6100";
73 reg = <0x24>;
74 };
75 zl6100@26{
76 compatible = "isil,zl6100";
77 reg = <0x26>;
78 };
79 zl6100@29{
80 compatible = "isil,zl6100";
81 reg = <0x29>;
82 };
83 };
84
85 spi@7000 {
86 flash@0 {
87 #address-cells = <1>;
88 #size-cells = <1>;
89 compatible = "spansion,m25p80";
90 reg = <0>;
91 spi-max-frequency = <1000000>;
92 partition@0 {
93 label = "full-spi-flash";
94 reg = <0x00000000 0x00100000>;
95 };
96 };
97 };
98
99 ssi@15000 {
100 fsl,mode = "i2s-slave";
101 codec-handle = <&wm8960>;
102 };
103
104 usb@22000 {
105 phy_type = "ulpi";
106 };
107
108 usb@23000 {
109 phy_type = "ulpi";
110 };
111
112 mdio@24000 {
113 phy0: ethernet-phy@0 {
114 interrupts = <3 1 0 0>;
115 reg = <0x1>;
116 };
117 phy1: ethernet-phy@1 {
118 interrupts = <9 1 0 0>;
119 reg = <0x2>;
120 };
121 };
122
123 mdio@25000 {
124 tbi0: tbi-phy@11 {
125 reg = <0x11>;
126 device_type = "tbi-phy";
127 };
128 };
129
130 ethernet@b0000 {
131 phy-handle = <&phy0>;
132 phy-connection-type = "rgmii-id";
133 };
134
135 ethernet@b1000 {
136 phy-handle = <&phy1>;
137 tbi-handle = <&tbi0>;
138 phy-connection-type = "sgmii";
139 };
140 };
141
142 pci0: pcie@ffe09000 {
143 ranges = <0x2000000 0x0 0xe0000000 0 0xa0000000 0x0 0x20000000
144 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
145 reg = <0x0 0xffe09000 0 0x1000>;
146 pcie@0 {
147 ranges = <0x2000000 0x0 0xe0000000
148 0x2000000 0x0 0xe0000000
149 0x0 0x20000000
150
151 0x1000000 0x0 0x0
152 0x1000000 0x0 0x0
153 0x0 0x100000>;
154 };
155 };
156
157 pci1: pcie@ffe0a000 {
158 ranges = <0x2000000 0x0 0xe0000000 0 0xc0000000 0x0 0x20000000
159 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
160 reg = <0 0xffe0a000 0 0x1000>;
161 pcie@0 {
162 ranges = <0x2000000 0x0 0xe0000000
163 0x2000000 0x0 0xe0000000
164 0x0 0x20000000
165
166 0x1000000 0x0 0x0
167 0x1000000 0x0 0x0
168 0x0 0x100000>;
169 };
170 };
171
172 pci2: pcie@ffe0b000 {
173 ranges = <0x2000000 0x0 0xe0000000 0 0x80000000 0x0 0x20000000
174 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
175 reg = <0 0xffe0b000 0 0x1000>;
176 pcie@0 {
177 ranges = <0x2000000 0x0 0xe0000000
178 0x2000000 0x0 0xe0000000
179 0x0 0x20000000
180
181 0x1000000 0x0 0x0
182 0x1000000 0x0 0x0
183 0x0 0x100000>;
184 };
185 };
186};
187
188/include/ "fsl/p1022si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts b/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts
deleted file mode 100644
index 66aac864c4cc..000000000000
--- a/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts
+++ /dev/null
@@ -1,67 +0,0 @@
1/*
2 * P2020 RDB Core0 Device Tree Source in CAMP mode.
3 *
4 * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
5 * can be shared, all the other devices must be assigned to one core only.
6 * This dts file allows core0 to have memory, l2, i2c, spi, gpio, dma1, usb,
7 * eth1, eth2, sdhc, crypto, global-util, pci0.
8 *
9 * Copyright 2009-2011 Freescale Semiconductor Inc.
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 */
16
17/include/ "p2020rdb.dts"
18
19/ {
20 model = "fsl,P2020RDB";
21 compatible = "fsl,P2020RDB", "fsl,MPC85XXRDB-CAMP";
22
23 cpus {
24 PowerPC,P2020@1 {
25 status = "disabled";
26 };
27 };
28
29 localbus@ffe05000 {
30 status = "disabled";
31 };
32
33 soc@ffe00000 {
34 serial1: serial@4600 {
35 status = "disabled";
36 };
37
38 dma@c300 {
39 status = "disabled";
40 };
41
42 enet0: ethernet@24000 {
43 status = "disabled";
44 };
45
46 mpic: pic@40000 {
47 protected-sources = <
48 42 76 77 78 79 /* serial1 , dma2 */
49 29 30 34 26 /* enet0, pci1 */
50 0xe0 0xe1 0xe2 0xe3 /* msi */
51 0xe4 0xe5 0xe6 0xe7
52 >;
53 };
54
55 msi@41600 {
56 status = "disabled";
57 };
58 };
59
60 pci0: pcie@ffe08000 {
61 status = "disabled";
62 };
63
64 pci2: pcie@ffe0a000 {
65 status = "disabled";
66 };
67};
diff --git a/arch/powerpc/boot/dts/p2020rdb_camp_core1.dts b/arch/powerpc/boot/dts/p2020rdb_camp_core1.dts
deleted file mode 100644
index 9bd8ef493dd2..000000000000
--- a/arch/powerpc/boot/dts/p2020rdb_camp_core1.dts
+++ /dev/null
@@ -1,125 +0,0 @@
1/*
2 * P2020 RDB Core1 Device Tree Source in CAMP mode.
3 *
4 * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
5 * can be shared, all the other devices must be assigned to one core only.
6 * This dts allows core1 to have l2, dma2, eth0, pci1, msi.
7 *
8 * Please note to add "-b 1" for core1's dts compiling.
9 *
10 * Copyright 2009-2011 Freescale Semiconductor Inc.
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 */
17
18/include/ "p2020rdb.dts"
19
20/ {
21 model = "fsl,P2020RDB";
22 compatible = "fsl,P2020RDB", "fsl,MPC85XXRDB-CAMP";
23
24 cpus {
25 PowerPC,P2020@0 {
26 status = "disabled";
27 };
28 };
29
30 localbus@ffe05000 {
31 status = "disabled";
32 };
33
34 soc@ffe00000 {
35 ecm-law@0 {
36 status = "disabled";
37 };
38
39 ecm@1000 {
40 status = "disabled";
41 };
42
43 memory-controller@2000 {
44 status = "disabled";
45 };
46
47 i2c@3000 {
48 status = "disabled";
49 };
50
51 i2c@3100 {
52 status = "disabled";
53 };
54
55 serial0: serial@4500 {
56 status = "disabled";
57 };
58
59 spi@7000 {
60 status = "disabled";
61 };
62
63 gpio: gpio-controller@f000 {
64 status = "disabled";
65 };
66
67 dma@21300 {
68 status = "disabled";
69 };
70
71 usb@22000 {
72 status = "disabled";
73 };
74
75 mdio@24520 {
76 status = "disabled";
77 };
78
79 mdio@25520 {
80 status = "disabled";
81 };
82
83 mdio@26520 {
84 status = "disabled";
85 };
86
87 enet1: ethernet@25000 {
88 status = "disabled";
89 };
90
91 enet2: ethernet@26000 {
92 status = "disabled";
93 };
94
95 sdhci@2e000 {
96 status = "disabled";
97 };
98
99 crypto@30000 {
100 status = "disabled";
101 };
102
103 mpic: pic@40000 {
104 protected-sources = <
105 17 18 43 42 59 47 /*ecm, mem, i2c, serial0, spi,gpio */
106 16 20 21 22 23 28 /* L2, dma1, USB */
107 03 35 36 40 31 32 33 /* mdio, enet1, enet2 */
108 72 45 58 25 /* sdhci, crypto , pci */
109 >;
110 };
111
112 global-utilities@e0000 { //global utilities block
113 status = "disabled";
114 };
115
116 };
117
118 pci0: pcie@ffe08000 {
119 status = "disabled";
120 };
121
122 pci1: pcie@ffe09000 {
123 status = "disabled";
124 };
125};
diff --git a/arch/powerpc/boot/dts/p2041rdb.dts b/arch/powerpc/boot/dts/p2041rdb.dts
index baab0347dab0..d97ad74c7279 100644
--- a/arch/powerpc/boot/dts/p2041rdb.dts
+++ b/arch/powerpc/boot/dts/p2041rdb.dts
@@ -94,6 +94,10 @@
94 compatible = "pericom,pt7c4338"; 94 compatible = "pericom,pt7c4338";
95 reg = <0x68>; 95 reg = <0x68>;
96 }; 96 };
97 adt7461@4c {
98 compatible = "adi,adt7461";
99 reg = <0x4c>;
100 };
97 }; 101 };
98 102
99 i2c@118100 { 103 i2c@118100 {
diff --git a/arch/powerpc/boot/dts/p3041ds.dts b/arch/powerpc/boot/dts/p3041ds.dts
index 6cdcadc80c30..2fed3bc0b990 100644
--- a/arch/powerpc/boot/dts/p3041ds.dts
+++ b/arch/powerpc/boot/dts/p3041ds.dts
@@ -98,6 +98,10 @@
98 reg = <0x68>; 98 reg = <0x68>;
99 interrupts = <0x1 0x1 0 0>; 99 interrupts = <0x1 0x1 0 0>;
100 }; 100 };
101 adt7461@4c {
102 compatible = "adi,adt7461";
103 reg = <0x4c>;
104 };
101 }; 105 };
102 }; 106 };
103 107
diff --git a/arch/powerpc/boot/dts/p4080ds.dts b/arch/powerpc/boot/dts/p4080ds.dts
index 3e204609d02e..1cf6148b8b05 100644
--- a/arch/powerpc/boot/dts/p4080ds.dts
+++ b/arch/powerpc/boot/dts/p4080ds.dts
@@ -96,6 +96,10 @@
96 reg = <0x68>; 96 reg = <0x68>;
97 interrupts = <0x1 0x1 0 0>; 97 interrupts = <0x1 0x1 0 0>;
98 }; 98 };
99 adt7461@4c {
100 compatible = "adi,adt7461";
101 reg = <0x4c>;
102 };
99 }; 103 };
100 104
101 usb0: usb@210000 { 105 usb0: usb@210000 {
diff --git a/arch/powerpc/boot/dts/p5020ds.dts b/arch/powerpc/boot/dts/p5020ds.dts
index 27c07ed6adc1..2869fea717dd 100644
--- a/arch/powerpc/boot/dts/p5020ds.dts
+++ b/arch/powerpc/boot/dts/p5020ds.dts
@@ -98,6 +98,10 @@
98 reg = <0x68>; 98 reg = <0x68>;
99 interrupts = <0x1 0x1 0 0>; 99 interrupts = <0x1 0x1 0 0>;
100 }; 100 };
101 adt7461@4c {
102 compatible = "adi,adt7461";
103 reg = <0x4c>;
104 };
101 }; 105 };
102 }; 106 };
103 107
diff --git a/arch/powerpc/boot/dts/p5040ds.dts b/arch/powerpc/boot/dts/p5040ds.dts
new file mode 100644
index 000000000000..860b5ccf76c0
--- /dev/null
+++ b/arch/powerpc/boot/dts/p5040ds.dts
@@ -0,0 +1,207 @@
1/*
2 * P5040DS Device Tree Source
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * This software is provided by Freescale Semiconductor "as is" and any
24 * express or implied warranties, including, but not limited to, the implied
25 * warranties of merchantability and fitness for a particular purpose are
26 * disclaimed. In no event shall Freescale Semiconductor be liable for any
27 * direct, indirect, incidental, special, exemplary, or consequential damages
28 * (including, but not limited to, procurement of substitute goods or services;
29 * loss of use, data, or profits; or business interruption) however caused and
30 * on any theory of liability, whether in contract, strict liability, or tort
31 * (including negligence or otherwise) arising in any way out of the use of this
32 * software, even if advised of the possibility of such damage.
33 */
34
35/include/ "fsl/p5040si-pre.dtsi"
36
37/ {
38 model = "fsl,P5040DS";
39 compatible = "fsl,P5040DS";
40 #address-cells = <2>;
41 #size-cells = <2>;
42 interrupt-parent = <&mpic>;
43
44 memory {
45 device_type = "memory";
46 };
47
48 dcsr: dcsr@f00000000 {
49 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
50 };
51
52 soc: soc@ffe000000 {
53 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
54 reg = <0xf 0xfe000000 0 0x00001000>;
55 spi@110000 {
56 flash@0 {
57 #address-cells = <1>;
58 #size-cells = <1>;
59 compatible = "spansion,s25sl12801";
60 reg = <0>;
61 spi-max-frequency = <40000000>; /* input clock */
62 partition@u-boot {
63 label = "u-boot";
64 reg = <0x00000000 0x00100000>;
65 };
66 partition@kernel {
67 label = "kernel";
68 reg = <0x00100000 0x00500000>;
69 };
70 partition@dtb {
71 label = "dtb";
72 reg = <0x00600000 0x00100000>;
73 };
74 partition@fs {
75 label = "file system";
76 reg = <0x00700000 0x00900000>;
77 };
78 };
79 };
80
81 i2c@118100 {
82 eeprom@51 {
83 compatible = "at24,24c256";
84 reg = <0x51>;
85 };
86 eeprom@52 {
87 compatible = "at24,24c256";
88 reg = <0x52>;
89 };
90 };
91
92 i2c@119100 {
93 rtc@68 {
94 compatible = "dallas,ds3232";
95 reg = <0x68>;
96 interrupts = <0x1 0x1 0 0>;
97 };
98 adt7461@4c {
99 compatible = "adi,adt7461";
100 reg = <0x4c>;
101 };
102 };
103 };
104
105 lbc: localbus@ffe124000 {
106 reg = <0xf 0xfe124000 0 0x1000>;
107 ranges = <0 0 0xf 0xe8000000 0x08000000
108 2 0 0xf 0xffa00000 0x00040000
109 3 0 0xf 0xffdf0000 0x00008000>;
110
111 flash@0,0 {
112 compatible = "cfi-flash";
113 reg = <0 0 0x08000000>;
114 bank-width = <2>;
115 device-width = <2>;
116 };
117
118 nand@2,0 {
119 #address-cells = <1>;
120 #size-cells = <1>;
121 compatible = "fsl,elbc-fcm-nand";
122 reg = <0x2 0x0 0x40000>;
123
124 partition@0 {
125 label = "NAND U-Boot Image";
126 reg = <0x0 0x02000000>;
127 };
128
129 partition@2000000 {
130 label = "NAND Root File System";
131 reg = <0x02000000 0x10000000>;
132 };
133
134 partition@12000000 {
135 label = "NAND Compressed RFS Image";
136 reg = <0x12000000 0x08000000>;
137 };
138
139 partition@1a000000 {
140 label = "NAND Linux Kernel Image";
141 reg = <0x1a000000 0x04000000>;
142 };
143
144 partition@1e000000 {
145 label = "NAND DTB Image";
146 reg = <0x1e000000 0x01000000>;
147 };
148
149 partition@1f000000 {
150 label = "NAND Writable User area";
151 reg = <0x1f000000 0x01000000>;
152 };
153 };
154
155 board-control@3,0 {
156 compatible = "fsl,p5040ds-fpga", "fsl,fpga-ngpixis";
157 reg = <3 0 0x40>;
158 };
159 };
160
161 pci0: pcie@ffe200000 {
162 reg = <0xf 0xfe200000 0 0x1000>;
163 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
164 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
165 pcie@0 {
166 ranges = <0x02000000 0 0xe0000000
167 0x02000000 0 0xe0000000
168 0 0x20000000
169
170 0x01000000 0 0x00000000
171 0x01000000 0 0x00000000
172 0 0x00010000>;
173 };
174 };
175
176 pci1: pcie@ffe201000 {
177 reg = <0xf 0xfe201000 0 0x1000>;
178 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
179 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
180 pcie@0 {
181 ranges = <0x02000000 0 0xe0000000
182 0x02000000 0 0xe0000000
183 0 0x20000000
184
185 0x01000000 0 0x00000000
186 0x01000000 0 0x00000000
187 0 0x00010000>;
188 };
189 };
190
191 pci2: pcie@ffe202000 {
192 reg = <0xf 0xfe202000 0 0x1000>;
193 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
194 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
195 pcie@0 {
196 ranges = <0x02000000 0 0xe0000000
197 0x02000000 0 0xe0000000
198 0 0x20000000
199
200 0x01000000 0 0x00000000
201 0x01000000 0 0x00000000
202 0 0x00010000>;
203 };
204 };
205};
206
207/include/ "fsl/p5040si-post.dtsi"
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-03 08:23:45 -0500