aboutsummaryrefslogtreecommitdiffstats
path: root/arch/powerpc/boot/dts/tqm8540.dts
diff options
context:
space:
mode:
Diffstat (limited to 'arch/powerpc/boot/dts/tqm8540.dts')
-rw-r--r--arch/powerpc/boot/dts/tqm8540.dts49
1 files changed, 46 insertions, 3 deletions
diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tqm8540.dts
index 1addb3ae719e..e1d260b9085e 100644
--- a/arch/powerpc/boot/dts/tqm8540.dts
+++ b/arch/powerpc/boot/dts/tqm8540.dts
@@ -12,8 +12,8 @@
12/dts-v1/; 12/dts-v1/;
13 13
14/ { 14/ {
15 model = "tqm,8540"; 15 model = "tqc,tqm8540";
16 compatible = "tqm,8540", "tqm,85xx"; 16 compatible = "tqc,tqm8540";
17 #address-cells = <1>; 17 #address-cells = <1>;
18 #size-cells = <1>; 18 #size-cells = <1>;
19 19
@@ -40,6 +40,7 @@
40 timebase-frequency = <0>; 40 timebase-frequency = <0>;
41 bus-frequency = <0>; 41 bus-frequency = <0>;
42 clock-frequency = <0>; 42 clock-frequency = <0>;
43 next-level-cache = <&L2>;
43 }; 44 };
44 }; 45 };
45 46
@@ -64,7 +65,7 @@
64 interrupts = <18 2>; 65 interrupts = <18 2>;
65 }; 66 };
66 67
67 l2-cache-controller@20000 { 68 L2: l2-cache-controller@20000 {
68 compatible = "fsl,8540-l2-cache-controller"; 69 compatible = "fsl,8540-l2-cache-controller";
69 reg = <0x20000 0x1000>; 70 reg = <0x20000 0x1000>;
70 cache-line-size = <32>; 71 cache-line-size = <32>;
@@ -89,6 +90,47 @@
89 }; 90 };
90 }; 91 };
91 92
93 dma@21300 {
94 #address-cells = <1>;
95 #size-cells = <1>;
96 compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
97 reg = <0x21300 0x4>;
98 ranges = <0x0 0x21100 0x200>;
99 cell-index = <0>;
100 dma-channel@0 {
101 compatible = "fsl,mpc8540-dma-channel",
102 "fsl,eloplus-dma-channel";
103 reg = <0x0 0x80>;
104 cell-index = <0>;
105 interrupt-parent = <&mpic>;
106 interrupts = <20 2>;
107 };
108 dma-channel@80 {
109 compatible = "fsl,mpc8540-dma-channel",
110 "fsl,eloplus-dma-channel";
111 reg = <0x80 0x80>;
112 cell-index = <1>;
113 interrupt-parent = <&mpic>;
114 interrupts = <21 2>;
115 };
116 dma-channel@100 {
117 compatible = "fsl,mpc8540-dma-channel",
118 "fsl,eloplus-dma-channel";
119 reg = <0x100 0x80>;
120 cell-index = <2>;
121 interrupt-parent = <&mpic>;
122 interrupts = <22 2>;
123 };
124 dma-channel@180 {
125 compatible = "fsl,mpc8540-dma-channel",
126 "fsl,eloplus-dma-channel";
127 reg = <0x180 0x80>;
128 cell-index = <3>;
129 interrupt-parent = <&mpic>;
130 interrupts = <23 2>;
131 };
132 };
133
92 mdio@24520 { 134 mdio@24520 {
93 #address-cells = <1>; 135 #address-cells = <1>;
94 #size-cells = <0>; 136 #size-cells = <0>;
@@ -177,6 +219,7 @@
177 #interrupt-cells = <2>; 219 #interrupt-cells = <2>;
178 reg = <0x40000 0x40000>; 220 reg = <0x40000 0x40000>;
179 device_type = "open-pic"; 221 device_type = "open-pic";
222 compatible = "chrp,open-pic";
180 }; 223 };
181 }; 224 };
182 225