diff options
Diffstat (limited to 'arch/powerpc/boot/dts/mpc8378_mds.dts')
-rw-r--r-- | arch/powerpc/boot/dts/mpc8378_mds.dts | 209 |
1 files changed, 153 insertions, 56 deletions
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts index b85fc02682d2..651ff2f9db2d 100644 --- a/arch/powerpc/boot/dts/mpc8378_mds.dts +++ b/arch/powerpc/boot/dts/mpc8378_mds.dts | |||
@@ -23,6 +23,8 @@ | |||
23 | serial0 = &serial0; | 23 | serial0 = &serial0; |
24 | serial1 = &serial1; | 24 | serial1 = &serial1; |
25 | pci0 = &pci0; | 25 | pci0 = &pci0; |
26 | pci1 = &pci1; | ||
27 | pci2 = &pci2; | ||
26 | }; | 28 | }; |
27 | 29 | ||
28 | cpus { | 30 | cpus { |
@@ -127,21 +129,38 @@ | |||
127 | reg = <0x200 0x100>; | 129 | reg = <0x200 0x100>; |
128 | }; | 130 | }; |
129 | 131 | ||
130 | i2c@3000 { | 132 | sleep-nexus { |
131 | #address-cells = <1>; | 133 | #address-cells = <1>; |
132 | #size-cells = <0>; | 134 | #size-cells = <1>; |
133 | cell-index = <0>; | 135 | compatible = "simple-bus"; |
134 | compatible = "fsl-i2c"; | 136 | sleep = <&pmc 0x0c000000>; |
135 | reg = <0x3000 0x100>; | 137 | ranges; |
136 | interrupts = <14 0x8>; | 138 | |
137 | interrupt-parent = <&ipic>; | 139 | i2c@3000 { |
138 | dfsrr; | 140 | #address-cells = <1>; |
141 | #size-cells = <0>; | ||
142 | cell-index = <0>; | ||
143 | compatible = "fsl-i2c"; | ||
144 | reg = <0x3000 0x100>; | ||
145 | interrupts = <14 0x8>; | ||
146 | interrupt-parent = <&ipic>; | ||
147 | dfsrr; | ||
148 | |||
149 | rtc@68 { | ||
150 | compatible = "dallas,ds1374"; | ||
151 | reg = <0x68>; | ||
152 | interrupts = <19 0x8>; | ||
153 | interrupt-parent = <&ipic>; | ||
154 | }; | ||
155 | }; | ||
139 | 156 | ||
140 | rtc@68 { | 157 | sdhci@2e000 { |
141 | compatible = "dallas,ds1374"; | 158 | compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc"; |
142 | reg = <0x68>; | 159 | reg = <0x2e000 0x1000>; |
143 | interrupts = <19 0x8>; | 160 | interrupts = <42 0x8>; |
144 | interrupt-parent = <&ipic>; | 161 | interrupt-parent = <&ipic>; |
162 | /* Filled in by U-Boot */ | ||
163 | clock-frequency = <0>; | ||
145 | }; | 164 | }; |
146 | }; | 165 | }; |
147 | 166 | ||
@@ -213,70 +232,83 @@ | |||
213 | interrupts = <38 0x8>; | 232 | interrupts = <38 0x8>; |
214 | dr_mode = "host"; | 233 | dr_mode = "host"; |
215 | phy_type = "ulpi"; | 234 | phy_type = "ulpi"; |
235 | sleep = <&pmc 0x00c00000>; | ||
216 | }; | 236 | }; |
217 | 237 | ||
218 | mdio@24520 { | ||
219 | #address-cells = <1>; | ||
220 | #size-cells = <0>; | ||
221 | compatible = "fsl,gianfar-mdio"; | ||
222 | reg = <0x24520 0x20>; | ||
223 | phy2: ethernet-phy@2 { | ||
224 | interrupt-parent = <&ipic>; | ||
225 | interrupts = <17 0x8>; | ||
226 | reg = <0x2>; | ||
227 | device_type = "ethernet-phy"; | ||
228 | }; | ||
229 | phy3: ethernet-phy@3 { | ||
230 | interrupt-parent = <&ipic>; | ||
231 | interrupts = <18 0x8>; | ||
232 | reg = <0x3>; | ||
233 | device_type = "ethernet-phy"; | ||
234 | }; | ||
235 | tbi0: tbi-phy@11 { | ||
236 | reg = <0x11>; | ||
237 | device_type = "tbi-phy"; | ||
238 | }; | ||
239 | }; | ||
240 | |||
241 | mdio@25520 { | ||
242 | #address-cells = <1>; | ||
243 | #size-cells = <0>; | ||
244 | compatible = "fsl,gianfar-tbi"; | ||
245 | reg = <0x25520 0x20>; | ||
246 | |||
247 | tbi1: tbi-phy@11 { | ||
248 | reg = <0x11>; | ||
249 | device_type = "tbi-phy"; | ||
250 | }; | ||
251 | }; | ||
252 | |||
253 | |||
254 | enet0: ethernet@24000 { | 238 | enet0: ethernet@24000 { |
239 | #address-cells = <1>; | ||
240 | #size-cells = <1>; | ||
255 | cell-index = <0>; | 241 | cell-index = <0>; |
256 | device_type = "network"; | 242 | device_type = "network"; |
257 | model = "eTSEC"; | 243 | model = "eTSEC"; |
258 | compatible = "gianfar"; | 244 | compatible = "gianfar"; |
259 | reg = <0x24000 0x1000>; | 245 | reg = <0x24000 0x1000>; |
246 | ranges = <0x0 0x24000 0x1000>; | ||
260 | local-mac-address = [ 00 00 00 00 00 00 ]; | 247 | local-mac-address = [ 00 00 00 00 00 00 ]; |
261 | interrupts = <32 0x8 33 0x8 34 0x8>; | 248 | interrupts = <32 0x8 33 0x8 34 0x8>; |
262 | phy-connection-type = "mii"; | 249 | phy-connection-type = "mii"; |
263 | interrupt-parent = <&ipic>; | 250 | interrupt-parent = <&ipic>; |
264 | tbi-handle = <&tbi0>; | 251 | tbi-handle = <&tbi0>; |
265 | phy-handle = <&phy2>; | 252 | phy-handle = <&phy2>; |
253 | sleep = <&pmc 0xc0000000>; | ||
254 | fsl,magic-packet; | ||
255 | |||
256 | mdio@520 { | ||
257 | #address-cells = <1>; | ||
258 | #size-cells = <0>; | ||
259 | compatible = "fsl,gianfar-mdio"; | ||
260 | reg = <0x520 0x20>; | ||
261 | |||
262 | phy2: ethernet-phy@2 { | ||
263 | interrupt-parent = <&ipic>; | ||
264 | interrupts = <17 0x8>; | ||
265 | reg = <0x2>; | ||
266 | device_type = "ethernet-phy"; | ||
267 | }; | ||
268 | |||
269 | phy3: ethernet-phy@3 { | ||
270 | interrupt-parent = <&ipic>; | ||
271 | interrupts = <18 0x8>; | ||
272 | reg = <0x3>; | ||
273 | device_type = "ethernet-phy"; | ||
274 | }; | ||
275 | |||
276 | tbi0: tbi-phy@11 { | ||
277 | reg = <0x11>; | ||
278 | device_type = "tbi-phy"; | ||
279 | }; | ||
280 | }; | ||
266 | }; | 281 | }; |
267 | 282 | ||
268 | enet1: ethernet@25000 { | 283 | enet1: ethernet@25000 { |
284 | #address-cells = <1>; | ||
285 | #size-cells = <1>; | ||
269 | cell-index = <1>; | 286 | cell-index = <1>; |
270 | device_type = "network"; | 287 | device_type = "network"; |
271 | model = "eTSEC"; | 288 | model = "eTSEC"; |
272 | compatible = "gianfar"; | 289 | compatible = "gianfar"; |
273 | reg = <0x25000 0x1000>; | 290 | reg = <0x25000 0x1000>; |
291 | ranges = <0x0 0x25000 0x1000>; | ||
274 | local-mac-address = [ 00 00 00 00 00 00 ]; | 292 | local-mac-address = [ 00 00 00 00 00 00 ]; |
275 | interrupts = <35 0x8 36 0x8 37 0x8>; | 293 | interrupts = <35 0x8 36 0x8 37 0x8>; |
276 | phy-connection-type = "mii"; | 294 | phy-connection-type = "mii"; |
277 | interrupt-parent = <&ipic>; | 295 | interrupt-parent = <&ipic>; |
278 | tbi-handle = <&tbi1>; | 296 | tbi-handle = <&tbi1>; |
279 | phy-handle = <&phy3>; | 297 | phy-handle = <&phy3>; |
298 | sleep = <&pmc 0x30000000>; | ||
299 | fsl,magic-packet; | ||
300 | |||
301 | mdio@520 { | ||
302 | #address-cells = <1>; | ||
303 | #size-cells = <0>; | ||
304 | compatible = "fsl,gianfar-tbi"; | ||
305 | reg = <0x520 0x20>; | ||
306 | |||
307 | tbi1: tbi-phy@11 { | ||
308 | reg = <0x11>; | ||
309 | device_type = "tbi-phy"; | ||
310 | }; | ||
311 | }; | ||
280 | }; | 312 | }; |
281 | 313 | ||
282 | serial0: serial@4500 { | 314 | serial0: serial@4500 { |
@@ -309,14 +341,7 @@ | |||
309 | fsl,channel-fifo-len = <24>; | 341 | fsl,channel-fifo-len = <24>; |
310 | fsl,exec-units-mask = <0x9fe>; | 342 | fsl,exec-units-mask = <0x9fe>; |
311 | fsl,descriptor-types-mask = <0x3ab0ebf>; | 343 | fsl,descriptor-types-mask = <0x3ab0ebf>; |
312 | }; | 344 | sleep = <&pmc 0x03000000>; |
313 | |||
314 | sdhc@2e000 { | ||
315 | model = "eSDHC"; | ||
316 | compatible = "fsl,esdhc"; | ||
317 | reg = <0x2e000 0x1000>; | ||
318 | interrupts = <42 0x8>; | ||
319 | interrupt-parent = <&ipic>; | ||
320 | }; | 345 | }; |
321 | 346 | ||
322 | /* IPIC | 347 | /* IPIC |
@@ -332,6 +357,13 @@ | |||
332 | #interrupt-cells = <2>; | 357 | #interrupt-cells = <2>; |
333 | reg = <0x700 0x100>; | 358 | reg = <0x700 0x100>; |
334 | }; | 359 | }; |
360 | |||
361 | pmc: power@b00 { | ||
362 | compatible = "fsl,mpc8378-pmc", "fsl,mpc8349-pmc"; | ||
363 | reg = <0xb00 0x100 0xa00 0x100>; | ||
364 | interrupts = <80 0x8>; | ||
365 | interrupt-parent = <&ipic>; | ||
366 | }; | ||
335 | }; | 367 | }; |
336 | 368 | ||
337 | pci0: pci@e0008500 { | 369 | pci0: pci@e0008500 { |
@@ -387,6 +419,7 @@ | |||
387 | 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 | 419 | 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 |
388 | 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; | 420 | 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; |
389 | clock-frequency = <0>; | 421 | clock-frequency = <0>; |
422 | sleep = <&pmc 0x00010000>; | ||
390 | #interrupt-cells = <1>; | 423 | #interrupt-cells = <1>; |
391 | #size-cells = <2>; | 424 | #size-cells = <2>; |
392 | #address-cells = <3>; | 425 | #address-cells = <3>; |
@@ -395,4 +428,68 @@ | |||
395 | compatible = "fsl,mpc8349-pci"; | 428 | compatible = "fsl,mpc8349-pci"; |
396 | device_type = "pci"; | 429 | device_type = "pci"; |
397 | }; | 430 | }; |
431 | |||
432 | pci1: pcie@e0009000 { | ||
433 | #address-cells = <3>; | ||
434 | #size-cells = <2>; | ||
435 | #interrupt-cells = <1>; | ||
436 | device_type = "pci"; | ||
437 | compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie"; | ||
438 | reg = <0xe0009000 0x00001000>; | ||
439 | ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000 | ||
440 | 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>; | ||
441 | bus-range = <0 255>; | ||
442 | interrupt-map-mask = <0xf800 0 0 7>; | ||
443 | interrupt-map = <0 0 0 1 &ipic 1 8 | ||
444 | 0 0 0 2 &ipic 1 8 | ||
445 | 0 0 0 3 &ipic 1 8 | ||
446 | 0 0 0 4 &ipic 1 8>; | ||
447 | sleep = <&pmc 0x00300000>; | ||
448 | clock-frequency = <0>; | ||
449 | |||
450 | pcie@0 { | ||
451 | #address-cells = <3>; | ||
452 | #size-cells = <2>; | ||
453 | device_type = "pci"; | ||
454 | reg = <0 0 0 0 0>; | ||
455 | ranges = <0x02000000 0 0xa8000000 | ||
456 | 0x02000000 0 0xa8000000 | ||
457 | 0 0x10000000 | ||
458 | 0x01000000 0 0x00000000 | ||
459 | 0x01000000 0 0x00000000 | ||
460 | 0 0x00800000>; | ||
461 | }; | ||
462 | }; | ||
463 | |||
464 | pci2: pcie@e000a000 { | ||
465 | #address-cells = <3>; | ||
466 | #size-cells = <2>; | ||
467 | #interrupt-cells = <1>; | ||
468 | device_type = "pci"; | ||
469 | compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie"; | ||
470 | reg = <0xe000a000 0x00001000>; | ||
471 | ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000 | ||
472 | 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>; | ||
473 | bus-range = <0 255>; | ||
474 | interrupt-map-mask = <0xf800 0 0 7>; | ||
475 | interrupt-map = <0 0 0 1 &ipic 2 8 | ||
476 | 0 0 0 2 &ipic 2 8 | ||
477 | 0 0 0 3 &ipic 2 8 | ||
478 | 0 0 0 4 &ipic 2 8>; | ||
479 | sleep = <&pmc 0x000c0000>; | ||
480 | clock-frequency = <0>; | ||
481 | |||
482 | pcie@0 { | ||
483 | #address-cells = <3>; | ||
484 | #size-cells = <2>; | ||
485 | device_type = "pci"; | ||
486 | reg = <0 0 0 0 0>; | ||
487 | ranges = <0x02000000 0 0xc8000000 | ||
488 | 0x02000000 0 0xc8000000 | ||
489 | 0 0x10000000 | ||
490 | 0x01000000 0 0x00000000 | ||
491 | 0x01000000 0 0x00000000 | ||
492 | 0 0x00800000>; | ||
493 | }; | ||
494 | }; | ||
398 | }; | 495 | }; |