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Diffstat (limited to 'arch/powerpc/boot/dts/mpc8377_rdb.dts')
-rw-r--r--arch/powerpc/boot/dts/mpc8377_rdb.dts64
1 files changed, 64 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index 9413af3b9925..b4ab3d091e6e 100644
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -22,6 +22,8 @@
22 serial0 = &serial0; 22 serial0 = &serial0;
23 serial1 = &serial1; 23 serial1 = &serial1;
24 pci0 = &pci0; 24 pci0 = &pci0;
25 pci1 = &pci1;
26 pci2 = &pci2;
25 }; 27 };
26 28
27 cpus { 29 cpus {
@@ -350,4 +352,66 @@
350 compatible = "fsl,mpc8349-pci"; 352 compatible = "fsl,mpc8349-pci";
351 device_type = "pci"; 353 device_type = "pci";
352 }; 354 };
355
356 pci1: pcie@e0009000 {
357 #address-cells = <3>;
358 #size-cells = <2>;
359 #interrupt-cells = <1>;
360 device_type = "pci";
361 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
362 reg = <0xe0009000 0x00001000>;
363 ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
364 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
365 bus-range = <0 255>;
366 interrupt-map-mask = <0xf800 0 0 7>;
367 interrupt-map = <0 0 0 1 &ipic 1 8
368 0 0 0 2 &ipic 1 8
369 0 0 0 3 &ipic 1 8
370 0 0 0 4 &ipic 1 8>;
371 clock-frequency = <0>;
372
373 pcie@0 {
374 #address-cells = <3>;
375 #size-cells = <2>;
376 device_type = "pci";
377 reg = <0 0 0 0 0>;
378 ranges = <0x02000000 0 0xa8000000
379 0x02000000 0 0xa8000000
380 0 0x10000000
381 0x01000000 0 0x00000000
382 0x01000000 0 0x00000000
383 0 0x00800000>;
384 };
385 };
386
387 pci2: pcie@e000a000 {
388 #address-cells = <3>;
389 #size-cells = <2>;
390 #interrupt-cells = <1>;
391 device_type = "pci";
392 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
393 reg = <0xe000a000 0x00001000>;
394 ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
395 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
396 bus-range = <0 255>;
397 interrupt-map-mask = <0xf800 0 0 7>;
398 interrupt-map = <0 0 0 1 &ipic 2 8
399 0 0 0 2 &ipic 2 8
400 0 0 0 3 &ipic 2 8
401 0 0 0 4 &ipic 2 8>;
402 clock-frequency = <0>;
403
404 pcie@0 {
405 #address-cells = <3>;
406 #size-cells = <2>;
407 device_type = "pci";
408 reg = <0 0 0 0 0>;
409 ranges = <0x02000000 0 0xc8000000
410 0x02000000 0 0xc8000000
411 0 0x10000000
412 0x01000000 0 0x00000000
413 0x01000000 0 0x00000000
414 0 0x00800000>;
415 };
416 };
353}; 417};