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-rw-r--r--arch/powerpc/boot/dts/ksi8560.dts64
1 files changed, 53 insertions, 11 deletions
diff --git a/arch/powerpc/boot/dts/ksi8560.dts b/arch/powerpc/boot/dts/ksi8560.dts
index f869ce3ca0b7..49737589ffc8 100644
--- a/arch/powerpc/boot/dts/ksi8560.dts
+++ b/arch/powerpc/boot/dts/ksi8560.dts
@@ -40,6 +40,7 @@
40 timebase-frequency = <0>; /* From U-boot */ 40 timebase-frequency = <0>; /* From U-boot */
41 bus-frequency = <0>; /* From U-boot */ 41 bus-frequency = <0>; /* From U-boot */
42 clock-frequency = <0>; /* From U-boot */ 42 clock-frequency = <0>; /* From U-boot */
43 next-level-cache = <&L2>;
43 }; 44 };
44 }; 45 };
45 46
@@ -58,16 +59,16 @@
58 memory-controller@2000 { 59 memory-controller@2000 {
59 compatible = "fsl,8540-memory-controller"; 60 compatible = "fsl,8540-memory-controller";
60 reg = <0x2000 0x1000>; 61 reg = <0x2000 0x1000>;
61 interrupt-parent = <&MPIC>; 62 interrupt-parent = <&mpic>;
62 interrupts = <0x12 0x2>; 63 interrupts = <0x12 0x2>;
63 }; 64 };
64 65
65 l2-cache-controller@20000 { 66 L2: l2-cache-controller@20000 {
66 compatible = "fsl,8540-l2-cache-controller"; 67 compatible = "fsl,8540-l2-cache-controller";
67 reg = <0x20000 0x1000>; 68 reg = <0x20000 0x1000>;
68 cache-line-size = <0x20>; /* 32 bytes */ 69 cache-line-size = <0x20>; /* 32 bytes */
69 cache-size = <0x40000>; /* L2, 256K */ 70 cache-size = <0x40000>; /* L2, 256K */
70 interrupt-parent = <&MPIC>; 71 interrupt-parent = <&mpic>;
71 interrupts = <0x10 0x2>; 72 interrupts = <0x10 0x2>;
72 }; 73 };
73 74
@@ -78,10 +79,51 @@
78 compatible = "fsl-i2c"; 79 compatible = "fsl-i2c";
79 reg = <0x3000 0x100>; 80 reg = <0x3000 0x100>;
80 interrupts = <0x2b 0x2>; 81 interrupts = <0x2b 0x2>;
81 interrupt-parent = <&MPIC>; 82 interrupt-parent = <&mpic>;
82 dfsrr; 83 dfsrr;
83 }; 84 };
84 85
86 dma@21300 {
87 #address-cells = <1>;
88 #size-cells = <1>;
89 compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
90 reg = <0x21300 0x4>;
91 ranges = <0x0 0x21100 0x200>;
92 cell-index = <0>;
93 dma-channel@0 {
94 compatible = "fsl,mpc8560-dma-channel",
95 "fsl,eloplus-dma-channel";
96 reg = <0x0 0x80>;
97 cell-index = <0>;
98 interrupt-parent = <&mpic>;
99 interrupts = <20 2>;
100 };
101 dma-channel@80 {
102 compatible = "fsl,mpc8560-dma-channel",
103 "fsl,eloplus-dma-channel";
104 reg = <0x80 0x80>;
105 cell-index = <1>;
106 interrupt-parent = <&mpic>;
107 interrupts = <21 2>;
108 };
109 dma-channel@100 {
110 compatible = "fsl,mpc8560-dma-channel",
111 "fsl,eloplus-dma-channel";
112 reg = <0x100 0x80>;
113 cell-index = <2>;
114 interrupt-parent = <&mpic>;
115 interrupts = <22 2>;
116 };
117 dma-channel@180 {
118 compatible = "fsl,mpc8560-dma-channel",
119 "fsl,eloplus-dma-channel";
120 reg = <0x180 0x80>;
121 cell-index = <3>;
122 interrupt-parent = <&mpic>;
123 interrupts = <23 2>;
124 };
125 };
126
85 mdio@24520 { /* For TSECs */ 127 mdio@24520 { /* For TSECs */
86 #address-cells = <1>; 128 #address-cells = <1>;
87 #size-cells = <0>; 129 #size-cells = <0>;
@@ -89,13 +131,13 @@
89 reg = <0x24520 0x20>; 131 reg = <0x24520 0x20>;
90 132
91 PHY1: ethernet-phy@1 { 133 PHY1: ethernet-phy@1 {
92 interrupt-parent = <&MPIC>; 134 interrupt-parent = <&mpic>;
93 reg = <0x1>; 135 reg = <0x1>;
94 device_type = "ethernet-phy"; 136 device_type = "ethernet-phy";
95 }; 137 };
96 138
97 PHY2: ethernet-phy@2 { 139 PHY2: ethernet-phy@2 {
98 interrupt-parent = <&MPIC>; 140 interrupt-parent = <&mpic>;
99 reg = <0x2>; 141 reg = <0x2>;
100 device_type = "ethernet-phy"; 142 device_type = "ethernet-phy";
101 }; 143 };
@@ -109,7 +151,7 @@
109 /* Mac address filled in by bootwrapper */ 151 /* Mac address filled in by bootwrapper */
110 local-mac-address = [ 00 00 00 00 00 00 ]; 152 local-mac-address = [ 00 00 00 00 00 00 ];
111 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; 153 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
112 interrupt-parent = <&MPIC>; 154 interrupt-parent = <&mpic>;
113 phy-handle = <&PHY1>; 155 phy-handle = <&PHY1>;
114 }; 156 };
115 157
@@ -121,11 +163,11 @@
121 /* Mac address filled in by bootwrapper */ 163 /* Mac address filled in by bootwrapper */
122 local-mac-address = [ 00 00 00 00 00 00 ]; 164 local-mac-address = [ 00 00 00 00 00 00 ];
123 interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>; 165 interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
124 interrupt-parent = <&MPIC>; 166 interrupt-parent = <&mpic>;
125 phy-handle = <&PHY2>; 167 phy-handle = <&PHY2>;
126 }; 168 };
127 169
128 MPIC: pic@40000 { 170 mpic: pic@40000 {
129 #address-cells = <0>; 171 #address-cells = <0>;
130 #interrupt-cells = <2>; 172 #interrupt-cells = <2>;
131 interrupt-controller; 173 interrupt-controller;
@@ -164,7 +206,7 @@
164 #interrupt-cells = <2>; 206 #interrupt-cells = <2>;
165 interrupt-controller; 207 interrupt-controller;
166 interrupts = <0x2e 0x2>; 208 interrupts = <0x2e 0x2>;
167 interrupt-parent = <&MPIC>; 209 interrupt-parent = <&mpic>;
168 reg = <0x90c00 0x80>; 210 reg = <0x90c00 0x80>;
169 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic"; 211 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
170 }; 212 };
@@ -202,7 +244,7 @@
202 fsl,mdc-pin = <25>; 244 fsl,mdc-pin = <25>;
203 245
204 PHY0: ethernet-phy@0 { 246 PHY0: ethernet-phy@0 {
205 interrupt-parent = <&MPIC>; 247 interrupt-parent = <&mpic>;
206 reg = <0x0>; 248 reg = <0x0>;
207 device_type = "ethernet-phy"; 249 device_type = "ethernet-phy";
208 }; 250 };