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diff --git a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
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1/*
2 * P5040 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * This software is provided by Freescale Semiconductor "as is" and any
24 * express or implied warranties, including, but not limited to, the implied
25 * warranties of merchantability and fitness for a particular purpose are
26 * disclaimed. In no event shall Freescale Semiconductor be liable for any
27 * direct, indirect, incidental, special, exemplary, or consequential damages
28 * (including, but not limited to, procurement of substitute goods or services;
29 * loss of use, data, or profits; or business interruption) however caused and
30 * on any theory of liability, whether in contract, strict liability, or tort
31 * (including negligence or otherwise) arising in any way out of the use of this
32 * software, even if advised of the possibility of such damage.
33 */
34
35&lbc {
36 compatible = "fsl,p5040-elbc", "fsl,elbc", "simple-bus";
37 interrupts = <25 2 0 0>;
38 #address-cells = <2>;
39 #size-cells = <1>;
40};
41
42/* controller at 0x200000 */
43&pci0 {
44 compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4";
45 device_type = "pci";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0x0 0xff>;
49 clock-frequency = <33333333>;
50 interrupts = <16 2 1 15>;
51 pcie@0 {
52 reg = <0 0 0 0 0>;
53 #interrupt-cells = <1>;
54 #size-cells = <2>;
55 #address-cells = <3>;
56 device_type = "pci";
57 interrupts = <16 2 1 15>;
58 interrupt-map-mask = <0xf800 0 0 7>;
59 interrupt-map = <
60 /* IDSEL 0x0 */
61 0000 0 0 1 &mpic 40 1 0 0
62 0000 0 0 2 &mpic 1 1 0 0
63 0000 0 0 3 &mpic 2 1 0 0
64 0000 0 0 4 &mpic 3 1 0 0
65 >;
66 };
67};
68
69/* controller at 0x201000 */
70&pci1 {
71 compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4";
72 device_type = "pci";
73 #size-cells = <2>;
74 #address-cells = <3>;
75 bus-range = <0 0xff>;
76 clock-frequency = <33333333>;
77 interrupts = <16 2 1 14>;
78 pcie@0 {
79 reg = <0 0 0 0 0>;
80 #interrupt-cells = <1>;
81 #size-cells = <2>;
82 #address-cells = <3>;
83 device_type = "pci";
84 interrupts = <16 2 1 14>;
85 interrupt-map-mask = <0xf800 0 0 7>;
86 interrupt-map = <
87 /* IDSEL 0x0 */
88 0000 0 0 1 &mpic 41 1 0 0
89 0000 0 0 2 &mpic 5 1 0 0
90 0000 0 0 3 &mpic 6 1 0 0
91 0000 0 0 4 &mpic 7 1 0 0
92 >;
93 };
94};
95
96/* controller at 0x202000 */
97&pci2 {
98 compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4";
99 device_type = "pci";
100 #size-cells = <2>;
101 #address-cells = <3>;
102 bus-range = <0x0 0xff>;
103 clock-frequency = <33333333>;
104 interrupts = <16 2 1 13>;
105 pcie@0 {
106 reg = <0 0 0 0 0>;
107 #interrupt-cells = <1>;
108 #size-cells = <2>;
109 #address-cells = <3>;
110 device_type = "pci";
111 interrupts = <16 2 1 13>;
112 interrupt-map-mask = <0xf800 0 0 7>;
113 interrupt-map = <
114 /* IDSEL 0x0 */
115 0000 0 0 1 &mpic 42 1 0 0
116 0000 0 0 2 &mpic 9 1 0 0
117 0000 0 0 3 &mpic 10 1 0 0
118 0000 0 0 4 &mpic 11 1 0 0
119 >;
120 };
121};
122
123&dcsr {
124 #address-cells = <1>;
125 #size-cells = <1>;
126 compatible = "fsl,dcsr", "simple-bus";
127
128 dcsr-epu@0 {
129 compatible = "fsl,dcsr-epu";
130 interrupts = <52 2 0 0
131 84 2 0 0
132 85 2 0 0>;
133 reg = <0x0 0x1000>;
134 };
135 dcsr-npc {
136 compatible = "fsl,dcsr-npc";
137 reg = <0x1000 0x1000 0x1000000 0x8000>;
138 };
139 dcsr-nxc@2000 {
140 compatible = "fsl,dcsr-nxc";
141 reg = <0x2000 0x1000>;
142 };
143 dcsr-corenet {
144 compatible = "fsl,dcsr-corenet";
145 reg = <0x8000 0x1000 0xB0000 0x1000>;
146 };
147 dcsr-dpaa@9000 {
148 compatible = "fsl,p5040-dcsr-dpaa", "fsl,dcsr-dpaa";
149 reg = <0x9000 0x1000>;
150 };
151 dcsr-ocn@11000 {
152 compatible = "fsl,p5040-dcsr-ocn", "fsl,dcsr-ocn";
153 reg = <0x11000 0x1000>;
154 };
155 dcsr-ddr@12000 {
156 compatible = "fsl,dcsr-ddr";
157 dev-handle = <&ddr1>;
158 reg = <0x12000 0x1000>;
159 };
160 dcsr-ddr@13000 {
161 compatible = "fsl,dcsr-ddr";
162 dev-handle = <&ddr2>;
163 reg = <0x13000 0x1000>;
164 };
165 dcsr-nal@18000 {
166 compatible = "fsl,p5040-dcsr-nal", "fsl,dcsr-nal";
167 reg = <0x18000 0x1000>;
168 };
169 dcsr-rcpm@22000 {
170 compatible = "fsl,p5040-dcsr-rcpm", "fsl,dcsr-rcpm";
171 reg = <0x22000 0x1000>;
172 };
173 dcsr-cpu-sb-proxy@40000 {
174 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
175 cpu-handle = <&cpu0>;
176 reg = <0x40000 0x1000>;
177 };
178 dcsr-cpu-sb-proxy@41000 {
179 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
180 cpu-handle = <&cpu1>;
181 reg = <0x41000 0x1000>;
182 };
183 dcsr-cpu-sb-proxy@42000 {
184 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
185 cpu-handle = <&cpu2>;
186 reg = <0x42000 0x1000>;
187 };
188 dcsr-cpu-sb-proxy@43000 {
189 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
190 cpu-handle = <&cpu3>;
191 reg = <0x43000 0x1000>;
192 };
193};
194
195&soc {
196 #address-cells = <1>;
197 #size-cells = <1>;
198 device_type = "soc";
199 compatible = "simple-bus";
200
201 soc-sram-error {
202 compatible = "fsl,soc-sram-error";
203 interrupts = <16 2 1 29>;
204 };
205
206 corenet-law@0 {
207 compatible = "fsl,corenet-law";
208 reg = <0x0 0x1000>;
209 fsl,num-laws = <32>;
210 };
211
212 ddr1: memory-controller@8000 {
213 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
214 reg = <0x8000 0x1000>;
215 interrupts = <16 2 1 23>;
216 };
217
218 ddr2: memory-controller@9000 {
219 compatible = "fsl,qoriq-memory-controller-v4.5","fsl,qoriq-memory-controller";
220 reg = <0x9000 0x1000>;
221 interrupts = <16 2 1 22>;
222 };
223
224 cpc: l3-cache-controller@10000 {
225 compatible = "fsl,p5040-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
226 reg = <0x10000 0x1000
227 0x11000 0x1000>;
228 interrupts = <16 2 1 27
229 16 2 1 26>;
230 };
231
232 corenet-cf@18000 {
233 compatible = "fsl,corenet-cf";
234 reg = <0x18000 0x1000>;
235 interrupts = <16 2 1 31>;
236 fsl,ccf-num-csdids = <32>;
237 fsl,ccf-num-snoopids = <32>;
238 };
239
240 iommu@20000 {
241 compatible = "fsl,pamu-v1.0", "fsl,pamu";
242 reg = <0x20000 0x5000>;
243 interrupts = <
244 24 2 0 0
245 16 2 1 30>;
246 };
247
248/include/ "qoriq-mpic.dtsi"
249
250 guts: global-utilities@e0000 {
251 compatible = "fsl,p5040-device-config", "fsl,qoriq-device-config-1.0";
252 reg = <0xe0000 0xe00>;
253 fsl,has-rstcr;
254 #sleep-cells = <1>;
255 fsl,liodn-bits = <12>;
256 };
257
258 pins: global-utilities@e0e00 {
259 compatible = "fsl,p5040-pin-control", "fsl,qoriq-pin-control-1.0";
260 reg = <0xe0e00 0x200>;
261 #sleep-cells = <2>;
262 };
263
264 clockgen: global-utilities@e1000 {
265 compatible = "fsl,p5040-clockgen", "fsl,qoriq-clockgen-1.0";
266 reg = <0xe1000 0x1000>;
267 clock-frequency = <0>;
268 };
269
270 rcpm: global-utilities@e2000 {
271 compatible = "fsl,p5040-rcpm", "fsl,qoriq-rcpm-1.0";
272 reg = <0xe2000 0x1000>;
273 #sleep-cells = <1>;
274 };
275
276 sfp: sfp@e8000 {
277 compatible = "fsl,p5040-sfp", "fsl,qoriq-sfp-1.0";
278 reg = <0xe8000 0x1000>;
279 };
280
281 serdes: serdes@ea000 {
282 compatible = "fsl,p5040-serdes";
283 reg = <0xea000 0x1000>;
284 };
285
286/include/ "qoriq-dma-0.dtsi"
287/include/ "qoriq-dma-1.dtsi"
288/include/ "qoriq-espi-0.dtsi"
289 spi@110000 {
290 fsl,espi-num-chipselects = <4>;
291 };
292
293/include/ "qoriq-esdhc-0.dtsi"
294 sdhc@114000 {
295 sdhci,auto-cmd12;
296 };
297
298/include/ "qoriq-i2c-0.dtsi"
299/include/ "qoriq-i2c-1.dtsi"
300/include/ "qoriq-duart-0.dtsi"
301/include/ "qoriq-duart-1.dtsi"
302/include/ "qoriq-gpio-0.dtsi"
303/include/ "qoriq-usb2-mph-0.dtsi"
304 usb0: usb@210000 {
305 compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
306 phy_type = "utmi";
307 port0;
308 };
309
310/include/ "qoriq-usb2-dr-0.dtsi"
311 usb1: usb@211000 {
312 compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
313 dr_mode = "host";
314 phy_type = "utmi";
315 };
316
317/include/ "qoriq-sata2-0.dtsi"
318/include/ "qoriq-sata2-1.dtsi"
319/include/ "qoriq-sec5.2-0.dtsi"
320};
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-19 07:56:44 -0500