14 files changed, 72 insertions, 77 deletions

diff --git a/arch/parisc/kernel/Makefile b/arch/parisc/kernel/Makefile
index 1f6585a56f97..016d3fc4111c 100644
--- a/arch/parisc/kernel/Makefile
+++ b/arch/parisc/kernel/Makefile
@@ -4,9 +4,6 @@
 
 extra-y                 := init_task.o head.o vmlinux.lds
 
-AFLAGS_entry.o  := -traditional
-AFLAGS_pacache.o := -traditional
-
 obj-y           := cache.o pacache.o setup.o traps.o time.o irq.o \
                    pa7300lc.o syscall.o entry.o sys_parisc.o firmware.o \
                    ptrace.o hardware.o inventory.o drivers.o \
diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S
index 111d47284eac..d1fa4edd2d80 100644
--- a/arch/parisc/kernel/entry.S
+++ b/arch/parisc/kernel/entry.S
@@ -40,16 +40,8 @@
 #include <linux/linkage.h>
 
 #ifdef CONFIG_64BIT
-#define CMPIB           cmpib,*
-#define CMPB            cmpb,*
-#define COND(x)         *x
-
         .level 2.0w
 #else
-#define CMPIB           cmpib,
-#define CMPB            cmpb,
-#define COND(x)         x
-
         .level 2.0
 #endif
 
@@ -957,9 +949,9 @@ intr_check_sig:
          * Only do signals if we are returning to user space
          */
         LDREG   PT_IASQ0(%r16), %r20
-        CMPIB=,n 0,%r20,intr_restore /* backward */
+        cmpib,COND(=),n 0,%r20,intr_restore /* backward */
         LDREG   PT_IASQ1(%r16), %r20
-        CMPIB=,n 0,%r20,intr_restore /* backward */
+        cmpib,COND(=),n 0,%r20,intr_restore /* backward */
 
         copy    %r0, %r25                       /* long in_syscall = 0 */
 #ifdef CONFIG_64BIT
@@ -1013,10 +1005,10 @@ intr_do_resched:
          * we jump back to intr_restore.
          */
         LDREG   PT_IASQ0(%r16), %r20
-        CMPIB=  0, %r20, intr_do_preempt
+        cmpib,COND(=)   0, %r20, intr_do_preempt
         nop
         LDREG   PT_IASQ1(%r16), %r20
-        CMPIB=  0, %r20, intr_do_preempt
+        cmpib,COND(=)   0, %r20, intr_do_preempt
         nop
 
 #ifdef CONFIG_64BIT
@@ -1045,7 +1037,7 @@ intr_do_preempt:
         /* current_thread_info()->preempt_count */
         mfctl   %cr30, %r1
         LDREG   TI_PRE_COUNT(%r1), %r19
-        CMPIB<> 0, %r19, intr_restore   /* if preempt_count > 0 */
+        cmpib,COND(<>)  0, %r19, intr_restore   /* if preempt_count > 0 */
         nop                             /* prev insn branched backwards */
 
         /* check if we interrupted a critical path */
@@ -1064,7 +1056,7 @@ intr_do_preempt:
          */
 
 intr_extint:
-        CMPIB=,n 0,%r16,1f
+        cmpib,COND(=),n 0,%r16,1f
 
         get_stack_use_cr30
         b,n 2f
@@ -1099,7 +1091,7 @@ ENDPROC(syscall_exit_rfi)
 
 ENTRY(intr_save)                /* for os_hpmc */
         mfsp    %sr7,%r16
-        CMPIB=,n 0,%r16,1f
+        cmpib,COND(=),n 0,%r16,1f
         get_stack_use_cr30
         b       2f
         copy    %r8,%r26
@@ -1121,7 +1113,7 @@ ENTRY(intr_save)		/* for os_hpmc */
          *           adjust isr/ior below.
          */
 
-        CMPIB=,n        6,%r26,skip_save_ior
+        cmpib,COND(=),n        6,%r26,skip_save_ior
 
 
         mfctl           %cr20, %r16 /* isr */
@@ -1450,11 +1442,11 @@ nadtlb_emulate:
         bb,>=,n         %r9,26,nadtlb_nullify  /* m bit not set, just nullify */
         BL              get_register,%r25
         extrw,u         %r9,15,5,%r8           /* Get index register # */
-        CMPIB=,n        -1,%r1,nadtlb_fault    /* have to use slow path */
+        cmpib,COND(=),n        -1,%r1,nadtlb_fault    /* have to use slow path */
         copy            %r1,%r24
         BL              get_register,%r25
         extrw,u         %r9,10,5,%r8           /* Get base register # */
-        CMPIB=,n        -1,%r1,nadtlb_fault    /* have to use slow path */
+        cmpib,COND(=),n        -1,%r1,nadtlb_fault    /* have to use slow path */
         BL              set_register,%r25
         add,l           %r1,%r24,%r1           /* doesn't affect c/b bits */
 
@@ -1486,7 +1478,7 @@ nadtlb_probe_check:
         cmpb,<>,n       %r16,%r17,nadtlb_fault /* Must be probe,[rw]*/
         BL              get_register,%r25      /* Find the target register */
         extrw,u         %r9,31,5,%r8           /* Get target register */
-        CMPIB=,n        -1,%r1,nadtlb_fault    /* have to use slow path */
+        cmpib,COND(=),n        -1,%r1,nadtlb_fault    /* have to use slow path */
         BL              set_register,%r25
         copy            %r0,%r1                /* Write zero to target register */
         b nadtlb_nullify                       /* Nullify return insn */
@@ -1570,12 +1562,12 @@ dbit_trap_20w:
         L3_ptep         ptp,pte,t0,va,dbit_fault
 
 #ifdef CONFIG_SMP
-        CMPIB=,n        0,spc,dbit_nolock_20w
+        cmpib,COND(=),n        0,spc,dbit_nolock_20w
         load32          PA(pa_dbit_lock),t0
 
 dbit_spin_20w:
         LDCW            0(t0),t1
-        cmpib,=         0,t1,dbit_spin_20w
+        cmpib,COND(=)         0,t1,dbit_spin_20w
         nop
 
 dbit_nolock_20w:
@@ -1586,7 +1578,7 @@ dbit_nolock_20w:
                 
         idtlbt          pte,prot
 #ifdef CONFIG_SMP
-        CMPIB=,n        0,spc,dbit_nounlock_20w
+        cmpib,COND(=),n        0,spc,dbit_nounlock_20w
         ldi             1,t1
         stw             t1,0(t0)
 
@@ -1606,7 +1598,7 @@ dbit_trap_11:
         L2_ptep         ptp,pte,t0,va,dbit_fault
 
 #ifdef CONFIG_SMP
-        CMPIB=,n        0,spc,dbit_nolock_11
+        cmpib,COND(=),n        0,spc,dbit_nolock_11
         load32          PA(pa_dbit_lock),t0
 
 dbit_spin_11:
@@ -1628,7 +1620,7 @@ dbit_nolock_11:
 
         mtsp            t1, %sr1     /* Restore sr1 */
 #ifdef CONFIG_SMP
-        CMPIB=,n        0,spc,dbit_nounlock_11
+        cmpib,COND(=),n        0,spc,dbit_nounlock_11
         ldi             1,t1
         stw             t1,0(t0)
 
@@ -1646,7 +1638,7 @@ dbit_trap_20:
         L2_ptep         ptp,pte,t0,va,dbit_fault
 
 #ifdef CONFIG_SMP
-        CMPIB=,n        0,spc,dbit_nolock_20
+        cmpib,COND(=),n        0,spc,dbit_nolock_20
         load32          PA(pa_dbit_lock),t0
 
 dbit_spin_20:
@@ -1665,7 +1657,7 @@ dbit_nolock_20:
         idtlbt          pte,prot
 
 #ifdef CONFIG_SMP
-        CMPIB=,n        0,spc,dbit_nounlock_20
+        cmpib,COND(=),n        0,spc,dbit_nounlock_20
         ldi             1,t1
         stw             t1,0(t0)
 
@@ -1994,7 +1986,7 @@ ENTRY(syscall_exit)
 
         /* We can't use "CMPIB<> PER_HPUX" since "im5" field is sign extended */
         ldo       -PER_HPUX(%r19), %r19
-        CMPIB<>,n 0,%r19,1f
+        cmpib,COND(<>),n 0,%r19,1f
 
         /* Save other hpux returns if personality is PER_HPUX */
         STREG     %r22,TASK_PT_GR22(%r1)
diff --git a/arch/parisc/kernel/head.S b/arch/parisc/kernel/head.S
index ec2482dc1beb..a84e31e82876 100644
--- a/arch/parisc/kernel/head.S
+++ b/arch/parisc/kernel/head.S
@@ -32,7 +32,8 @@ ENTRY(boot_args)
         .word 0 /* arg3 */
 END(boot_args)
 
-        .section .text.head
+        __HEAD
+
         .align  4
         .import init_thread_union,data
         .import fault_vector_20,code    /* IVA parisc 2.0 32 bit */
diff --git a/arch/parisc/kernel/init_task.c b/arch/parisc/kernel/init_task.c
index 26198a074d67..f5941c086551 100644
--- a/arch/parisc/kernel/init_task.c
+++ b/arch/parisc/kernel/init_task.c
@@ -35,7 +35,6 @@
 #include <asm/pgalloc.h>
 
 static struct fs_struct init_fs = INIT_FS;
-static struct files_struct init_files = INIT_FILES;
 static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
 static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
 struct mm_struct init_mm = INIT_MM(init_mm);
diff --git a/arch/parisc/kernel/inventory.c b/arch/parisc/kernel/inventory.c
index 4845a6444633..bd1f7f1ff74e 100644
--- a/arch/parisc/kernel/inventory.c
+++ b/arch/parisc/kernel/inventory.c
@@ -499,7 +499,7 @@ add_system_map_addresses(struct parisc_device *dev, int num_addrs,
         dev->addr = kmalloc(num_addrs * sizeof(unsigned long), GFP_KERNEL);
         if(!dev->addr) {
                 printk(KERN_ERR "%s %s(): memory allocation failure\n",
-                       __FILE__, __FUNCTION__);
+                       __FILE__, __func__);
                 return;
         }
 
diff --git a/arch/parisc/kernel/pacache.S b/arch/parisc/kernel/pacache.S
index 5901092e0196..09b77b2553c6 100644
--- a/arch/parisc/kernel/pacache.S
+++ b/arch/parisc/kernel/pacache.S
@@ -85,7 +85,7 @@ ENTRY(flush_tlb_all_local)
         LDREG           ITLB_OFF_COUNT(%r1), %arg2
         LDREG           ITLB_LOOP(%r1), %arg3
 
-        ADDIB=          -1, %arg3, fitoneloop   /* Preadjust and test */
+        addib,COND(=)           -1, %arg3, fitoneloop   /* Preadjust and test */
         movb,<,n        %arg3, %r31, fitdone    /* If loop < 0, skip */
         copy            %arg0, %r28             /* Init base addr */
 
@@ -95,14 +95,14 @@ fitmanyloop:					/* Loop if LOOP >= 2 */
         copy            %arg2, %r29             /* Init middle loop count */
 
 fitmanymiddle:                                  /* Loop if LOOP >= 2 */
-        ADDIB>          -1, %r31, fitmanymiddle /* Adjusted inner loop decr */
+        addib,COND(>)           -1, %r31, fitmanymiddle /* Adjusted inner loop decr */
         pitlbe          0(%sr1, %r28)
         pitlbe,m        %arg1(%sr1, %r28)       /* Last pitlbe and addr adjust */
-        ADDIB>          -1, %r29, fitmanymiddle /* Middle loop decr */
+        addib,COND(>)           -1, %r29, fitmanymiddle /* Middle loop decr */
         copy            %arg3, %r31             /* Re-init inner loop count */
 
         movb,tr         %arg0, %r28, fitmanyloop /* Re-init base addr */
-        ADDIB<=,n       -1, %r22, fitdone       /* Outer loop count decr */
+        addib,COND(<=),n        -1, %r22, fitdone       /* Outer loop count decr */
 
 fitoneloop:                                     /* Loop if LOOP = 1 */
         mtsp            %r20, %sr1
@@ -110,10 +110,10 @@ fitoneloop:					/* Loop if LOOP = 1 */
         copy            %arg2, %r29             /* init middle loop count */
 
 fitonemiddle:                                   /* Loop if LOOP = 1 */
-        ADDIB>          -1, %r29, fitonemiddle  /* Middle loop count decr */
+        addib,COND(>)           -1, %r29, fitonemiddle  /* Middle loop count decr */
         pitlbe,m        %arg1(%sr1, %r28)       /* pitlbe for one loop */
 
-        ADDIB>          -1, %r22, fitoneloop    /* Outer loop count decr */
+        addib,COND(>)           -1, %r22, fitoneloop    /* Outer loop count decr */
         add             %r21, %r20, %r20                /* increment space */
 
 fitdone:
@@ -128,7 +128,7 @@ fitdone:
         LDREG           DTLB_OFF_COUNT(%r1), %arg2
         LDREG           DTLB_LOOP(%r1), %arg3
 
-        ADDIB=          -1, %arg3, fdtoneloop   /* Preadjust and test */
+        addib,COND(=)           -1, %arg3, fdtoneloop   /* Preadjust and test */
         movb,<,n        %arg3, %r31, fdtdone    /* If loop < 0, skip */
         copy            %arg0, %r28             /* Init base addr */
 
@@ -138,14 +138,14 @@ fdtmanyloop:					/* Loop if LOOP >= 2 */
         copy            %arg2, %r29             /* Init middle loop count */
 
 fdtmanymiddle:                                  /* Loop if LOOP >= 2 */
-        ADDIB>          -1, %r31, fdtmanymiddle /* Adjusted inner loop decr */
+        addib,COND(>)           -1, %r31, fdtmanymiddle /* Adjusted inner loop decr */
         pdtlbe          0(%sr1, %r28)
         pdtlbe,m        %arg1(%sr1, %r28)       /* Last pdtlbe and addr adjust */
-        ADDIB>          -1, %r29, fdtmanymiddle /* Middle loop decr */
+        addib,COND(>)           -1, %r29, fdtmanymiddle /* Middle loop decr */
         copy            %arg3, %r31             /* Re-init inner loop count */
 
         movb,tr         %arg0, %r28, fdtmanyloop /* Re-init base addr */
-        ADDIB<=,n       -1, %r22,fdtdone        /* Outer loop count decr */
+        addib,COND(<=),n        -1, %r22,fdtdone        /* Outer loop count decr */
 
 fdtoneloop:                                     /* Loop if LOOP = 1 */
         mtsp            %r20, %sr1
@@ -153,10 +153,10 @@ fdtoneloop:					/* Loop if LOOP = 1 */
         copy            %arg2, %r29             /* init middle loop count */
 
 fdtonemiddle:                                   /* Loop if LOOP = 1 */
-        ADDIB>          -1, %r29, fdtonemiddle  /* Middle loop count decr */
+        addib,COND(>)           -1, %r29, fdtonemiddle  /* Middle loop count decr */
         pdtlbe,m        %arg1(%sr1, %r28)       /* pdtlbe for one loop */
 
-        ADDIB>          -1, %r22, fdtoneloop    /* Outer loop count decr */
+        addib,COND(>)           -1, %r22, fdtoneloop    /* Outer loop count decr */
         add             %r21, %r20, %r20        /* increment space */
 
 
@@ -209,18 +209,18 @@ ENTRY(flush_instruction_cache_local)
         LDREG           ICACHE_COUNT(%r1), %arg2
         LDREG           ICACHE_LOOP(%r1), %arg3
         rsm             PSW_SM_I, %r22          /* No mmgt ops during loop*/
-        ADDIB=          -1, %arg3, fioneloop    /* Preadjust and test */
+        addib,COND(=)           -1, %arg3, fioneloop    /* Preadjust and test */
         movb,<,n        %arg3, %r31, fisync     /* If loop < 0, do sync */
 
 fimanyloop:                                     /* Loop if LOOP >= 2 */
-        ADDIB>          -1, %r31, fimanyloop    /* Adjusted inner loop decr */
+        addib,COND(>)           -1, %r31, fimanyloop    /* Adjusted inner loop decr */
         fice            %r0(%sr1, %arg0)
         fice,m          %arg1(%sr1, %arg0)      /* Last fice and addr adjust */
         movb,tr         %arg3, %r31, fimanyloop /* Re-init inner loop count */
-        ADDIB<=,n       -1, %arg2, fisync       /* Outer loop decr */
+        addib,COND(<=),n        -1, %arg2, fisync       /* Outer loop decr */
 
 fioneloop:                                      /* Loop if LOOP = 1 */
-        ADDIB>          -1, %arg2, fioneloop    /* Outer loop count decr */
+        addib,COND(>)           -1, %arg2, fioneloop    /* Outer loop count decr */
         fice,m          %arg1(%sr1, %arg0)      /* Fice for one loop */
 
 fisync:
@@ -250,18 +250,18 @@ ENTRY(flush_data_cache_local)
         LDREG           DCACHE_COUNT(%r1), %arg2
         LDREG           DCACHE_LOOP(%r1), %arg3
         rsm             PSW_SM_I, %r22
-        ADDIB=          -1, %arg3, fdoneloop    /* Preadjust and test */
+        addib,COND(=)           -1, %arg3, fdoneloop    /* Preadjust and test */
         movb,<,n        %arg3, %r31, fdsync     /* If loop < 0, do sync */
 
 fdmanyloop:                                     /* Loop if LOOP >= 2 */
-        ADDIB>          -1, %r31, fdmanyloop    /* Adjusted inner loop decr */
+        addib,COND(>)           -1, %r31, fdmanyloop    /* Adjusted inner loop decr */
         fdce            %r0(%sr1, %arg0)
         fdce,m          %arg1(%sr1, %arg0)      /* Last fdce and addr adjust */
         movb,tr         %arg3, %r31, fdmanyloop /* Re-init inner loop count */
-        ADDIB<=,n       -1, %arg2, fdsync       /* Outer loop decr */
+        addib,COND(<=),n        -1, %arg2, fdsync       /* Outer loop decr */
 
 fdoneloop:                                      /* Loop if LOOP = 1 */
-        ADDIB>          -1, %arg2, fdoneloop    /* Outer loop count decr */
+        addib,COND(>)           -1, %arg2, fdoneloop    /* Outer loop count decr */
         fdce,m          %arg1(%sr1, %arg0)      /* Fdce for one loop */
 
 fdsync:
@@ -342,7 +342,7 @@ ENTRY(copy_user_page_asm)
          * non-taken backward branch. Note that .+4 is a backwards branch.
          * The ldd should only get executed if the branch is taken.
          */
-        ADDIB>,n        -1, %r1, 1b             /* bundle 10 */
+        addib,COND(>),n -1, %r1, 1b             /* bundle 10 */
         ldd             0(%r25), %r19           /* start next loads */
 
 #else
@@ -391,7 +391,7 @@ ENTRY(copy_user_page_asm)
         stw             %r21, 56(%r26)
         stw             %r22, 60(%r26)
         ldo             64(%r26), %r26
-        ADDIB>,n        -1, %r1, 1b
+        addib,COND(>),n -1, %r1, 1b
         ldw             0(%r25), %r19
 #endif
         bv              %r0(%r2)
@@ -515,7 +515,7 @@ ENTRY(copy_user_page_asm)
         stw             %r21, 56(%r28)
         stw             %r22, 60(%r28)
         ldo             64(%r28), %r28
-        ADDIB>          -1, %r1,1b
+        addib,COND(>)           -1, %r1,1b
         ldo             64(%r29), %r29
 
         bv              %r0(%r2)
@@ -574,7 +574,7 @@ ENTRY(__clear_user_page_asm)
         std             %r0, 104(%r28)
         std             %r0, 112(%r28)
         std             %r0, 120(%r28)
-        ADDIB>          -1, %r1, 1b
+        addib,COND(>)           -1, %r1, 1b
         ldo             128(%r28), %r28
 
 #else   /* ! CONFIG_64BIT */
@@ -597,7 +597,7 @@ ENTRY(__clear_user_page_asm)
         stw             %r0, 52(%r28)
         stw             %r0, 56(%r28)
         stw             %r0, 60(%r28)
-        ADDIB>          -1, %r1, 1b
+        addib,COND(>)           -1, %r1, 1b
         ldo             64(%r28), %r28
 #endif  /* CONFIG_64BIT */
 
@@ -640,7 +640,7 @@ ENTRY(flush_kernel_dcache_page_asm)
         fdc,m           %r23(%r26)
         fdc,m           %r23(%r26)
         fdc,m           %r23(%r26)
-        CMPB<<          %r26, %r25,1b
+        cmpb,COND(<<)           %r26, %r25,1b
         fdc,m           %r23(%r26)
 
         sync
@@ -683,7 +683,7 @@ ENTRY(flush_user_dcache_page)
         fdc,m           %r23(%sr3, %r26)
         fdc,m           %r23(%sr3, %r26)
         fdc,m           %r23(%sr3, %r26)
-        CMPB<<          %r26, %r25,1b
+        cmpb,COND(<<)           %r26, %r25,1b
         fdc,m           %r23(%sr3, %r26)
 
         sync
@@ -726,7 +726,7 @@ ENTRY(flush_user_icache_page)
         fic,m           %r23(%sr3, %r26)
         fic,m           %r23(%sr3, %r26)
         fic,m           %r23(%sr3, %r26)
-        CMPB<<          %r26, %r25,1b
+        cmpb,COND(<<)           %r26, %r25,1b
         fic,m           %r23(%sr3, %r26)
 
         sync
@@ -769,7 +769,7 @@ ENTRY(purge_kernel_dcache_page)
         pdc,m           %r23(%r26)
         pdc,m           %r23(%r26)
         pdc,m           %r23(%r26)
-        CMPB<<          %r26, %r25, 1b
+        cmpb,COND(<<)           %r26, %r25, 1b
         pdc,m           %r23(%r26)
 
         sync
@@ -833,7 +833,7 @@ ENTRY(flush_alias_page)
         fdc,m           %r23(%r28)
         fdc,m           %r23(%r28)
         fdc,m           %r23(%r28)
-        CMPB<<          %r28, %r29, 1b
+        cmpb,COND(<<)           %r28, %r29, 1b
         fdc,m           %r23(%r28)
 
         sync
@@ -856,7 +856,7 @@ flush_user_dcache_range_asm:
         ldo             -1(%r23), %r21
         ANDCM           %r26, %r21, %r26
 
-1:      CMPB<<,n        %r26, %r25, 1b
+1:      cmpb,COND(<<),n %r26, %r25, 1b
         fdc,m           %r23(%sr3, %r26)
 
         sync
@@ -877,7 +877,7 @@ ENTRY(flush_kernel_dcache_range_asm)
         ldo             -1(%r23), %r21
         ANDCM           %r26, %r21, %r26
 
-1:      CMPB<<,n        %r26, %r25,1b
+1:      cmpb,COND(<<),n %r26, %r25,1b
         fdc,m           %r23(%r26)
 
         sync
@@ -899,7 +899,7 @@ ENTRY(flush_user_icache_range_asm)
         ldo             -1(%r23), %r21
         ANDCM           %r26, %r21, %r26
 
-1:      CMPB<<,n        %r26, %r25,1b
+1:      cmpb,COND(<<),n %r26, %r25,1b
         fic,m           %r23(%sr3, %r26)
 
         sync
@@ -942,7 +942,7 @@ ENTRY(flush_kernel_icache_page)
         fic,m           %r23(%sr4, %r26)
         fic,m           %r23(%sr4, %r26)
         fic,m           %r23(%sr4, %r26)
-        CMPB<<          %r26, %r25, 1b
+        cmpb,COND(<<)           %r26, %r25, 1b
         fic,m           %r23(%sr4, %r26)
 
         sync
@@ -963,7 +963,7 @@ ENTRY(flush_kernel_icache_range_asm)
         ldo             -1(%r23), %r21
         ANDCM           %r26, %r21, %r26
 
-1:      CMPB<<,n        %r26, %r25, 1b
+1:      cmpb,COND(<<),n %r26, %r25, 1b
         fic,m           %r23(%sr4, %r26)
 
         sync
diff --git a/arch/parisc/kernel/parisc_ksyms.c b/arch/parisc/kernel/parisc_ksyms.c
index 5b7fc4aa044d..0eecfbbc59cd 100644
--- a/arch/parisc/kernel/parisc_ksyms.c
+++ b/arch/parisc/kernel/parisc_ksyms.c
@@ -152,3 +152,6 @@ EXPORT_SYMBOL($$dyncall);
 EXPORT_SYMBOL(node_data);
 EXPORT_SYMBOL(pfnnid_map);
 #endif
+
+/* from pacache.S -- needed for copy_page */
+EXPORT_SYMBOL(copy_user_page_asm);
diff --git a/arch/parisc/kernel/perf_asm.S b/arch/parisc/kernel/perf_asm.S
index 43874ca3ed67..fa6ea99bb324 100644
--- a/arch/parisc/kernel/perf_asm.S
+++ b/arch/parisc/kernel/perf_asm.S
@@ -20,6 +20,8 @@
  */
 
 #include <asm/assembly.h>
+
+#include <linux/init.h>
 #include <linux/linkage.h>
 
 #ifdef CONFIG_64BIT
diff --git a/arch/parisc/kernel/signal32.c b/arch/parisc/kernel/signal32.c
index db94affe5c71..fb59852006de 100644
--- a/arch/parisc/kernel/signal32.c
+++ b/arch/parisc/kernel/signal32.c
@@ -289,7 +289,7 @@ setup_sigcontext32(struct compat_sigcontext __user *sc, struct compat_regfile __
                                 &sc->sc_iaoq[0], compat_reg);
                 
                 /* Store upper half */
-                compat_reg = (compat_uint_t)(regs->gr[32] >> 32);
+                compat_reg = (compat_uint_t)(regs->gr[31] >> 32);
                 err |= __put_user(compat_reg, &rf->rf_iaoq[0]);
                 DBG(2,"setup_sigcontext32: upper half iaoq[0] = %#x\n", compat_reg);
                 
@@ -299,7 +299,7 @@ setup_sigcontext32(struct compat_sigcontext __user *sc, struct compat_regfile __
                 DBG(2,"setup_sigcontext32: sc->sc_iaoq[1] = %p <= %#x\n",
                                 &sc->sc_iaoq[1], compat_reg);
                 /* Store upper half */
-                compat_reg = (compat_uint_t)((regs->gr[32]+4) >> 32);
+                compat_reg = (compat_uint_t)((regs->gr[31]+4) >> 32);
                 err |= __put_user(compat_reg, &rf->rf_iaoq[1]);
                 DBG(2,"setup_sigcontext32: upper half iaoq[1] = %#x\n", compat_reg);
                 
diff --git a/arch/parisc/kernel/traps.c b/arch/parisc/kernel/traps.c
index 9dc6dc42f9cf..675f1d098f05 100644
--- a/arch/parisc/kernel/traps.c
+++ b/arch/parisc/kernel/traps.c
@@ -275,7 +275,7 @@ KERN_CRIT "                     ||     ||\n");
 
         /* Wot's wrong wif bein' racy? */
         if (current->thread.flags & PARISC_KERNEL_DEATH) {
-                printk(KERN_CRIT "%s() recursion detected.\n", __FUNCTION__);
+                printk(KERN_CRIT "%s() recursion detected.\n", __func__);
                 local_irq_enable();
                 while (1);
         }
diff --git a/arch/parisc/kernel/unaligned.c b/arch/parisc/kernel/unaligned.c
index aebf3c168871..e6f4b7a4b7e3 100644
--- a/arch/parisc/kernel/unaligned.c
+++ b/arch/parisc/kernel/unaligned.c
@@ -30,7 +30,7 @@
 /* #define DEBUG_UNALIGNED 1 */
 
 #ifdef DEBUG_UNALIGNED
-#define DPRINTF(fmt, args...) do { printk(KERN_DEBUG "%s:%d:%s ", __FILE__, __LINE__, __FUNCTION__ ); printk(KERN_DEBUG fmt, ##args ); } while (0)
+#define DPRINTF(fmt, args...) do { printk(KERN_DEBUG "%s:%d:%s ", __FILE__, __LINE__, __func__ ); printk(KERN_DEBUG fmt, ##args ); } while (0)
 #else
 #define DPRINTF(fmt, args...)
 #endif
@@ -460,7 +460,8 @@ void handle_unaligned(struct pt_regs *regs)
                         goto force_sigbus;
                 }
 
-                if (unaligned_count > 5 && jiffies - last_time > 5*HZ) {
+                if (unaligned_count > 5 &&
+                                time_after(jiffies, last_time + 5 * HZ)) {
                         unaligned_count = 0;
                         last_time = jiffies;
                 }
diff --git a/arch/parisc/kernel/vmlinux.lds.S b/arch/parisc/kernel/vmlinux.lds.S
index 50b4a3a25d0a..2e516b871752 100644
--- a/arch/parisc/kernel/vmlinux.lds.S
+++ b/arch/parisc/kernel/vmlinux.lds.S
@@ -50,6 +50,7 @@ SECTIONS
 
         _text = .;              /* Text and read-only data */
         .text ALIGN(16) : {
+                HEAD_TEXT
                 TEXT_TEXT
                 SCHED_TEXT
                 LOCK_TEXT
diff --git a/arch/parisc/lib/memcpy.c b/arch/parisc/lib/memcpy.c
index d22042d33100..2d68431fc22e 100644
--- a/arch/parisc/lib/memcpy.c
+++ b/arch/parisc/lib/memcpy.c
@@ -91,7 +91,7 @@ DECLARE_PER_CPU(struct exception_data, exception_data);
 #define THRESHOLD       16
 
 #ifdef DEBUG_MEMCPY
-#define DPRINTF(fmt, args...) do { printk(KERN_DEBUG "%s:%d:%s ", __FILE__, __LINE__, __FUNCTION__ ); printk(KERN_DEBUG fmt, ##args ); } while (0)
+#define DPRINTF(fmt, args...) do { printk(KERN_DEBUG "%s:%d:%s ", __FILE__, __LINE__, __func__ ); printk(KERN_DEBUG fmt, ##args ); } while (0)
 #else
 #define DPRINTF(fmt, args...)
 #endif
diff --git a/arch/parisc/mm/init.c b/arch/parisc/mm/init.c
index 1f012843150f..ce0da689a89d 100644
--- a/arch/parisc/mm/init.c
+++ b/arch/parisc/mm/init.c
@@ -547,6 +547,7 @@ void __init mem_init(void)
 }
 
 unsigned long *empty_zero_page __read_mostly;
+EXPORT_SYMBOL(empty_zero_page);
 
 void show_mem(void)
 {
@@ -555,8 +556,6 @@ void show_mem(void)
 
         printk(KERN_INFO "Mem-info:\n");
         show_free_areas();
-        printk(KERN_INFO "Free swap:     %6ldkB\n",
-                                nr_swap_pages<<(PAGE_SHIFT-10));
 #ifndef CONFIG_DISCONTIGMEM
         i = max_mapnr;
         while (i-- > 0) {
@@ -606,7 +605,7 @@ void show_mem(void)
                 int i, j;
 
                 for (i = 0; i < npmem_ranges; i++) {
-                        zl = node_zonelist(i);
+                        zl = node_zonelist(i, 0);
                         for (j = 0; j < MAX_NR_ZONES; j++) {
                                 struct zoneref *z;
                                 struct zone *zone;