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-rw-r--r--arch/parisc/include/asm/assembly.h11
-rw-r--r--arch/parisc/include/asm/io.h51
-rw-r--r--arch/parisc/include/asm/irq.h2
-rw-r--r--arch/parisc/include/asm/uaccess.h1
4 files changed, 50 insertions, 15 deletions
diff --git a/arch/parisc/include/asm/assembly.h b/arch/parisc/include/asm/assembly.h
index ffb208840ecc..89fb40005e3f 100644
--- a/arch/parisc/include/asm/assembly.h
+++ b/arch/parisc/include/asm/assembly.h
@@ -79,6 +79,7 @@
79 79
80#include <asm/asm-offsets.h> 80#include <asm/asm-offsets.h>
81#include <asm/page.h> 81#include <asm/page.h>
82#include <asm/types.h>
82 83
83#include <asm/asmregs.h> 84#include <asm/asmregs.h>
84 85
@@ -129,27 +130,27 @@
129 130
130 /* Shift Left - note the r and t can NOT be the same! */ 131 /* Shift Left - note the r and t can NOT be the same! */
131 .macro shl r, sa, t 132 .macro shl r, sa, t
132 dep,z \r, 31-\sa, 32-\sa, \t 133 dep,z \r, 31-(\sa), 32-(\sa), \t
133 .endm 134 .endm
134 135
135 /* The PA 2.0 shift left */ 136 /* The PA 2.0 shift left */
136 .macro shlw r, sa, t 137 .macro shlw r, sa, t
137 depw,z \r, 31-\sa, 32-\sa, \t 138 depw,z \r, 31-(\sa), 32-(\sa), \t
138 .endm 139 .endm
139 140
140 /* And the PA 2.0W shift left */ 141 /* And the PA 2.0W shift left */
141 .macro shld r, sa, t 142 .macro shld r, sa, t
142 depd,z \r, 63-\sa, 64-\sa, \t 143 depd,z \r, 63-(\sa), 64-(\sa), \t
143 .endm 144 .endm
144 145
145 /* Shift Right - note the r and t can NOT be the same! */ 146 /* Shift Right - note the r and t can NOT be the same! */
146 .macro shr r, sa, t 147 .macro shr r, sa, t
147 extru \r, 31-\sa, 32-\sa, \t 148 extru \r, 31-(\sa), 32-(\sa), \t
148 .endm 149 .endm
149 150
150 /* pa20w version of shift right */ 151 /* pa20w version of shift right */
151 .macro shrd r, sa, t 152 .macro shrd r, sa, t
152 extrd,u \r, 63-\sa, 64-\sa, \t 153 extrd,u \r, 63-(\sa), 64-(\sa), \t
153 .endm 154 .endm
154 155
155 /* load 32-bit 'value' into 'reg' compensating for the ldil 156 /* load 32-bit 'value' into 'reg' compensating for the ldil
diff --git a/arch/parisc/include/asm/io.h b/arch/parisc/include/asm/io.h
index d3031d1f9d03..1f6d2ae7aba5 100644
--- a/arch/parisc/include/asm/io.h
+++ b/arch/parisc/include/asm/io.h
@@ -174,15 +174,48 @@ static inline void __raw_writeq(unsigned long long b, volatile void __iomem *add
174 *(volatile unsigned long long __force *) addr = b; 174 *(volatile unsigned long long __force *) addr = b;
175} 175}
176 176
177/* readb can never be const, so use __fswab instead of le*_to_cpu */ 177static inline unsigned char readb(const volatile void __iomem *addr)
178#define readb(addr) __raw_readb(addr) 178{
179#define readw(addr) le16_to_cpu(__raw_readw(addr)) 179 return __raw_readb(addr);
180#define readl(addr) le32_to_cpu(__raw_readl(addr)) 180}
181#define readq(addr) le64_to_cpu(__raw_readq(addr)) 181static inline unsigned short readw(const volatile void __iomem *addr)
182#define writeb(b, addr) __raw_writeb(b, addr) 182{
183#define writew(b, addr) __raw_writew(cpu_to_le16(b), addr) 183 return le16_to_cpu(__raw_readw(addr));
184#define writel(b, addr) __raw_writel(cpu_to_le32(b), addr) 184}
185#define writeq(b, addr) __raw_writeq(cpu_to_le64(b), addr) 185static inline unsigned int readl(const volatile void __iomem *addr)
186{
187 return le32_to_cpu(__raw_readl(addr));
188}
189static inline unsigned long long readq(const volatile void __iomem *addr)
190{
191 return le64_to_cpu(__raw_readq(addr));
192}
193
194static inline void writeb(unsigned char b, volatile void __iomem *addr)
195{
196 __raw_writeb(b, addr);
197}
198static inline void writew(unsigned short w, volatile void __iomem *addr)
199{
200 __raw_writew(cpu_to_le16(w), addr);
201}
202static inline void writel(unsigned int l, volatile void __iomem *addr)
203{
204 __raw_writel(cpu_to_le32(l), addr);
205}
206static inline void writeq(unsigned long long q, volatile void __iomem *addr)
207{
208 __raw_writeq(cpu_to_le64(q), addr);
209}
210
211#define readb readb
212#define readw readw
213#define readl readl
214#define readq readq
215#define writeb writeb
216#define writew writew
217#define writel writel
218#define writeq writeq
186 219
187#define readb_relaxed(addr) readb(addr) 220#define readb_relaxed(addr) readb(addr)
188#define readw_relaxed(addr) readw(addr) 221#define readw_relaxed(addr) readw(addr)
diff --git a/arch/parisc/include/asm/irq.h b/arch/parisc/include/asm/irq.h
index 399c81981ed5..dfa26b67f919 100644
--- a/arch/parisc/include/asm/irq.h
+++ b/arch/parisc/include/asm/irq.h
@@ -49,7 +49,7 @@ extern unsigned long txn_alloc_addr(unsigned int);
49extern unsigned long txn_affinity_addr(unsigned int irq, int cpu); 49extern unsigned long txn_affinity_addr(unsigned int irq, int cpu);
50 50
51extern int cpu_claim_irq(unsigned int irq, struct irq_chip *, void *); 51extern int cpu_claim_irq(unsigned int irq, struct irq_chip *, void *);
52extern int cpu_check_affinity(unsigned int irq, cpumask_t *dest); 52extern int cpu_check_affinity(unsigned int irq, const struct cpumask *dest);
53 53
54/* soft power switch support (power.c) */ 54/* soft power switch support (power.c) */
55extern struct tasklet_struct power_tasklet; 55extern struct tasklet_struct power_tasklet;
diff --git a/arch/parisc/include/asm/uaccess.h b/arch/parisc/include/asm/uaccess.h
index 1c6dbb6f6e56..cd4c0b2a8e70 100644
--- a/arch/parisc/include/asm/uaccess.h
+++ b/arch/parisc/include/asm/uaccess.h
@@ -241,6 +241,7 @@ unsigned long copy_in_user(void __user *dst, const void __user *src, unsigned lo
241#define __copy_to_user_inatomic __copy_to_user 241#define __copy_to_user_inatomic __copy_to_user
242#define __copy_from_user_inatomic __copy_from_user 242#define __copy_from_user_inatomic __copy_from_user
243 243
244struct pt_regs;
244int fixup_exception(struct pt_regs *regs); 245int fixup_exception(struct pt_regs *regs);
245 246
246#endif /* __PARISC_UACCESS_H */ 247#endif /* __PARISC_UACCESS_H */