diff options
Diffstat (limited to 'arch/mn10300/unit-asb2305/include/unit')
-rw-r--r-- | arch/mn10300/unit-asb2305/include/unit/clock.h | 25 | ||||
-rw-r--r-- | arch/mn10300/unit-asb2305/include/unit/serial.h | 5 | ||||
-rw-r--r-- | arch/mn10300/unit-asb2305/include/unit/timex.h | 109 |
3 files changed, 69 insertions, 70 deletions
diff --git a/arch/mn10300/unit-asb2305/include/unit/clock.h b/arch/mn10300/unit-asb2305/include/unit/clock.h index 67be3f2eb18e..29e3425431cf 100644 --- a/arch/mn10300/unit-asb2305/include/unit/clock.h +++ b/arch/mn10300/unit-asb2305/include/unit/clock.h | |||
@@ -14,32 +14,11 @@ | |||
14 | 14 | ||
15 | #ifndef __ASSEMBLY__ | 15 | #ifndef __ASSEMBLY__ |
16 | 16 | ||
17 | #ifdef CONFIG_MN10300_RTC | ||
18 | |||
19 | extern unsigned long mn10300_ioclk; /* IOCLK (crystal speed) in HZ */ | ||
20 | extern unsigned long mn10300_iobclk; | ||
21 | extern unsigned long mn10300_tsc_per_HZ; | ||
22 | |||
23 | #define MN10300_IOCLK mn10300_ioclk | ||
24 | /* If this processors has a another clock, uncomment the below. */ | ||
25 | /* #define MN10300_IOBCLK mn10300_iobclk */ | ||
26 | |||
27 | #else /* !CONFIG_MN10300_RTC */ | ||
28 | |||
29 | #define MN10300_IOCLK 33333333UL | 17 | #define MN10300_IOCLK 33333333UL |
30 | /* #define MN10300_IOBCLK 66666666UL */ | 18 | /* #define MN10300_IOBCLK 66666666UL */ |
31 | 19 | ||
32 | #endif /* !CONFIG_MN10300_RTC */ | ||
33 | |||
34 | #define MN10300_JCCLK MN10300_IOCLK | ||
35 | #define MN10300_TSCCLK MN10300_IOCLK | ||
36 | |||
37 | #ifdef CONFIG_MN10300_RTC | ||
38 | #define MN10300_TSC_PER_HZ mn10300_tsc_per_HZ | ||
39 | #else /* !CONFIG_MN10300_RTC */ | ||
40 | #define MN10300_TSC_PER_HZ (MN10300_TSCCLK/HZ) | ||
41 | #endif /* !CONFIG_MN10300_RTC */ | ||
42 | |||
43 | #endif /* !__ASSEMBLY__ */ | 20 | #endif /* !__ASSEMBLY__ */ |
44 | 21 | ||
22 | #define MN10300_WDCLK MN10300_IOCLK | ||
23 | |||
45 | #endif /* _ASM_UNIT_CLOCK_H */ | 24 | #endif /* _ASM_UNIT_CLOCK_H */ |
diff --git a/arch/mn10300/unit-asb2305/include/unit/serial.h b/arch/mn10300/unit-asb2305/include/unit/serial.h index 8086cc092cec..88c08219315f 100644 --- a/arch/mn10300/unit-asb2305/include/unit/serial.h +++ b/arch/mn10300/unit-asb2305/include/unit/serial.h | |||
@@ -21,6 +21,11 @@ | |||
21 | #define SERIAL_IRQ XIRQ0 /* Dual serial (PC16552) (Hi) */ | 21 | #define SERIAL_IRQ XIRQ0 /* Dual serial (PC16552) (Hi) */ |
22 | 22 | ||
23 | /* | 23 | /* |
24 | * The ASB2305 has an 18.432 MHz clock the UART | ||
25 | */ | ||
26 | #define BASE_BAUD (18432000 / 16) | ||
27 | |||
28 | /* | ||
24 | * dispose of the /dev/ttyS0 serial port | 29 | * dispose of the /dev/ttyS0 serial port |
25 | */ | 30 | */ |
26 | #ifndef CONFIG_GDBSTUB_ON_TTYSx | 31 | #ifndef CONFIG_GDBSTUB_ON_TTYSx |
diff --git a/arch/mn10300/unit-asb2305/include/unit/timex.h b/arch/mn10300/unit-asb2305/include/unit/timex.h index d1c72d59fa9f..758af30d1a16 100644 --- a/arch/mn10300/unit-asb2305/include/unit/timex.h +++ b/arch/mn10300/unit-asb2305/include/unit/timex.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /* ASB2305 timer specifcations | 1 | /* ASB2305-specific timer specifications |
2 | * | 2 | * |
3 | * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. | 3 | * Copyright (C) 2007, 2010 Red Hat, Inc. All Rights Reserved. |
4 | * Written by David Howells (dhowells@redhat.com) | 4 | * Written by David Howells (dhowells@redhat.com) |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or | 6 | * This program is free software; you can redistribute it and/or |
@@ -17,67 +17,72 @@ | |||
17 | 17 | ||
18 | #include <asm/timer-regs.h> | 18 | #include <asm/timer-regs.h> |
19 | #include <unit/clock.h> | 19 | #include <unit/clock.h> |
20 | #include <asm/param.h> | ||
20 | 21 | ||
21 | /* | 22 | /* |
22 | * jiffies counter specifications | 23 | * jiffies counter specifications |
23 | */ | 24 | */ |
24 | 25 | ||
25 | #define TMJCBR_MAX 0xffff | 26 | #define TMJCBR_MAX 0xffff |
26 | #define TMJCBC TM01BC | ||
27 | |||
28 | #define TMJCMD TM01MD | ||
29 | #define TMJCBR TM01BR | ||
30 | #define TMJCIRQ TM1IRQ | 27 | #define TMJCIRQ TM1IRQ |
31 | #define TMJCICR TM1ICR | 28 | #define TMJCICR TM1ICR |
32 | #define TMJCICR_LEVEL GxICR_LEVEL_5 | ||
33 | 29 | ||
34 | #ifndef __ASSEMBLY__ | 30 | #ifndef __ASSEMBLY__ |
35 | 31 | ||
36 | static inline void startup_jiffies_counter(void) | 32 | #define MN10300_SRC_IOCLK MN10300_IOCLK |
33 | |||
34 | #ifndef HZ | ||
35 | # error HZ undeclared. | ||
36 | #endif /* !HZ */ | ||
37 | /* use as little prescaling as possible to avoid losing accuracy */ | ||
38 | #if (MN10300_SRC_IOCLK + HZ / 2) / HZ - 1 <= TMJCBR_MAX | ||
39 | # define IOCLK_PRESCALE 1 | ||
40 | # define JC_TIMER_CLKSRC TM0MD_SRC_IOCLK | ||
41 | # define TSC_TIMER_CLKSRC TM4MD_SRC_IOCLK | ||
42 | #elif (MN10300_SRC_IOCLK / 8 + HZ / 2) / HZ - 1 <= TMJCBR_MAX | ||
43 | # define IOCLK_PRESCALE 8 | ||
44 | # define JC_TIMER_CLKSRC TM0MD_SRC_IOCLK_8 | ||
45 | # define TSC_TIMER_CLKSRC TM4MD_SRC_IOCLK_8 | ||
46 | #elif (MN10300_SRC_IOCLK / 32 + HZ / 2) / HZ - 1 <= TMJCBR_MAX | ||
47 | # define IOCLK_PRESCALE 32 | ||
48 | # define JC_TIMER_CLKSRC TM0MD_SRC_IOCLK_32 | ||
49 | # define TSC_TIMER_CLKSRC TM4MD_SRC_IOCLK_32 | ||
50 | #else | ||
51 | # error You lose. | ||
52 | #endif | ||
53 | |||
54 | #define MN10300_JCCLK (MN10300_SRC_IOCLK / IOCLK_PRESCALE) | ||
55 | #define MN10300_TSCCLK (MN10300_SRC_IOCLK / IOCLK_PRESCALE) | ||
56 | |||
57 | #define MN10300_JC_PER_HZ ((MN10300_JCCLK + HZ / 2) / HZ) | ||
58 | #define MN10300_TSC_PER_HZ ((MN10300_TSCCLK + HZ / 2) / HZ) | ||
59 | |||
60 | static inline void stop_jiffies_counter(void) | ||
37 | { | 61 | { |
38 | unsigned rate; | 62 | u16 tmp; |
39 | u16 md, t16; | 63 | TM01MD = JC_TIMER_CLKSRC | TM1MD_SRC_TM0CASCADE << 8; |
40 | 64 | tmp = TM01MD; | |
41 | /* use as little prescaling as possible to avoid losing accuracy */ | 65 | } |
42 | md = TM0MD_SRC_IOCLK; | ||
43 | rate = MN10300_JCCLK / HZ; | ||
44 | |||
45 | if (rate > TMJCBR_MAX) { | ||
46 | md = TM0MD_SRC_IOCLK_8; | ||
47 | rate = MN10300_JCCLK / 8 / HZ; | ||
48 | |||
49 | if (rate > TMJCBR_MAX) { | ||
50 | md = TM0MD_SRC_IOCLK_32; | ||
51 | rate = MN10300_JCCLK / 32 / HZ; | ||
52 | |||
53 | if (rate > TMJCBR_MAX) | ||
54 | BUG(); | ||
55 | } | ||
56 | } | ||
57 | 66 | ||
58 | TMJCBR = rate - 1; | 67 | static inline void reload_jiffies_counter(u32 cnt) |
59 | t16 = TMJCBR; | 68 | { |
69 | u32 tmp; | ||
60 | 70 | ||
61 | TMJCMD = | 71 | TM01BR = cnt; |
62 | md | | 72 | tmp = TM01BR; |
63 | TM1MD_SRC_TM0CASCADE << 8 | | ||
64 | TM0MD_INIT_COUNTER | | ||
65 | TM1MD_INIT_COUNTER << 8; | ||
66 | 73 | ||
67 | TMJCMD = | 74 | TM01MD = JC_TIMER_CLKSRC | \ |
68 | md | | 75 | TM1MD_SRC_TM0CASCADE << 8 | \ |
69 | TM1MD_SRC_TM0CASCADE << 8 | | 76 | TM0MD_INIT_COUNTER | \ |
70 | TM0MD_COUNT_ENABLE | | 77 | TM1MD_INIT_COUNTER << 8; |
71 | TM1MD_COUNT_ENABLE << 8; | ||
72 | 78 | ||
73 | t16 = TMJCMD; | ||
74 | 79 | ||
75 | TMJCICR |= GxICR_ENABLE | GxICR_DETECT | GxICR_REQUEST; | 80 | TM01MD = JC_TIMER_CLKSRC | \ |
76 | t16 = TMJCICR; | 81 | TM1MD_SRC_TM0CASCADE << 8 | \ |
77 | } | 82 | TM0MD_COUNT_ENABLE | \ |
83 | TM1MD_COUNT_ENABLE << 8; | ||
78 | 84 | ||
79 | static inline void shutdown_jiffies_counter(void) | 85 | tmp = TM01MD; |
80 | { | ||
81 | } | 86 | } |
82 | 87 | ||
83 | #endif /* !__ASSEMBLY__ */ | 88 | #endif /* !__ASSEMBLY__ */ |
@@ -94,29 +99,39 @@ static inline void shutdown_jiffies_counter(void) | |||
94 | 99 | ||
95 | static inline void startup_timestamp_counter(void) | 100 | static inline void startup_timestamp_counter(void) |
96 | { | 101 | { |
102 | u32 t32; | ||
103 | |||
97 | /* set up timer 4 & 5 cascaded as a 32-bit counter to count real time | 104 | /* set up timer 4 & 5 cascaded as a 32-bit counter to count real time |
98 | * - count down from 4Gig-1 to 0 and wrap at IOCLK rate | 105 | * - count down from 4Gig-1 to 0 and wrap at IOCLK rate |
99 | */ | 106 | */ |
100 | TM45BR = TMTSCBR_MAX; | 107 | TM45BR = TMTSCBR_MAX; |
108 | t32 = TM45BR; | ||
101 | 109 | ||
102 | TM4MD = TM4MD_SRC_IOCLK; | 110 | TM4MD = TSC_TIMER_CLKSRC; |
103 | TM4MD |= TM4MD_INIT_COUNTER; | 111 | TM4MD |= TM4MD_INIT_COUNTER; |
104 | TM4MD &= ~TM4MD_INIT_COUNTER; | 112 | TM4MD &= ~TM4MD_INIT_COUNTER; |
105 | TM4ICR = 0; | 113 | TM4ICR = 0; |
114 | t32 = TM4ICR; | ||
106 | 115 | ||
107 | TM5MD = TM5MD_SRC_TM4CASCADE; | 116 | TM5MD = TM5MD_SRC_TM4CASCADE; |
108 | TM5MD |= TM5MD_INIT_COUNTER; | 117 | TM5MD |= TM5MD_INIT_COUNTER; |
109 | TM5MD &= ~TM5MD_INIT_COUNTER; | 118 | TM5MD &= ~TM5MD_INIT_COUNTER; |
110 | TM5ICR = 0; | 119 | TM5ICR = 0; |
120 | t32 = TM5ICR; | ||
111 | 121 | ||
112 | TM5MD |= TM5MD_COUNT_ENABLE; | 122 | TM5MD |= TM5MD_COUNT_ENABLE; |
113 | TM4MD |= TM4MD_COUNT_ENABLE; | 123 | TM4MD |= TM4MD_COUNT_ENABLE; |
124 | t32 = TM5MD; | ||
125 | t32 = TM4MD; | ||
114 | } | 126 | } |
115 | 127 | ||
116 | static inline void shutdown_timestamp_counter(void) | 128 | static inline void shutdown_timestamp_counter(void) |
117 | { | 129 | { |
130 | u8 t8; | ||
118 | TM4MD = 0; | 131 | TM4MD = 0; |
119 | TM5MD = 0; | 132 | TM5MD = 0; |
133 | t8 = TM4MD; | ||
134 | t8 = TM5MD; | ||
120 | } | 135 | } |
121 | 136 | ||
122 | /* | 137 | /* |
@@ -127,7 +142,7 @@ typedef unsigned long cycles_t; | |||
127 | 142 | ||
128 | static inline cycles_t read_timestamp_counter(void) | 143 | static inline cycles_t read_timestamp_counter(void) |
129 | { | 144 | { |
130 | return (cycles_t) TMTSCBC; | 145 | return (cycles_t)~TMTSCBC; |
131 | } | 146 | } |
132 | 147 | ||
133 | #endif /* !__ASSEMBLY__ */ | 148 | #endif /* !__ASSEMBLY__ */ |