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-rw-r--r--arch/mn10300/include/asm/Kbuild1
-rw-r--r--arch/mn10300/include/asm/atomic.h157
-rw-r--r--arch/mn10300/include/asm/auxvec.h4
-rw-r--r--arch/mn10300/include/asm/bitops.h240
-rw-r--r--arch/mn10300/include/asm/bug.h37
-rw-r--r--arch/mn10300/include/asm/bugs.h20
-rw-r--r--arch/mn10300/include/asm/busctl-regs.h151
-rw-r--r--arch/mn10300/include/asm/byteorder.h6
-rw-r--r--arch/mn10300/include/asm/cache.h54
-rw-r--r--arch/mn10300/include/asm/cacheflush.h116
-rw-r--r--arch/mn10300/include/asm/checksum.h86
-rw-r--r--arch/mn10300/include/asm/cpu-regs.h290
-rw-r--r--arch/mn10300/include/asm/cputime.h1
-rw-r--r--arch/mn10300/include/asm/current.h37
-rw-r--r--arch/mn10300/include/asm/delay.h19
-rw-r--r--arch/mn10300/include/asm/device.h1
-rw-r--r--arch/mn10300/include/asm/div64.h100
-rw-r--r--arch/mn10300/include/asm/dma-mapping.h234
-rw-r--r--arch/mn10300/include/asm/dma.h118
-rw-r--r--arch/mn10300/include/asm/dmactl-regs.h101
-rw-r--r--arch/mn10300/include/asm/elf.h147
-rw-r--r--arch/mn10300/include/asm/emergency-restart.h1
-rw-r--r--arch/mn10300/include/asm/errno.h1
-rw-r--r--arch/mn10300/include/asm/exceptions.h121
-rw-r--r--arch/mn10300/include/asm/fb.h23
-rw-r--r--arch/mn10300/include/asm/fcntl.h1
-rw-r--r--arch/mn10300/include/asm/fpu.h85
-rw-r--r--arch/mn10300/include/asm/frame.inc91
-rw-r--r--arch/mn10300/include/asm/ftrace.h1
-rw-r--r--arch/mn10300/include/asm/futex.h1
-rw-r--r--arch/mn10300/include/asm/gdb-stub.h183
-rw-r--r--arch/mn10300/include/asm/hardirq.h48
-rw-r--r--arch/mn10300/include/asm/highmem.h116
-rw-r--r--arch/mn10300/include/asm/hw_irq.h14
-rw-r--r--arch/mn10300/include/asm/intctl-regs.h73
-rw-r--r--arch/mn10300/include/asm/io.h301
-rw-r--r--arch/mn10300/include/asm/ioctl.h1
-rw-r--r--arch/mn10300/include/asm/ioctls.h88
-rw-r--r--arch/mn10300/include/asm/ipc.h1
-rw-r--r--arch/mn10300/include/asm/ipcbuf.h29
-rw-r--r--arch/mn10300/include/asm/irq.h32
-rw-r--r--arch/mn10300/include/asm/irq_regs.h24
-rw-r--r--arch/mn10300/include/asm/kdebug.h22
-rw-r--r--arch/mn10300/include/asm/kmap_types.h31
-rw-r--r--arch/mn10300/include/asm/kprobes.h50
-rw-r--r--arch/mn10300/include/asm/linkage.h20
-rw-r--r--arch/mn10300/include/asm/local.h1
-rw-r--r--arch/mn10300/include/asm/mc146818rtc.h1
-rw-r--r--arch/mn10300/include/asm/mman.h28
-rw-r--r--arch/mn10300/include/asm/mmu.h19
-rw-r--r--arch/mn10300/include/asm/mmu_context.h138
-rw-r--r--arch/mn10300/include/asm/module.h27
-rw-r--r--arch/mn10300/include/asm/msgbuf.h31
-rw-r--r--arch/mn10300/include/asm/mutex.h16
-rw-r--r--arch/mn10300/include/asm/nmi.h14
-rw-r--r--arch/mn10300/include/asm/page.h128
-rw-r--r--arch/mn10300/include/asm/page_offset.h11
-rw-r--r--arch/mn10300/include/asm/param.h34
-rw-r--r--arch/mn10300/include/asm/pci.h129
-rw-r--r--arch/mn10300/include/asm/percpu.h1
-rw-r--r--arch/mn10300/include/asm/pgalloc.h56
-rw-r--r--arch/mn10300/include/asm/pgtable.h492
-rw-r--r--arch/mn10300/include/asm/pio-regs.h233
-rw-r--r--arch/mn10300/include/asm/poll.h1
-rw-r--r--arch/mn10300/include/asm/posix_types.h132
-rw-r--r--arch/mn10300/include/asm/processor.h186
-rw-r--r--arch/mn10300/include/asm/ptrace.h103
-rw-r--r--arch/mn10300/include/asm/reset-regs.h64
-rw-r--r--arch/mn10300/include/asm/resource.h1
-rw-r--r--arch/mn10300/include/asm/rtc-regs.h86
-rw-r--r--arch/mn10300/include/asm/rtc.h41
-rw-r--r--arch/mn10300/include/asm/scatterlist.h55
-rw-r--r--arch/mn10300/include/asm/sections.h1
-rw-r--r--arch/mn10300/include/asm/sembuf.h25
-rw-r--r--arch/mn10300/include/asm/serial-regs.h160
-rw-r--r--arch/mn10300/include/asm/serial.h36
-rw-r--r--arch/mn10300/include/asm/setup.h17
-rw-r--r--arch/mn10300/include/asm/shmbuf.h42
-rw-r--r--arch/mn10300/include/asm/shmparam.h6
-rw-r--r--arch/mn10300/include/asm/sigcontext.h52
-rw-r--r--arch/mn10300/include/asm/siginfo.h1
-rw-r--r--arch/mn10300/include/asm/signal.h171
-rw-r--r--arch/mn10300/include/asm/smp.h18
-rw-r--r--arch/mn10300/include/asm/socket.h60
-rw-r--r--arch/mn10300/include/asm/sockios.h13
-rw-r--r--arch/mn10300/include/asm/spinlock.h16
-rw-r--r--arch/mn10300/include/asm/stat.h78
-rw-r--r--arch/mn10300/include/asm/statfs.h1
-rw-r--r--arch/mn10300/include/asm/string.h32
-rw-r--r--arch/mn10300/include/asm/swab.h42
-rw-r--r--arch/mn10300/include/asm/system.h237
-rw-r--r--arch/mn10300/include/asm/termbits.h200
-rw-r--r--arch/mn10300/include/asm/termios.h92
-rw-r--r--arch/mn10300/include/asm/thread_info.h170
-rw-r--r--arch/mn10300/include/asm/timer-regs.h293
-rw-r--r--arch/mn10300/include/asm/timex.h33
-rw-r--r--arch/mn10300/include/asm/tlb.h34
-rw-r--r--arch/mn10300/include/asm/tlbflush.h80
-rw-r--r--arch/mn10300/include/asm/topology.h1
-rw-r--r--arch/mn10300/include/asm/types.h38
-rw-r--r--arch/mn10300/include/asm/uaccess.h490
-rw-r--r--arch/mn10300/include/asm/ucontext.h22
-rw-r--r--arch/mn10300/include/asm/unaligned.h20
-rw-r--r--arch/mn10300/include/asm/unistd.h392
-rw-r--r--arch/mn10300/include/asm/user.h53
-rw-r--r--arch/mn10300/include/asm/vga.h17
-rw-r--r--arch/mn10300/include/asm/xor.h1
107 files changed, 8250 insertions, 0 deletions
diff --git a/arch/mn10300/include/asm/Kbuild b/arch/mn10300/include/asm/Kbuild
new file mode 100644
index 000000000000..c68e1680da01
--- /dev/null
+++ b/arch/mn10300/include/asm/Kbuild
@@ -0,0 +1 @@
include include/asm-generic/Kbuild.asm
diff --git a/arch/mn10300/include/asm/atomic.h b/arch/mn10300/include/asm/atomic.h
new file mode 100644
index 000000000000..bc064825f9b1
--- /dev/null
+++ b/arch/mn10300/include/asm/atomic.h
@@ -0,0 +1,157 @@
1/* MN10300 Atomic counter operations
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_ATOMIC_H
12#define _ASM_ATOMIC_H
13
14#ifdef CONFIG_SMP
15#error not SMP safe
16#endif
17
18/*
19 * Atomic operations that C can't guarantee us. Useful for
20 * resource counting etc..
21 */
22
23#define ATOMIC_INIT(i) { (i) }
24
25#ifdef __KERNEL__
26
27/**
28 * atomic_read - read atomic variable
29 * @v: pointer of type atomic_t
30 *
31 * Atomically reads the value of @v. Note that the guaranteed
32 * useful range of an atomic_t is only 24 bits.
33 */
34#define atomic_read(v) ((v)->counter)
35
36/**
37 * atomic_set - set atomic variable
38 * @v: pointer of type atomic_t
39 * @i: required value
40 *
41 * Atomically sets the value of @v to @i. Note that the guaranteed
42 * useful range of an atomic_t is only 24 bits.
43 */
44#define atomic_set(v, i) (((v)->counter) = (i))
45
46#include <asm/system.h>
47
48/**
49 * atomic_add_return - add integer to atomic variable
50 * @i: integer value to add
51 * @v: pointer of type atomic_t
52 *
53 * Atomically adds @i to @v and returns the result
54 * Note that the guaranteed useful range of an atomic_t is only 24 bits.
55 */
56static inline int atomic_add_return(int i, atomic_t *v)
57{
58 unsigned long flags;
59 int temp;
60
61 local_irq_save(flags);
62 temp = v->counter;
63 temp += i;
64 v->counter = temp;
65 local_irq_restore(flags);
66
67 return temp;
68}
69
70/**
71 * atomic_sub_return - subtract integer from atomic variable
72 * @i: integer value to subtract
73 * @v: pointer of type atomic_t
74 *
75 * Atomically subtracts @i from @v and returns the result
76 * Note that the guaranteed useful range of an atomic_t is only 24 bits.
77 */
78static inline int atomic_sub_return(int i, atomic_t *v)
79{
80 unsigned long flags;
81 int temp;
82
83 local_irq_save(flags);
84 temp = v->counter;
85 temp -= i;
86 v->counter = temp;
87 local_irq_restore(flags);
88
89 return temp;
90}
91
92static inline int atomic_add_negative(int i, atomic_t *v)
93{
94 return atomic_add_return(i, v) < 0;
95}
96
97static inline void atomic_add(int i, atomic_t *v)
98{
99 atomic_add_return(i, v);
100}
101
102static inline void atomic_sub(int i, atomic_t *v)
103{
104 atomic_sub_return(i, v);
105}
106
107static inline void atomic_inc(atomic_t *v)
108{
109 atomic_add_return(1, v);
110}
111
112static inline void atomic_dec(atomic_t *v)
113{
114 atomic_sub_return(1, v);
115}
116
117#define atomic_dec_return(v) atomic_sub_return(1, (v))
118#define atomic_inc_return(v) atomic_add_return(1, (v))
119
120#define atomic_sub_and_test(i, v) (atomic_sub_return((i), (v)) == 0)
121#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
122#define atomic_inc_and_test(v) (atomic_add_return(1, (v)) == 0)
123
124#define atomic_add_unless(v, a, u) \
125({ \
126 int c, old; \
127 c = atomic_read(v); \
128 while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
129 c = old; \
130 c != (u); \
131})
132
133#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
134
135static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)
136{
137 unsigned long flags;
138
139 mask = ~mask;
140 local_irq_save(flags);
141 *addr &= mask;
142 local_irq_restore(flags);
143}
144
145#define atomic_xchg(ptr, v) (xchg(&(ptr)->counter, (v)))
146#define atomic_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), (old), (new)))
147
148/* Atomic operations are already serializing on MN10300??? */
149#define smp_mb__before_atomic_dec() barrier()
150#define smp_mb__after_atomic_dec() barrier()
151#define smp_mb__before_atomic_inc() barrier()
152#define smp_mb__after_atomic_inc() barrier()
153
154#include <asm-generic/atomic.h>
155
156#endif /* __KERNEL__ */
157#endif /* _ASM_ATOMIC_H */
diff --git a/arch/mn10300/include/asm/auxvec.h b/arch/mn10300/include/asm/auxvec.h
new file mode 100644
index 000000000000..4fdb60b2ae39
--- /dev/null
+++ b/arch/mn10300/include/asm/auxvec.h
@@ -0,0 +1,4 @@
1#ifndef _ASM_AUXVEC_H
2#define _ASM_AUXVEC_H
3
4#endif
diff --git a/arch/mn10300/include/asm/bitops.h b/arch/mn10300/include/asm/bitops.h
new file mode 100644
index 000000000000..0b610f482abb
--- /dev/null
+++ b/arch/mn10300/include/asm/bitops.h
@@ -0,0 +1,240 @@
1/* MN10300 bit operations
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 *
11 * These have to be done with inline assembly: that way the bit-setting
12 * is guaranteed to be atomic. All bit operations return 0 if the bit
13 * was cleared before the operation and != 0 if it was not.
14 *
15 * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
16 */
17#ifndef __ASM_BITOPS_H
18#define __ASM_BITOPS_H
19
20#include <asm/cpu-regs.h>
21
22#define smp_mb__before_clear_bit() barrier()
23#define smp_mb__after_clear_bit() barrier()
24
25/*
26 * set bit
27 */
28#define __set_bit(nr, addr) \
29({ \
30 volatile unsigned char *_a = (unsigned char *)(addr); \
31 const unsigned shift = (nr) & 7; \
32 _a += (nr) >> 3; \
33 \
34 asm volatile("bset %2,(%1) # set_bit reg" \
35 : "=m"(*_a) \
36 : "a"(_a), "d"(1 << shift), "m"(*_a) \
37 : "memory", "cc"); \
38})
39
40#define set_bit(nr, addr) __set_bit((nr), (addr))
41
42/*
43 * clear bit
44 */
45#define ___clear_bit(nr, addr) \
46({ \
47 volatile unsigned char *_a = (unsigned char *)(addr); \
48 const unsigned shift = (nr) & 7; \
49 _a += (nr) >> 3; \
50 \
51 asm volatile("bclr %2,(%1) # clear_bit reg" \
52 : "=m"(*_a) \
53 : "a"(_a), "d"(1 << shift), "m"(*_a) \
54 : "memory", "cc"); \
55})
56
57#define clear_bit(nr, addr) ___clear_bit((nr), (addr))
58
59
60static inline void __clear_bit(int nr, volatile void *addr)
61{
62 unsigned int *a = (unsigned int *) addr;
63 int mask;
64
65 a += nr >> 5;
66 mask = 1 << (nr & 0x1f);
67 *a &= ~mask;
68}
69
70/*
71 * test bit
72 */
73static inline int test_bit(int nr, const volatile void *addr)
74{
75 return 1UL & (((const unsigned int *) addr)[nr >> 5] >> (nr & 31));
76}
77
78/*
79 * change bit
80 */
81static inline void __change_bit(int nr, volatile void *addr)
82{
83 int mask;
84 unsigned int *a = (unsigned int *) addr;
85
86 a += nr >> 5;
87 mask = 1 << (nr & 0x1f);
88 *a ^= mask;
89}
90
91extern void change_bit(int nr, volatile void *addr);
92
93/*
94 * test and set bit
95 */
96#define __test_and_set_bit(nr,addr) \
97({ \
98 volatile unsigned char *_a = (unsigned char *)(addr); \
99 const unsigned shift = (nr) & 7; \
100 unsigned epsw; \
101 _a += (nr) >> 3; \
102 \
103 asm volatile("bset %3,(%2) # test_set_bit reg\n" \
104 "mov epsw,%1" \
105 : "=m"(*_a), "=d"(epsw) \
106 : "a"(_a), "d"(1 << shift), "m"(*_a) \
107 : "memory", "cc"); \
108 \
109 !(epsw & EPSW_FLAG_Z); \
110})
111
112#define test_and_set_bit(nr, addr) __test_and_set_bit((nr), (addr))
113
114/*
115 * test and clear bit
116 */
117#define __test_and_clear_bit(nr, addr) \
118({ \
119 volatile unsigned char *_a = (unsigned char *)(addr); \
120 const unsigned shift = (nr) & 7; \
121 unsigned epsw; \
122 _a += (nr) >> 3; \
123 \
124 asm volatile("bclr %3,(%2) # test_clear_bit reg\n" \
125 "mov epsw,%1" \
126 : "=m"(*_a), "=d"(epsw) \
127 : "a"(_a), "d"(1 << shift), "m"(*_a) \
128 : "memory", "cc"); \
129 \
130 !(epsw & EPSW_FLAG_Z); \
131})
132
133#define test_and_clear_bit(nr, addr) __test_and_clear_bit((nr), (addr))
134
135/*
136 * test and change bit
137 */
138static inline int __test_and_change_bit(int nr, volatile void *addr)
139{
140 int mask, retval;
141 unsigned int *a = (unsigned int *)addr;
142
143 a += nr >> 5;
144 mask = 1 << (nr & 0x1f);
145 retval = (mask & *a) != 0;
146 *a ^= mask;
147
148 return retval;
149}
150
151extern int test_and_change_bit(int nr, volatile void *addr);
152
153#include <asm-generic/bitops/lock.h>
154
155#ifdef __KERNEL__
156
157/**
158 * __ffs - find first bit set
159 * @x: the word to search
160 *
161 * - return 31..0 to indicate bit 31..0 most least significant bit set
162 * - if no bits are set in x, the result is undefined
163 */
164static inline __attribute__((const))
165unsigned long __ffs(unsigned long x)
166{
167 int bit;
168 asm("bsch %2,%0" : "=r"(bit) : "0"(0), "r"(x & -x));
169 return bit;
170}
171
172/*
173 * special slimline version of fls() for calculating ilog2_u32()
174 * - note: no protection against n == 0
175 */
176static inline __attribute__((const))
177int __ilog2_u32(u32 n)
178{
179 int bit;
180 asm("bsch %2,%0" : "=r"(bit) : "0"(0), "r"(n));
181 return bit;
182}
183
184/**
185 * fls - find last bit set
186 * @x: the word to search
187 *
188 * This is defined the same way as ffs:
189 * - return 32..1 to indicate bit 31..0 most significant bit set
190 * - return 0 to indicate no bits set
191 */
192static inline __attribute__((const))
193int fls(int x)
194{
195 return (x != 0) ? __ilog2_u32(x) + 1 : 0;
196}
197
198/**
199 * __fls - find last (most-significant) set bit in a long word
200 * @word: the word to search
201 *
202 * Undefined if no set bit exists, so code should check against 0 first.
203 */
204static inline unsigned long __fls(unsigned long word)
205{
206 return __ilog2_u32(word);
207}
208
209/**
210 * ffs - find first bit set
211 * @x: the word to search
212 *
213 * - return 32..1 to indicate bit 31..0 most least significant bit set
214 * - return 0 to indicate no bits set
215 */
216static inline __attribute__((const))
217int ffs(int x)
218{
219 /* Note: (x & -x) gives us a mask that is the least significant
220 * (rightmost) 1-bit of the value in x.
221 */
222 return fls(x & -x);
223}
224
225#include <asm-generic/bitops/ffz.h>
226#include <asm-generic/bitops/fls64.h>
227#include <asm-generic/bitops/find.h>
228#include <asm-generic/bitops/sched.h>
229#include <asm-generic/bitops/hweight.h>
230
231#define ext2_set_bit_atomic(lock, nr, addr) \
232 test_and_set_bit((nr) ^ 0x18, (addr))
233#define ext2_clear_bit_atomic(lock, nr, addr) \
234 test_and_clear_bit((nr) ^ 0x18, (addr))
235
236#include <asm-generic/bitops/ext2-non-atomic.h>
237#include <asm-generic/bitops/minix-le.h>
238
239#endif /* __KERNEL__ */
240#endif /* __ASM_BITOPS_H */
diff --git a/arch/mn10300/include/asm/bug.h b/arch/mn10300/include/asm/bug.h
new file mode 100644
index 000000000000..aa6a38886391
--- /dev/null
+++ b/arch/mn10300/include/asm/bug.h
@@ -0,0 +1,37 @@
1/* MN10300 Kernel bug reporting
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_BUG_H
12#define _ASM_BUG_H
13
14#ifdef CONFIG_BUG
15
16/*
17 * Tell the user there is some problem.
18 */
19#define BUG() \
20do { \
21 asm volatile( \
22 " syscall 15 \n" \
23 "0: \n" \
24 " .section __bug_table,\"a\" \n" \
25 " .long 0b,%0,%1 \n" \
26 " .previous \n" \
27 : \
28 : "i"(__FILE__), "i"(__LINE__) \
29 ); \
30} while (1)
31
32#define HAVE_ARCH_BUG
33#endif /* CONFIG_BUG */
34
35#include <asm-generic/bug.h>
36
37#endif /* _ASM_BUG_H */
diff --git a/arch/mn10300/include/asm/bugs.h b/arch/mn10300/include/asm/bugs.h
new file mode 100644
index 000000000000..31c8bc592b47
--- /dev/null
+++ b/arch/mn10300/include/asm/bugs.h
@@ -0,0 +1,20 @@
1/* MN10300 Checks for architecture-dependent bugs
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_BUGS_H
12#define _ASM_BUGS_H
13
14#include <asm/processor.h>
15
16static inline void __init check_bugs(void)
17{
18}
19
20#endif /* _ASM_BUGS_H */
diff --git a/arch/mn10300/include/asm/busctl-regs.h b/arch/mn10300/include/asm/busctl-regs.h
new file mode 100644
index 000000000000..1632aef73401
--- /dev/null
+++ b/arch/mn10300/include/asm/busctl-regs.h
@@ -0,0 +1,151 @@
1/* AM33v2 on-board bus controller registers
2 *
3 * Copyright (C) 2002 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_BUSCTL_REGS_H
13#define _ASM_BUSCTL_REGS_H
14
15#include <asm/cpu-regs.h>
16
17#ifdef __KERNEL__
18
19/* bus controller registers */
20#define BCCR __SYSREG(0xc0002000, u32) /* bus controller control reg */
21#define BCCR_B0AD 0x00000003 /* block 0 (80000000-83ffffff) bus allocation */
22#define BCCR_B1AD 0x0000000c /* block 1 (84000000-87ffffff) bus allocation */
23#define BCCR_B2AD 0x00000030 /* block 2 (88000000-8bffffff) bus allocation */
24#define BCCR_B3AD 0x000000c0 /* block 3 (8c000000-8fffffff) bus allocation */
25#define BCCR_B4AD 0x00000300 /* block 4 (90000000-93ffffff) bus allocation */
26#define BCCR_B5AD 0x00000c00 /* block 5 (94000000-97ffffff) bus allocation */
27#define BCCR_B6AD 0x00003000 /* block 6 (98000000-9bffffff) bus allocation */
28#define BCCR_B7AD 0x0000c000 /* block 7 (9c000000-9fffffff) bus allocation */
29#define BCCR_BxAD_EXBUS 0x0 /* - direct to system bus controller */
30#define BCCR_BxAD_OPEXBUS 0x1 /* - direct to memory bus controller */
31#define BCCR_BxAD_OCMBUS 0x2 /* - direct to on chip memory */
32#define BCCR_API 0x00070000 /* bus arbitration priority */
33#define BCCR_API_DMACICD 0x00000000 /* - DMA > CI > CD */
34#define BCCR_API_DMACDCI 0x00010000 /* - DMA > CD > CI */
35#define BCCR_API_CICDDMA 0x00020000 /* - CI > CD > DMA */
36#define BCCR_API_CDCIDMA 0x00030000 /* - CD > CI > DMA */
37#define BCCR_API_ROUNDROBIN 0x00040000 /* - round robin */
38#define BCCR_BEPRI_DMACICD 0x00c00000 /* bus error address priority */
39#define BCCR_BEPRI_DMACDCI 0x00000000 /* - DMA > CI > CD */
40#define BCCR_BEPRI_CICDDMA 0x00400000 /* - DMA > CD > CI */
41#define BCCR_BEPRI_CDCIDMA 0x00800000 /* - CI > CD > DMA */
42#define BCCR_BEPRI 0x00c00000 /* - CD > CI > DMA */
43#define BCCR_TMON 0x03000000 /* timeout value settings */
44#define BCCR_TMON_16IOCLK 0x00000000 /* - 16 IOCLK cycles */
45#define BCCR_TMON_256IOCLK 0x01000000 /* - 256 IOCLK cycles */
46#define BCCR_TMON_4096IOCLK 0x02000000 /* - 4096 IOCLK cycles */
47#define BCCR_TMON_65536IOCLK 0x03000000 /* - 65536 IOCLK cycles */
48#define BCCR_TMOE 0x10000000 /* timeout detection enable */
49
50#define BCBERR __SYSREG(0xc0002010, u32) /* bus error source reg */
51#define BCBERR_BESB 0x0000001f /* erroneous access destination space */
52#define BCBERR_BESB_MON 0x00000001 /* - monitor space */
53#define BCBERR_BESB_IO 0x00000002 /* - IO bus */
54#define BCBERR_BESB_EX 0x00000004 /* - EX bus */
55#define BCBERR_BESB_OPEX 0x00000008 /* - OpEX bus */
56#define BCBERR_BESB_OCM 0x00000010 /* - on chip memory */
57#define BCBERR_BERW 0x00000100 /* type of access */
58#define BCBERR_BERW_WRITE 0x00000000 /* - write */
59#define BCBERR_BERW_READ 0x00000100 /* - read */
60#define BCBERR_BESD 0x00000200 /* error detector */
61#define BCBERR_BESD_BCU 0x00000000 /* - BCU detected error */
62#define BCBERR_BESD_SLAVE_BUS 0x00000200 /* - slave bus detected error */
63#define BCBERR_BEBST 0x00000400 /* type of access */
64#define BCBERR_BEBST_SINGLE 0x00000000 /* - single */
65#define BCBERR_BEBST_BURST 0x00000400 /* - burst */
66#define BCBERR_BEME 0x00000800 /* multiple bus error flag */
67#define BCBERR_BEMR 0x00007000 /* master bus that caused the error */
68#define BCBERR_BEMR_NOERROR 0x00000000 /* - no error */
69#define BCBERR_BEMR_CI 0x00001000 /* - CPU instruction fetch bus caused error */
70#define BCBERR_BEMR_CD 0x00002000 /* - CPU data bus caused error */
71#define BCBERR_BEMR_DMA 0x00004000 /* - DMA bus caused error */
72
73#define BCBEAR __SYSREGC(0xc0002020, u32) /* bus error address reg */
74
75/* system bus controller registers */
76#define SBBASE(X) __SYSREG(0xd8c00100 + (X) * 0x10, u32) /* SBC base addr regs */
77#define SBBASE_BE 0x00000001 /* bank enable */
78#define SBBASE_BAM 0x0000fffe /* bank address mask [31:17] */
79#define SBBASE_BBA 0xfffe0000 /* bank base address [31:17] */
80
81#define SBCNTRL0(X) __SYSREG(0xd8c00200 + (X) * 0x10, u32) /* SBC bank ctrl0 regs */
82#define SBCNTRL0_WEH 0x00000f00 /* write enable hold */
83#define SBCNTRL0_REH 0x0000f000 /* read enable hold */
84#define SBCNTRL0_RWH 0x000f0000 /* SRW signal hold */
85#define SBCNTRL0_CSH 0x00f00000 /* chip select hold */
86#define SBCNTRL0_DAH 0x0f000000 /* data hold */
87#define SBCNTRL0_ADH 0xf0000000 /* address hold */
88
89#define SBCNTRL1(X) __SYSREG(0xd8c00204 + (X) * 0x10, u32) /* SBC bank ctrl1 regs */
90#define SBCNTRL1_WED 0x00000f00 /* write enable delay */
91#define SBCNTRL1_RED 0x0000f000 /* read enable delay */
92#define SBCNTRL1_RWD 0x000f0000 /* SRW signal delay */
93#define SBCNTRL1_ASW 0x00f00000 /* address strobe width */
94#define SBCNTRL1_CSD 0x0f000000 /* chip select delay */
95#define SBCNTRL1_ASD 0xf0000000 /* address strobe delay */
96
97#define SBCNTRL2(X) __SYSREG(0xd8c00208 + (X) * 0x10, u32) /* SBC bank ctrl2 regs */
98#define SBCNTRL2_WC 0x000000ff /* wait count */
99#define SBCNTRL2_BWC 0x00000f00 /* burst wait count */
100#define SBCNTRL2_WM 0x01000000 /* wait mode setting */
101#define SBCNTRL2_WM_FIXEDWAIT 0x00000000 /* - fixed wait access */
102#define SBCNTRL2_WM_HANDSHAKE 0x01000000 /* - handshake access */
103#define SBCNTRL2_BM 0x02000000 /* bus synchronisation mode */
104#define SBCNTRL2_BM_SYNC 0x00000000 /* - synchronous mode */
105#define SBCNTRL2_BM_ASYNC 0x02000000 /* - asynchronous mode */
106#define SBCNTRL2_BW 0x04000000 /* bus width */
107#define SBCNTRL2_BW_32 0x00000000 /* - 32 bits */
108#define SBCNTRL2_BW_16 0x04000000 /* - 16 bits */
109#define SBCNTRL2_RWINV 0x08000000 /* R/W signal invert polarity */
110#define SBCNTRL2_RWINV_NORM 0x00000000 /* - normal (read high) */
111#define SBCNTRL2_RWINV_INV 0x08000000 /* - inverted (read low) */
112#define SBCNTRL2_BT 0x70000000 /* bus type setting */
113#define SBCNTRL2_BT_SRAM 0x00000000 /* - SRAM interface */
114#define SBCNTRL2_BT_ADMUX 0x00000000 /* - addr/data multiplexed interface */
115#define SBCNTRL2_BT_BROM 0x00000000 /* - burst ROM interface */
116#define SBCNTRL2_BTSE 0x80000000 /* burst enable */
117
118/* memory bus controller */
119#define SDBASE(X) __SYSREG(0xda000008 + (X) * 0x4, u32) /* MBC base addr regs */
120#define SDBASE_CE 0x00000001 /* chip enable */
121#define SDBASE_CBAM 0x0000fff0 /* chip base address mask [31:20] */
122#define SDBASE_CBAM_SHIFT 16
123#define SDBASE_CBA 0xfff00000 /* chip base address [31:20] */
124
125#define SDRAMBUS __SYSREG(0xda000000, u32) /* bus mode control reg */
126#define SDRAMBUS_REFEN 0x00000004 /* refresh enable */
127#define SDRAMBUS_TRC 0x00000018 /* refresh command delay time */
128#define SDRAMBUS_BSTPT 0x00000020 /* burst stop command enable */
129#define SDRAMBUS_PONSEQ 0x00000040 /* power on sequence */
130#define SDRAMBUS_SELFREQ 0x00000080 /* self-refresh mode request */
131#define SDRAMBUS_SELFON 0x00000100 /* self-refresh mode on */
132#define SDRAMBUS_SIZE 0x00030000 /* SDRAM size */
133#define SDRAMBUS_SIZE_64Mbit 0x00010000 /* 64Mbit SDRAM (x16) */
134#define SDRAMBUS_SIZE_128Mbit 0x00020000 /* 128Mbit SDRAM (x16) */
135#define SDRAMBUS_SIZE_256Mbit 0x00030000 /* 256Mbit SDRAM (x16) */
136#define SDRAMBUS_TRASWAIT 0x000c0000 /* row address precharge command cycle number */
137#define SDRAMBUS_REFNUM 0x00300000 /* refresh command number */
138#define SDRAMBUS_BSTWAIT 0x00c00000 /* burst stop command cycle */
139#define SDRAMBUS_SETWAIT 0x03000000 /* mode register setting command cycle */
140#define SDRAMBUS_PREWAIT 0x0c000000 /* precharge command cycle */
141#define SDRAMBUS_RASLATE 0x30000000 /* RAS latency */
142#define SDRAMBUS_CASLATE 0xc0000000 /* CAS latency */
143
144#define SDREFCNT __SYSREG(0xda000004, u32) /* refresh period reg */
145#define SDREFCNT_PERI 0x00000fff /* refresh period */
146
147#define SDSHDW __SYSREG(0xda000010, u32) /* test reg */
148
149#endif /* __KERNEL__ */
150
151#endif /* _ASM_BUSCTL_REGS_H */
diff --git a/arch/mn10300/include/asm/byteorder.h b/arch/mn10300/include/asm/byteorder.h
new file mode 100644
index 000000000000..5dd0bdd9feee
--- /dev/null
+++ b/arch/mn10300/include/asm/byteorder.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_BYTEORDER_H
2#define _ASM_BYTEORDER_H
3
4#include <linux/byteorder/little_endian.h>
5
6#endif /* _ASM_BYTEORDER_H */
diff --git a/arch/mn10300/include/asm/cache.h b/arch/mn10300/include/asm/cache.h
new file mode 100644
index 000000000000..e03cfa2e997e
--- /dev/null
+++ b/arch/mn10300/include/asm/cache.h
@@ -0,0 +1,54 @@
1/* MN10300 cache management registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_CACHE_H
13#define _ASM_CACHE_H
14
15#include <asm/cpu-regs.h>
16#include <proc/cache.h>
17
18#ifndef __ASSEMBLY__
19#define L1_CACHE_DISPARITY (L1_CACHE_NENTRIES * L1_CACHE_BYTES)
20#else
21#define L1_CACHE_DISPARITY L1_CACHE_NENTRIES * L1_CACHE_BYTES
22#endif
23
24/* data cache purge registers
25 * - read from the register to unconditionally purge that cache line
26 * - write address & 0xffffff00 to conditionally purge that cache line
27 * - clear LSB to request invalidation as well
28 */
29#define DCACHE_PURGE(WAY, ENTRY) \
30 __SYSREG(0xc8400000 + (WAY) * L1_CACHE_WAYDISP + \
31 (ENTRY) * L1_CACHE_BYTES, u32)
32
33#define DCACHE_PURGE_WAY0(ENTRY) \
34 __SYSREG(0xc8400000 + 0 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
35#define DCACHE_PURGE_WAY1(ENTRY) \
36 __SYSREG(0xc8400000 + 1 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
37#define DCACHE_PURGE_WAY2(ENTRY) \
38 __SYSREG(0xc8400000 + 2 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
39#define DCACHE_PURGE_WAY3(ENTRY) \
40 __SYSREG(0xc8400000 + 3 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
41
42/* instruction cache access registers */
43#define ICACHE_DATA(WAY, ENTRY, OFF) \
44 __SYSREG(0xc8000000 + (WAY) * L1_CACHE_WAYDISP + (ENTRY) * 0x10 + (OFF) * 4, u32)
45#define ICACHE_TAG(WAY, ENTRY) \
46 __SYSREG(0xc8100000 + (WAY) * L1_CACHE_WAYDISP + (ENTRY) * 0x10, u32)
47
48/* instruction cache access registers */
49#define DCACHE_DATA(WAY, ENTRY, OFF) \
50 __SYSREG(0xc8200000 + (WAY) * L1_CACHE_WAYDISP + (ENTRY) * 0x10 + (OFF) * 4, u32)
51#define DCACHE_TAG(WAY, ENTRY) \
52 __SYSREG(0xc8300000 + (WAY) * L1_CACHE_WAYDISP + (ENTRY) * 0x10, u32)
53
54#endif /* _ASM_CACHE_H */
diff --git a/arch/mn10300/include/asm/cacheflush.h b/arch/mn10300/include/asm/cacheflush.h
new file mode 100644
index 000000000000..2db746a251f8
--- /dev/null
+++ b/arch/mn10300/include/asm/cacheflush.h
@@ -0,0 +1,116 @@
1/* MN10300 Cache flushing
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_CACHEFLUSH_H
12#define _ASM_CACHEFLUSH_H
13
14#ifndef __ASSEMBLY__
15
16/* Keep includes the same across arches. */
17#include <linux/mm.h>
18
19/*
20 * virtually-indexed cache managment (our cache is physically indexed)
21 */
22#define flush_cache_all() do {} while (0)
23#define flush_cache_mm(mm) do {} while (0)
24#define flush_cache_dup_mm(mm) do {} while (0)
25#define flush_cache_range(mm, start, end) do {} while (0)
26#define flush_cache_page(vma, vmaddr, pfn) do {} while (0)
27#define flush_cache_vmap(start, end) do {} while (0)
28#define flush_cache_vunmap(start, end) do {} while (0)
29#define flush_dcache_page(page) do {} while (0)
30#define flush_dcache_mmap_lock(mapping) do {} while (0)
31#define flush_dcache_mmap_unlock(mapping) do {} while (0)
32
33/*
34 * physically-indexed cache managment
35 */
36#ifndef CONFIG_MN10300_CACHE_DISABLED
37
38extern void flush_icache_range(unsigned long start, unsigned long end);
39extern void flush_icache_page(struct vm_area_struct *vma, struct page *pg);
40
41#else
42
43#define flush_icache_range(start, end) do {} while (0)
44#define flush_icache_page(vma, pg) do {} while (0)
45
46#endif
47
48#define flush_icache_user_range(vma, pg, adr, len) \
49 flush_icache_range(adr, adr + len)
50
51#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
52 do { \
53 memcpy(dst, src, len); \
54 flush_icache_page(vma, page); \
55 } while (0)
56
57#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
58 memcpy(dst, src, len)
59
60/*
61 * primitive routines
62 */
63#ifndef CONFIG_MN10300_CACHE_DISABLED
64extern void mn10300_icache_inv(void);
65extern void mn10300_dcache_inv(void);
66extern void mn10300_dcache_inv_page(unsigned start);
67extern void mn10300_dcache_inv_range(unsigned start, unsigned end);
68extern void mn10300_dcache_inv_range2(unsigned start, unsigned size);
69#ifdef CONFIG_MN10300_CACHE_WBACK
70extern void mn10300_dcache_flush(void);
71extern void mn10300_dcache_flush_page(unsigned start);
72extern void mn10300_dcache_flush_range(unsigned start, unsigned end);
73extern void mn10300_dcache_flush_range2(unsigned start, unsigned size);
74extern void mn10300_dcache_flush_inv(void);
75extern void mn10300_dcache_flush_inv_page(unsigned start);
76extern void mn10300_dcache_flush_inv_range(unsigned start, unsigned end);
77extern void mn10300_dcache_flush_inv_range2(unsigned start, unsigned size);
78#else
79#define mn10300_dcache_flush() do {} while (0)
80#define mn10300_dcache_flush_page(start) do {} while (0)
81#define mn10300_dcache_flush_range(start, end) do {} while (0)
82#define mn10300_dcache_flush_range2(start, size) do {} while (0)
83#define mn10300_dcache_flush_inv() mn10300_dcache_inv()
84#define mn10300_dcache_flush_inv_page(start) \
85 mn10300_dcache_inv_page((start))
86#define mn10300_dcache_flush_inv_range(start, end) \
87 mn10300_dcache_inv_range((start), (end))
88#define mn10300_dcache_flush_inv_range2(start, size) \
89 mn10300_dcache_inv_range2((start), (size))
90#endif /* CONFIG_MN10300_CACHE_WBACK */
91#else
92#define mn10300_icache_inv() do {} while (0)
93#define mn10300_dcache_inv() do {} while (0)
94#define mn10300_dcache_inv_page(start) do {} while (0)
95#define mn10300_dcache_inv_range(start, end) do {} while (0)
96#define mn10300_dcache_inv_range2(start, size) do {} while (0)
97#define mn10300_dcache_flush() do {} while (0)
98#define mn10300_dcache_flush_inv_page(start) do {} while (0)
99#define mn10300_dcache_flush_inv() do {} while (0)
100#define mn10300_dcache_flush_inv_range(start, end) do {} while (0)
101#define mn10300_dcache_flush_inv_range2(start, size) do {} while (0)
102#define mn10300_dcache_flush_page(start) do {} while (0)
103#define mn10300_dcache_flush_range(start, end) do {} while (0)
104#define mn10300_dcache_flush_range2(start, size) do {} while (0)
105#endif /* CONFIG_MN10300_CACHE_DISABLED */
106
107/*
108 * internal debugging function
109 */
110#ifdef CONFIG_DEBUG_PAGEALLOC
111extern void kernel_map_pages(struct page *page, int numpages, int enable);
112#endif
113
114#endif /* __ASSEMBLY__ */
115
116#endif /* _ASM_CACHEFLUSH_H */
diff --git a/arch/mn10300/include/asm/checksum.h b/arch/mn10300/include/asm/checksum.h
new file mode 100644
index 000000000000..9fb2a8d8826a
--- /dev/null
+++ b/arch/mn10300/include/asm/checksum.h
@@ -0,0 +1,86 @@
1/* MN10300 Optimised checksumming code
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_CHECKSUM_H
12#define _ASM_CHECKSUM_H
13
14extern __wsum csum_partial(const void *buff, int len, __wsum sum);
15extern __wsum csum_partial_copy_nocheck(const void *src, void *dst,
16 int len, __wsum sum);
17extern __wsum csum_partial_copy_from_user(const void *src, void *dst,
18 int len, __wsum sum,
19 int *err_ptr);
20extern __sum16 ip_fast_csum(const void *iph, unsigned int ihl);
21extern __wsum csum_partial(const void *buff, int len, __wsum sum);
22extern __sum16 ip_compute_csum(const void *buff, int len);
23
24#define csum_partial_copy_fromuser csum_partial_copy
25extern __wsum csum_partial_copy(const void *src, void *dst, int len,
26 __wsum sum);
27
28static inline __sum16 csum_fold(__wsum sum)
29{
30 asm(
31 " add %1,%0 \n"
32 " addc 0xffff,%0 \n"
33 : "=r" (sum)
34 : "r" (sum << 16), "0" (sum & 0xffff0000)
35 : "cc"
36 );
37 return (~sum) >> 16;
38}
39
40static inline __wsum csum_tcpudp_nofold(unsigned long saddr,
41 unsigned long daddr,
42 unsigned short len,
43 unsigned short proto,
44 __wsum sum)
45{
46 __wsum tmp;
47
48 tmp = (__wsum) ntohs(len) << 16;
49 tmp += (__wsum) proto << 8;
50
51 asm(
52 " add %1,%0 \n"
53 " addc %2,%0 \n"
54 " addc %3,%0 \n"
55 " addc 0,%0 \n"
56 : "=r" (sum)
57 : "r" (daddr), "r"(saddr), "r"(tmp), "0"(sum)
58 : "cc"
59 );
60 return sum;
61}
62
63/*
64 * computes the checksum of the TCP/UDP pseudo-header
65 * returns a 16-bit checksum, already complemented
66 */
67static inline __sum16 csum_tcpudp_magic(unsigned long saddr,
68 unsigned long daddr,
69 unsigned short len,
70 unsigned short proto,
71 __wsum sum)
72{
73 return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum));
74}
75
76#undef _HAVE_ARCH_IPV6_CSUM
77
78/*
79 * Copy and checksum to user
80 */
81#define HAVE_CSUM_COPY_USER
82extern __wsum csum_and_copy_to_user(const void *src, void *dst, int len,
83 __wsum sum, int *err_ptr);
84
85
86#endif /* _ASM_CHECKSUM_H */
diff --git a/arch/mn10300/include/asm/cpu-regs.h b/arch/mn10300/include/asm/cpu-regs.h
new file mode 100644
index 000000000000..757e9b5388ea
--- /dev/null
+++ b/arch/mn10300/include/asm/cpu-regs.h
@@ -0,0 +1,290 @@
1/* MN10300 Core system registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_CPU_REGS_H
12#define _ASM_CPU_REGS_H
13
14#ifndef __ASSEMBLY__
15#include <linux/types.h>
16#endif
17
18#ifdef CONFIG_MN10300_CPU_AM33V2
19/* we tell the compiler to pretend to be AM33 so that it doesn't try and use
20 * the FP regs, but tell the assembler that we're actually allowed AM33v2
21 * instructions */
22#ifndef __ASSEMBLY__
23asm(" .am33_2\n");
24#else
25.am33_2
26#endif
27#endif
28
29#ifdef __KERNEL__
30
31#ifndef __ASSEMBLY__
32#define __SYSREG(ADDR, TYPE) (*(volatile TYPE *)(ADDR))
33#define __SYSREGC(ADDR, TYPE) (*(const volatile TYPE *)(ADDR))
34#else
35#define __SYSREG(ADDR, TYPE) ADDR
36#define __SYSREGC(ADDR, TYPE) ADDR
37#endif
38
39/* CPU registers */
40#define EPSW_FLAG_Z 0x00000001 /* zero flag */
41#define EPSW_FLAG_N 0x00000002 /* negative flag */
42#define EPSW_FLAG_C 0x00000004 /* carry flag */
43#define EPSW_FLAG_V 0x00000008 /* overflow flag */
44#define EPSW_IM 0x00000700 /* interrupt mode */
45#define EPSW_IM_0 0x00000000 /* interrupt mode 0 */
46#define EPSW_IM_1 0x00000100 /* interrupt mode 1 */
47#define EPSW_IM_2 0x00000200 /* interrupt mode 2 */
48#define EPSW_IM_3 0x00000300 /* interrupt mode 3 */
49#define EPSW_IM_4 0x00000400 /* interrupt mode 4 */
50#define EPSW_IM_5 0x00000500 /* interrupt mode 5 */
51#define EPSW_IM_6 0x00000600 /* interrupt mode 6 */
52#define EPSW_IM_7 0x00000700 /* interrupt mode 7 */
53#define EPSW_IE 0x00000800 /* interrupt enable */
54#define EPSW_S 0x00003000 /* software auxilliary bits */
55#define EPSW_T 0x00008000 /* trace enable */
56#define EPSW_nSL 0x00010000 /* not supervisor level */
57#define EPSW_NMID 0x00020000 /* nonmaskable interrupt disable */
58#define EPSW_nAR 0x00040000 /* register bank control */
59#define EPSW_ML 0x00080000 /* monitor level */
60#define EPSW_FE 0x00100000 /* FPU enable */
61
62/* FPU registers */
63#define FPCR_EF_I 0x00000001 /* inexact result FPU exception flag */
64#define FPCR_EF_U 0x00000002 /* underflow FPU exception flag */
65#define FPCR_EF_O 0x00000004 /* overflow FPU exception flag */
66#define FPCR_EF_Z 0x00000008 /* zero divide FPU exception flag */
67#define FPCR_EF_V 0x00000010 /* invalid operand FPU exception flag */
68#define FPCR_EE_I 0x00000020 /* inexact result FPU exception enable */
69#define FPCR_EE_U 0x00000040 /* underflow FPU exception enable */
70#define FPCR_EE_O 0x00000080 /* overflow FPU exception enable */
71#define FPCR_EE_Z 0x00000100 /* zero divide FPU exception enable */
72#define FPCR_EE_V 0x00000200 /* invalid operand FPU exception enable */
73#define FPCR_EC_I 0x00000400 /* inexact result FPU exception cause */
74#define FPCR_EC_U 0x00000800 /* underflow FPU exception cause */
75#define FPCR_EC_O 0x00001000 /* overflow FPU exception cause */
76#define FPCR_EC_Z 0x00002000 /* zero divide FPU exception cause */
77#define FPCR_EC_V 0x00004000 /* invalid operand FPU exception cause */
78#define FPCR_RM 0x00030000 /* rounding mode */
79#define FPCR_RM_NEAREST 0x00000000 /* - round to nearest value */
80#define FPCR_FCC_U 0x00040000 /* FPU unordered condition code */
81#define FPCR_FCC_E 0x00080000 /* FPU equal condition code */
82#define FPCR_FCC_G 0x00100000 /* FPU greater than condition code */
83#define FPCR_FCC_L 0x00200000 /* FPU less than condition code */
84#define FPCR_INIT 0x00000000 /* no exceptions, rounding to nearest */
85
86/* CPU control registers */
87#define CPUP __SYSREG(0xc0000020, u16) /* CPU pipeline register */
88#define CPUP_DWBD 0x0020 /* write buffer disable flag */
89#define CPUP_IPFD 0x0040 /* instruction prefetch disable flag */
90#define CPUP_EXM 0x0080 /* exception operation mode */
91#define CPUP_EXM_AM33V1 0x0000 /* - AM33 v1 exception mode */
92#define CPUP_EXM_AM33V2 0x0080 /* - AM33 v2 exception mode */
93
94#define CPUM __SYSREG(0xc0000040, u16) /* CPU mode register */
95#define CPUM_SLEEP 0x0004 /* set to enter sleep state */
96#define CPUM_HALT 0x0008 /* set to enter halt state */
97#define CPUM_STOP 0x0010 /* set to enter stop state */
98
99#define CPUREV __SYSREGC(0xc0000050, u32) /* CPU revision register */
100#define CPUREV_TYPE 0x0000000f /* CPU type */
101#define CPUREV_TYPE_S 0
102#define CPUREV_TYPE_AM33V1 0x00000000 /* - AM33 V1 core, AM33/1.00 arch */
103#define CPUREV_TYPE_AM33V2 0x00000001 /* - AM33 V2 core, AM33/2.00 arch */
104#define CPUREV_TYPE_AM34V1 0x00000002 /* - AM34 V1 core, AM33/2.00 arch */
105#define CPUREV_REVISION 0x000000f0 /* CPU revision */
106#define CPUREV_REVISION_S 4
107#define CPUREV_ICWAY 0x00000f00 /* number of instruction cache ways */
108#define CPUREV_ICWAY_S 8
109#define CPUREV_ICSIZE 0x0000f000 /* instruction cache way size */
110#define CPUREV_ICSIZE_S 12
111#define CPUREV_DCWAY 0x000f0000 /* number of data cache ways */
112#define CPUREV_DCWAY_S 16
113#define CPUREV_DCSIZE 0x00f00000 /* data cache way size */
114#define CPUREV_DCSIZE_S 20
115#define CPUREV_FPUTYPE 0x0f000000 /* FPU core type */
116#define CPUREV_FPUTYPE_NONE 0x00000000 /* - no FPU core implemented */
117#define CPUREV_OCDCTG 0xf0000000 /* on-chip debug function category */
118
119#define DCR __SYSREG(0xc0000030, u16) /* Debug control register */
120
121/* interrupt/exception control registers */
122#define IVAR0 __SYSREG(0xc0000000, u16) /* interrupt vector 0 */
123#define IVAR1 __SYSREG(0xc0000004, u16) /* interrupt vector 1 */
124#define IVAR2 __SYSREG(0xc0000008, u16) /* interrupt vector 2 */
125#define IVAR3 __SYSREG(0xc000000c, u16) /* interrupt vector 3 */
126#define IVAR4 __SYSREG(0xc0000010, u16) /* interrupt vector 4 */
127#define IVAR5 __SYSREG(0xc0000014, u16) /* interrupt vector 5 */
128#define IVAR6 __SYSREG(0xc0000018, u16) /* interrupt vector 6 */
129
130#define TBR __SYSREG(0xc0000024, u32) /* Trap table base */
131#define TBR_TB 0xff000000 /* table base address bits 31-24 */
132#define TBR_INT_CODE 0x00ffffff /* interrupt code */
133
134#define DEAR __SYSREG(0xc0000038, u32) /* Data access exception address */
135
136#define sISR __SYSREG(0xc0000044, u32) /* Supervisor interrupt status */
137#define sISR_IRQICE 0x00000001 /* ICE interrupt */
138#define sISR_ISTEP 0x00000002 /* single step interrupt */
139#define sISR_MISSA 0x00000004 /* memory access address misalignment fault */
140#define sISR_UNIMP 0x00000008 /* unimplemented instruction execution fault */
141#define sISR_PIEXE 0x00000010 /* program interrupt */
142#define sISR_MEMERR 0x00000020 /* illegal memory access fault */
143#define sISR_IBREAK 0x00000040 /* instraction break interrupt */
144#define sISR_DBSRL 0x00000080 /* debug serial interrupt */
145#define sISR_PERIDB 0x00000100 /* peripheral debug interrupt */
146#define sISR_EXUNIMP 0x00000200 /* unimplemented ex-instruction execution fault */
147#define sISR_OBREAK 0x00000400 /* operand break interrupt */
148#define sISR_PRIV 0x00000800 /* privileged instruction execution fault */
149#define sISR_BUSERR 0x00001000 /* bus error fault */
150#define sISR_DBLFT 0x00002000 /* double fault */
151#define sISR_DBG 0x00008000 /* debug reserved interrupt */
152#define sISR_ITMISS 0x00010000 /* instruction TLB miss */
153#define sISR_DTMISS 0x00020000 /* data TLB miss */
154#define sISR_ITEX 0x00040000 /* instruction TLB access exception */
155#define sISR_DTEX 0x00080000 /* data TLB access exception */
156#define sISR_ILGIA 0x00100000 /* illegal instruction access exception */
157#define sISR_ILGDA 0x00200000 /* illegal data access exception */
158#define sISR_IOIA 0x00400000 /* internal I/O space instruction access excep */
159#define sISR_PRIVA 0x00800000 /* privileged space instruction access excep */
160#define sISR_PRIDA 0x01000000 /* privileged space data access excep */
161#define sISR_DISA 0x02000000 /* data space instruction access excep */
162#define sISR_SYSC 0x04000000 /* system call instruction excep */
163#define sISR_FPUD 0x08000000 /* FPU disabled excep */
164#define sISR_FPUUI 0x10000000 /* FPU unimplemented instruction excep */
165#define sISR_FPUOP 0x20000000 /* FPU operation excep */
166#define sISR_NE 0x80000000 /* multiple synchronous exceptions excep */
167
168/* cache control registers */
169#define CHCTR __SYSREG(0xc0000070, u16) /* cache control */
170#define CHCTR_ICEN 0x0001 /* instruction cache enable */
171#define CHCTR_DCEN 0x0002 /* data cache enable */
172#define CHCTR_ICBUSY 0x0004 /* instruction cache busy */
173#define CHCTR_DCBUSY 0x0008 /* data cache busy */
174#define CHCTR_ICINV 0x0010 /* instruction cache invalidate */
175#define CHCTR_DCINV 0x0020 /* data cache invalidate */
176#define CHCTR_DCWTMD 0x0040 /* data cache writing mode */
177#define CHCTR_DCWTMD_WRBACK 0x0000 /* - write back mode */
178#define CHCTR_DCWTMD_WRTHROUGH 0x0040 /* - write through mode */
179#define CHCTR_DCALMD 0x0080 /* data cache allocation mode */
180#define CHCTR_ICWMD 0x0f00 /* instruction cache way mode */
181#define CHCTR_DCWMD 0xf000 /* data cache way mode */
182
183/* MMU control registers */
184#define MMUCTR __SYSREG(0xc0000090, u32) /* MMU control register */
185#define MMUCTR_IRP 0x0000003f /* instruction TLB replace pointer */
186#define MMUCTR_ITE 0x00000040 /* instruction TLB enable */
187#define MMUCTR_IIV 0x00000080 /* instruction TLB invalidate */
188#define MMUCTR_ITL 0x00000700 /* instruction TLB lock pointer */
189#define MMUCTR_ITL_NOLOCK 0x00000000 /* - no lock */
190#define MMUCTR_ITL_LOCK0 0x00000100 /* - entry 0 locked */
191#define MMUCTR_ITL_LOCK0_1 0x00000200 /* - entry 0-1 locked */
192#define MMUCTR_ITL_LOCK0_3 0x00000300 /* - entry 0-3 locked */
193#define MMUCTR_ITL_LOCK0_7 0x00000400 /* - entry 0-7 locked */
194#define MMUCTR_ITL_LOCK0_15 0x00000500 /* - entry 0-15 locked */
195#define MMUCTR_CE 0x00008000 /* cacheable bit enable */
196#define MMUCTR_DRP 0x003f0000 /* data TLB replace pointer */
197#define MMUCTR_DTE 0x00400000 /* data TLB enable */
198#define MMUCTR_DIV 0x00800000 /* data TLB invalidate */
199#define MMUCTR_DTL 0x07000000 /* data TLB lock pointer */
200#define MMUCTR_DTL_NOLOCK 0x00000000 /* - no lock */
201#define MMUCTR_DTL_LOCK0 0x01000000 /* - entry 0 locked */
202#define MMUCTR_DTL_LOCK0_1 0x02000000 /* - entry 0-1 locked */
203#define MMUCTR_DTL_LOCK0_3 0x03000000 /* - entry 0-3 locked */
204#define MMUCTR_DTL_LOCK0_7 0x04000000 /* - entry 0-7 locked */
205#define MMUCTR_DTL_LOCK0_15 0x05000000 /* - entry 0-15 locked */
206
207#define PIDR __SYSREG(0xc0000094, u16) /* PID register */
208#define PIDR_PID 0x00ff /* process identifier */
209
210#define PTBR __SYSREG(0xc0000098, unsigned long) /* Page table base register */
211
212#define IPTEL __SYSREG(0xc00000a0, u32) /* instruction TLB entry */
213#define DPTEL __SYSREG(0xc00000b0, u32) /* data TLB entry */
214#define xPTEL_V 0x00000001 /* TLB entry valid */
215#define xPTEL_UNUSED1 0x00000002 /* unused bit */
216#define xPTEL_UNUSED2 0x00000004 /* unused bit */
217#define xPTEL_C 0x00000008 /* cached if set */
218#define xPTEL_PV 0x00000010 /* page valid */
219#define xPTEL_D 0x00000020 /* dirty */
220#define xPTEL_PR 0x000001c0 /* page protection */
221#define xPTEL_PR_ROK 0x00000000 /* - R/O kernel */
222#define xPTEL_PR_RWK 0x00000100 /* - R/W kernel */
223#define xPTEL_PR_ROK_ROU 0x00000080 /* - R/O kernel and R/O user */
224#define xPTEL_PR_RWK_ROU 0x00000180 /* - R/W kernel and R/O user */
225#define xPTEL_PR_RWK_RWU 0x000001c0 /* - R/W kernel and R/W user */
226#define xPTEL_G 0x00000200 /* global (use PID if 0) */
227#define xPTEL_PS 0x00000c00 /* page size */
228#define xPTEL_PS_4Kb 0x00000000 /* - 4Kb page */
229#define xPTEL_PS_128Kb 0x00000400 /* - 128Kb page */
230#define xPTEL_PS_1Kb 0x00000800 /* - 1Kb page */
231#define xPTEL_PS_4Mb 0x00000c00 /* - 4Mb page */
232#define xPTEL_PPN 0xfffff006 /* physical page number */
233
234#define xPTEL_V_BIT 0 /* bit numbers corresponding to above masks */
235#define xPTEL_UNUSED1_BIT 1
236#define xPTEL_UNUSED2_BIT 2
237#define xPTEL_C_BIT 3
238#define xPTEL_PV_BIT 4
239#define xPTEL_D_BIT 5
240#define xPTEL_G_BIT 9
241
242#define IPTEU __SYSREG(0xc00000a4, u32) /* instruction TLB virtual addr */
243#define DPTEU __SYSREG(0xc00000b4, u32) /* data TLB virtual addr */
244#define xPTEU_VPN 0xfffffc00 /* virtual page number */
245#define xPTEU_PID 0x000000ff /* process identifier to which applicable */
246
247#define IPTEL2 __SYSREG(0xc00000a8, u32) /* instruction TLB entry */
248#define DPTEL2 __SYSREG(0xc00000b8, u32) /* data TLB entry */
249#define xPTEL2_V 0x00000001 /* TLB entry valid */
250#define xPTEL2_C 0x00000002 /* cacheable */
251#define xPTEL2_PV 0x00000004 /* page valid */
252#define xPTEL2_D 0x00000008 /* dirty */
253#define xPTEL2_PR 0x00000070 /* page protection */
254#define xPTEL2_PR_ROK 0x00000000 /* - R/O kernel */
255#define xPTEL2_PR_RWK 0x00000040 /* - R/W kernel */
256#define xPTEL2_PR_ROK_ROU 0x00000020 /* - R/O kernel and R/O user */
257#define xPTEL2_PR_RWK_ROU 0x00000060 /* - R/W kernel and R/O user */
258#define xPTEL2_PR_RWK_RWU 0x00000070 /* - R/W kernel and R/W user */
259#define xPTEL2_G 0x00000080 /* global (use PID if 0) */
260#define xPTEL2_PS 0x00000300 /* page size */
261#define xPTEL2_PS_4Kb 0x00000000 /* - 4Kb page */
262#define xPTEL2_PS_128Kb 0x00000100 /* - 128Kb page */
263#define xPTEL2_PS_1Kb 0x00000200 /* - 1Kb page */
264#define xPTEL2_PS_4Mb 0x00000300 /* - 4Mb page */
265#define xPTEL2_PPN 0xfffffc00 /* physical page number */
266
267#define MMUFCR __SYSREGC(0xc000009c, u32) /* MMU exception cause */
268#define MMUFCR_IFC __SYSREGC(0xc000009c, u16) /* MMU instruction excep cause */
269#define MMUFCR_DFC __SYSREGC(0xc000009e, u16) /* MMU data exception cause */
270#define MMUFCR_xFC_TLBMISS 0x0001 /* TLB miss flag */
271#define MMUFCR_xFC_INITWR 0x0002 /* initial write excep flag */
272#define MMUFCR_xFC_PGINVAL 0x0004 /* page invalid excep flag */
273#define MMUFCR_xFC_PROTVIOL 0x0008 /* protection violation excep flag */
274#define MMUFCR_xFC_ACCESS 0x0010 /* access level flag */
275#define MMUFCR_xFC_ACCESS_USR 0x0000 /* - user mode */
276#define MMUFCR_xFC_ACCESS_SR 0x0010 /* - supervisor mode */
277#define MMUFCR_xFC_TYPE 0x0020 /* access type flag */
278#define MMUFCR_xFC_TYPE_READ 0x0000 /* - read */
279#define MMUFCR_xFC_TYPE_WRITE 0x0020 /* - write */
280#define MMUFCR_xFC_PR 0x01c0 /* page protection flag */
281#define MMUFCR_xFC_PR_ROK 0x0000 /* - R/O kernel */
282#define MMUFCR_xFC_PR_RWK 0x0100 /* - R/W kernel */
283#define MMUFCR_xFC_PR_ROK_ROU 0x0080 /* - R/O kernel and R/O user */
284#define MMUFCR_xFC_PR_RWK_ROU 0x0180 /* - R/W kernel and R/O user */
285#define MMUFCR_xFC_PR_RWK_RWU 0x01c0 /* - R/W kernel and R/W user */
286#define MMUFCR_xFC_ILLADDR 0x0200 /* illegal address excep flag */
287
288#endif /* __KERNEL__ */
289
290#endif /* _ASM_CPU_REGS_H */
diff --git a/arch/mn10300/include/asm/cputime.h b/arch/mn10300/include/asm/cputime.h
new file mode 100644
index 000000000000..6d68ad7e0ea3
--- /dev/null
+++ b/arch/mn10300/include/asm/cputime.h
@@ -0,0 +1 @@
#include <asm-generic/cputime.h>
diff --git a/arch/mn10300/include/asm/current.h b/arch/mn10300/include/asm/current.h
new file mode 100644
index 000000000000..ca6027d83743
--- /dev/null
+++ b/arch/mn10300/include/asm/current.h
@@ -0,0 +1,37 @@
1/* MN10300 Current task structure accessor
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_CURRENT_H
12#define _ASM_CURRENT_H
13
14#include <linux/thread_info.h>
15
16/*
17 * dedicate E2 to keeping the current task pointer
18 */
19#ifdef CONFIG_MN10300_CURRENT_IN_E2
20
21register struct task_struct *const current asm("e2") __attribute__((used));
22
23#define get_current() current
24
25extern struct task_struct *__current;
26
27#else
28static inline __attribute__((const))
29struct task_struct *get_current(void)
30{
31 return current_thread_info()->task;
32}
33
34#define current get_current()
35#endif
36
37#endif /* _ASM_CURRENT_H */
diff --git a/arch/mn10300/include/asm/delay.h b/arch/mn10300/include/asm/delay.h
new file mode 100644
index 000000000000..34517b359399
--- /dev/null
+++ b/arch/mn10300/include/asm/delay.h
@@ -0,0 +1,19 @@
1/* MN10300 Uninterruptible delay routines
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_DELAY_H
12#define _ASM_DELAY_H
13
14extern void __udelay(unsigned long usecs);
15extern void __delay(unsigned long loops);
16
17#define udelay(n) __udelay(n)
18
19#endif /* _ASM_DELAY_H */
diff --git a/arch/mn10300/include/asm/device.h b/arch/mn10300/include/asm/device.h
new file mode 100644
index 000000000000..f0a4c256403b
--- /dev/null
+++ b/arch/mn10300/include/asm/device.h
@@ -0,0 +1 @@
#include <asm-generic/device.h>
diff --git a/arch/mn10300/include/asm/div64.h b/arch/mn10300/include/asm/div64.h
new file mode 100644
index 000000000000..3a8329b3e869
--- /dev/null
+++ b/arch/mn10300/include/asm/div64.h
@@ -0,0 +1,100 @@
1/* MN10300 64-bit division
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_DIV64
12#define _ASM_DIV64
13
14#include <linux/types.h>
15
16extern void ____unhandled_size_in_do_div___(void);
17
18/*
19 * divide n by base, leaving the result in n and returning the remainder
20 * - we can do this quite efficiently on the MN10300 by cascading the divides
21 * through the MDR register
22 */
23#define do_div(n, base) \
24({ \
25 unsigned __rem = 0; \
26 if (sizeof(n) <= 4) { \
27 asm("mov %1,mdr \n" \
28 "divu %2,%0 \n" \
29 "mov mdr,%1 \n" \
30 : "+r"(n), "=d"(__rem) \
31 : "r"(base), "1"(__rem) \
32 : "cc" \
33 ); \
34 } else if (sizeof(n) <= 8) { \
35 union { \
36 unsigned long long l; \
37 u32 w[2]; \
38 } __quot; \
39 __quot.l = n; \
40 asm("mov %0,mdr \n" /* MDR = 0 */ \
41 "divu %3,%1 \n" \
42 /* __quot.MSL = __div.MSL / base, */ \
43 /* MDR = MDR:__div.MSL % base */ \
44 "divu %3,%2 \n" \
45 /* __quot.LSL = MDR:__div.LSL / base, */ \
46 /* MDR = MDR:__div.LSL % base */ \
47 "mov mdr,%0 \n" \
48 : "=d"(__rem), "=r"(__quot.w[1]), "=r"(__quot.w[0]) \
49 : "r"(base), "0"(__rem), "1"(__quot.w[1]), \
50 "2"(__quot.w[0]) \
51 : "cc" \
52 ); \
53 n = __quot.l; \
54 } else { \
55 ____unhandled_size_in_do_div___(); \
56 } \
57 __rem; \
58})
59
60/*
61 * do an unsigned 32-bit multiply and divide with intermediate 64-bit product
62 * so as not to lose accuracy
63 * - we use the MDR register to hold the MSW of the product
64 */
65static inline __attribute__((const))
66unsigned __muldiv64u(unsigned val, unsigned mult, unsigned div)
67{
68 unsigned result;
69
70 asm("mulu %2,%0 \n" /* MDR:val = val*mult */
71 "divu %3,%0 \n" /* val = MDR:val/div;
72 * MDR = MDR:val%div */
73 : "=r"(result)
74 : "0"(val), "ir"(mult), "r"(div)
75 );
76
77 return result;
78}
79
80/*
81 * do a signed 32-bit multiply and divide with intermediate 64-bit product so
82 * as not to lose accuracy
83 * - we use the MDR register to hold the MSW of the product
84 */
85static inline __attribute__((const))
86signed __muldiv64s(signed val, signed mult, signed div)
87{
88 signed result;
89
90 asm("mul %2,%0 \n" /* MDR:val = val*mult */
91 "div %3,%0 \n" /* val = MDR:val/div;
92 * MDR = MDR:val%div */
93 : "=r"(result)
94 : "0"(val), "ir"(mult), "r"(div)
95 );
96
97 return result;
98}
99
100#endif /* _ASM_DIV64 */
diff --git a/arch/mn10300/include/asm/dma-mapping.h b/arch/mn10300/include/asm/dma-mapping.h
new file mode 100644
index 000000000000..ccae8f6c6326
--- /dev/null
+++ b/arch/mn10300/include/asm/dma-mapping.h
@@ -0,0 +1,234 @@
1/* DMA mapping routines for the MN10300 arch
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_DMA_MAPPING_H
12#define _ASM_DMA_MAPPING_H
13
14#include <linux/mm.h>
15#include <linux/scatterlist.h>
16
17#include <asm/cache.h>
18#include <asm/io.h>
19
20extern void *dma_alloc_coherent(struct device *dev, size_t size,
21 dma_addr_t *dma_handle, int flag);
22
23extern void dma_free_coherent(struct device *dev, size_t size,
24 void *vaddr, dma_addr_t dma_handle);
25
26#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent((d), (s), (h), (f))
27#define dma_free_noncoherent(d, s, v, h) dma_free_coherent((d), (s), (v), (h))
28
29/*
30 * Map a single buffer of the indicated size for DMA in streaming mode. The
31 * 32-bit bus address to use is returned.
32 *
33 * Once the device is given the dma address, the device owns this memory until
34 * either pci_unmap_single or pci_dma_sync_single is performed.
35 */
36static inline
37dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
38 enum dma_data_direction direction)
39{
40 BUG_ON(direction == DMA_NONE);
41 mn10300_dcache_flush_inv();
42 return virt_to_bus(ptr);
43}
44
45/*
46 * Unmap a single streaming mode DMA translation. The dma_addr and size must
47 * match what was provided for in a previous pci_map_single call. All other
48 * usages are undefined.
49 *
50 * After this call, reads by the cpu to the buffer are guarenteed to see
51 * whatever the device wrote there.
52 */
53static inline
54void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
55 enum dma_data_direction direction)
56{
57 BUG_ON(direction == DMA_NONE);
58}
59
60/*
61 * Map a set of buffers described by scatterlist in streaming mode for DMA.
62 * This is the scather-gather version of the above pci_map_single interface.
63 * Here the scatter gather list elements are each tagged with the appropriate
64 * dma address and length. They are obtained via sg_dma_{address,length}(SG).
65 *
66 * NOTE: An implementation may be able to use a smaller number of DMA
67 * address/length pairs than there are SG table elements. (for example
68 * via virtual mapping capabilities) The routine returns the number of
69 * addr/length pairs actually used, at most nents.
70 *
71 * Device ownership issues as mentioned above for pci_map_single are the same
72 * here.
73 */
74static inline
75int dma_map_sg(struct device *dev, struct scatterlist *sglist, int nents,
76 enum dma_data_direction direction)
77{
78 struct scatterlist *sg;
79 int i;
80
81 BUG_ON(!valid_dma_direction(direction));
82 WARN_ON(nents == 0 || sglist[0].length == 0);
83
84 for_each_sg(sglist, sg, nents, i) {
85 BUG_ON(!sg_page(sg));
86
87 sg->dma_address = sg_phys(sg);
88 }
89
90 mn10300_dcache_flush_inv();
91 return nents;
92}
93
94/*
95 * Unmap a set of streaming mode DMA translations.
96 * Again, cpu read rules concerning calls here are the same as for
97 * pci_unmap_single() above.
98 */
99static inline
100void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
101 enum dma_data_direction direction)
102{
103 BUG_ON(!valid_dma_direction(direction));
104}
105
106/*
107 * pci_{map,unmap}_single_page maps a kernel page to a dma_addr_t. identical
108 * to pci_map_single, but takes a struct page instead of a virtual address
109 */
110static inline
111dma_addr_t dma_map_page(struct device *dev, struct page *page,
112 unsigned long offset, size_t size,
113 enum dma_data_direction direction)
114{
115 BUG_ON(direction == DMA_NONE);
116 return page_to_bus(page) + offset;
117}
118
119static inline
120void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
121 enum dma_data_direction direction)
122{
123 BUG_ON(direction == DMA_NONE);
124}
125
126/*
127 * Make physical memory consistent for a single streaming mode DMA translation
128 * after a transfer.
129 *
130 * If you perform a pci_map_single() but wish to interrogate the buffer using
131 * the cpu, yet do not wish to teardown the PCI dma mapping, you must call this
132 * function before doing so. At the next point you give the PCI dma address
133 * back to the card, the device again owns the buffer.
134 */
135static inline
136void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
137 size_t size, enum dma_data_direction direction)
138{
139}
140
141static inline
142void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
143 size_t size, enum dma_data_direction direction)
144{
145 mn10300_dcache_flush_inv();
146}
147
148static inline
149void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
150 unsigned long offset, size_t size,
151 enum dma_data_direction direction)
152{
153}
154
155static inline void
156dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
157 unsigned long offset, size_t size,
158 enum dma_data_direction direction)
159{
160 mn10300_dcache_flush_inv();
161}
162
163
164/*
165 * Make physical memory consistent for a set of streaming mode DMA translations
166 * after a transfer.
167 *
168 * The same as pci_dma_sync_single but for a scatter-gather list, same rules
169 * and usage.
170 */
171static inline
172void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
173 int nelems, enum dma_data_direction direction)
174{
175}
176
177static inline
178void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
179 int nelems, enum dma_data_direction direction)
180{
181 mn10300_dcache_flush_inv();
182}
183
184static inline
185int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
186{
187 return 0;
188}
189
190/*
191 * Return whether the given PCI device DMA address mask can be supported
192 * properly. For example, if your device can only drive the low 24-bits during
193 * PCI bus mastering, then you would pass 0x00ffffff as the mask to this
194 * function.
195 */
196static inline
197int dma_supported(struct device *dev, u64 mask)
198{
199 /*
200 * we fall back to GFP_DMA when the mask isn't all 1s, so we can't
201 * guarantee allocations that must be within a tighter range than
202 * GFP_DMA
203 */
204 if (mask < 0x00ffffff)
205 return 0;
206 return 1;
207}
208
209static inline
210int dma_set_mask(struct device *dev, u64 mask)
211{
212 if (!dev->dma_mask || !dma_supported(dev, mask))
213 return -EIO;
214
215 *dev->dma_mask = mask;
216 return 0;
217}
218
219static inline
220int dma_get_cache_alignment(void)
221{
222 return 1 << L1_CACHE_SHIFT;
223}
224
225#define dma_is_consistent(d) (1)
226
227static inline
228void dma_cache_sync(void *vaddr, size_t size,
229 enum dma_data_direction direction)
230{
231 mn10300_dcache_flush_inv();
232}
233
234#endif
diff --git a/arch/mn10300/include/asm/dma.h b/arch/mn10300/include/asm/dma.h
new file mode 100644
index 000000000000..098df2e617ab
--- /dev/null
+++ b/arch/mn10300/include/asm/dma.h
@@ -0,0 +1,118 @@
1/* MN10300 ISA DMA handlers and definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_DMA_H
12#define _ASM_DMA_H
13
14#include <asm/system.h>
15#include <linux/spinlock.h>
16#include <asm/io.h>
17#include <linux/delay.h>
18
19#undef MAX_DMA_CHANNELS /* switch off linux/kernel/dma.c */
20#define MAX_DMA_ADDRESS 0xbfffffff
21
22extern spinlock_t dma_spin_lock;
23
24static inline unsigned long claim_dma_lock(void)
25{
26 unsigned long flags;
27 spin_lock_irqsave(&dma_spin_lock, flags);
28 return flags;
29}
30
31static inline void release_dma_lock(unsigned long flags)
32{
33 spin_unlock_irqrestore(&dma_spin_lock, flags);
34}
35
36/* enable/disable a specific DMA channel */
37static inline void enable_dma(unsigned int dmanr)
38{
39}
40
41static inline void disable_dma(unsigned int dmanr)
42{
43}
44
45/* Clear the 'DMA Pointer Flip Flop'.
46 * Write 0 for LSB/MSB, 1 for MSB/LSB access.
47 * Use this once to initialize the FF to a known state.
48 * After that, keep track of it. :-)
49 * --- In order to do that, the DMA routines below should ---
50 * --- only be used while holding the DMA lock ! ---
51 */
52static inline void clear_dma_ff(unsigned int dmanr)
53{
54}
55
56/* set mode (above) for a specific DMA channel */
57static inline void set_dma_mode(unsigned int dmanr, char mode)
58{
59}
60
61/* Set only the page register bits of the transfer address.
62 * This is used for successive transfers when we know the contents of
63 * the lower 16 bits of the DMA current address register, but a 64k boundary
64 * may have been crossed.
65 */
66static inline void set_dma_page(unsigned int dmanr, char pagenr)
67{
68}
69
70
71/* Set transfer address & page bits for specific DMA channel.
72 * Assumes dma flipflop is clear.
73 */
74static inline void set_dma_addr(unsigned int dmanr, unsigned int a)
75{
76}
77
78
79/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for
80 * a specific DMA channel.
81 * You must ensure the parameters are valid.
82 * NOTE: from a manual: "the number of transfers is one more
83 * than the initial word count"! This is taken into account.
84 * Assumes dma flip-flop is clear.
85 * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7.
86 */
87static inline void set_dma_count(unsigned int dmanr, unsigned int count)
88{
89}
90
91
92/* Get DMA residue count. After a DMA transfer, this
93 * should return zero. Reading this while a DMA transfer is
94 * still in progress will return unpredictable results.
95 * If called before the channel has been used, it may return 1.
96 * Otherwise, it returns the number of _bytes_ left to transfer.
97 *
98 * Assumes DMA flip-flop is clear.
99 */
100static inline int get_dma_residue(unsigned int dmanr)
101{
102 return 0;
103}
104
105
106/* These are in kernel/dma.c: */
107extern int request_dma(unsigned int dmanr, const char *device_id);
108extern void free_dma(unsigned int dmanr);
109
110/* From PCI */
111
112#ifdef CONFIG_PCI
113extern int isa_dma_bridge_buggy;
114#else
115#define isa_dma_bridge_buggy (0)
116#endif
117
118#endif /* _ASM_DMA_H */
diff --git a/arch/mn10300/include/asm/dmactl-regs.h b/arch/mn10300/include/asm/dmactl-regs.h
new file mode 100644
index 000000000000..58a199da0f4a
--- /dev/null
+++ b/arch/mn10300/include/asm/dmactl-regs.h
@@ -0,0 +1,101 @@
1/* MN10300 on-board DMA controller registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_DMACTL_REGS_H
12#define _ASM_DMACTL_REGS_H
13
14#include <asm/cpu-regs.h>
15
16#ifdef __KERNEL__
17
18/* DMA registers */
19#define DMxCTR(N) __SYSREG(0xd2000000 + ((N) * 0x100), u32) /* control reg */
20#define DMxCTR_BG 0x0000001f /* transfer request source */
21#define DMxCTR_BG_SOFT 0x00000000 /* - software source */
22#define DMxCTR_BG_SC0TX 0x00000002 /* - serial port 0 transmission */
23#define DMxCTR_BG_SC0RX 0x00000003 /* - serial port 0 reception */
24#define DMxCTR_BG_SC1TX 0x00000004 /* - serial port 1 transmission */
25#define DMxCTR_BG_SC1RX 0x00000005 /* - serial port 1 reception */
26#define DMxCTR_BG_SC2TX 0x00000006 /* - serial port 2 transmission */
27#define DMxCTR_BG_SC2RX 0x00000007 /* - serial port 2 reception */
28#define DMxCTR_BG_TM0UFLOW 0x00000008 /* - timer 0 underflow */
29#define DMxCTR_BG_TM1UFLOW 0x00000009 /* - timer 1 underflow */
30#define DMxCTR_BG_TM2UFLOW 0x0000000a /* - timer 2 underflow */
31#define DMxCTR_BG_TM3UFLOW 0x0000000b /* - timer 3 underflow */
32#define DMxCTR_BG_TM6ACMPCAP 0x0000000c /* - timer 6A compare/capture */
33#define DMxCTR_BG_AFE 0x0000000d /* - analogue front-end interrupt source */
34#define DMxCTR_BG_ADC 0x0000000e /* - A/D conversion end interrupt source */
35#define DMxCTR_BG_IRDA 0x0000000f /* - IrDA interrupt source */
36#define DMxCTR_BG_RTC 0x00000010 /* - RTC interrupt source */
37#define DMxCTR_BG_XIRQ0 0x00000011 /* - XIRQ0 pin interrupt source */
38#define DMxCTR_BG_XIRQ1 0x00000012 /* - XIRQ1 pin interrupt source */
39#define DMxCTR_BG_XDMR0 0x00000013 /* - external request 0 source (XDMR0 pin) */
40#define DMxCTR_BG_XDMR1 0x00000014 /* - external request 1 source (XDMR1 pin) */
41#define DMxCTR_SAM 0x000000e0 /* DMA transfer src addr mode */
42#define DMxCTR_SAM_INCR 0x00000000 /* - increment */
43#define DMxCTR_SAM_DECR 0x00000020 /* - decrement */
44#define DMxCTR_SAM_FIXED 0x00000040 /* - fixed */
45#define DMxCTR_DAM 0x00000000 /* DMA transfer dest addr mode */
46#define DMxCTR_DAM_INCR 0x00000000 /* - increment */
47#define DMxCTR_DAM_DECR 0x00000100 /* - decrement */
48#define DMxCTR_DAM_FIXED 0x00000200 /* - fixed */
49#define DMxCTR_TM 0x00001800 /* DMA transfer mode */
50#define DMxCTR_TM_BATCH 0x00000000 /* - batch transfer */
51#define DMxCTR_TM_INTERM 0x00001000 /* - intermittent transfer */
52#define DMxCTR_UT 0x00006000 /* DMA transfer unit */
53#define DMxCTR_UT_1 0x00000000 /* - 1 byte */
54#define DMxCTR_UT_2 0x00002000 /* - 2 byte */
55#define DMxCTR_UT_4 0x00004000 /* - 4 byte */
56#define DMxCTR_UT_16 0x00006000 /* - 16 byte */
57#define DMxCTR_TEN 0x00010000 /* DMA channel transfer enable */
58#define DMxCTR_RQM 0x00060000 /* external request input source mode */
59#define DMxCTR_RQM_FALLEDGE 0x00000000 /* - falling edge */
60#define DMxCTR_RQM_RISEEDGE 0x00020000 /* - rising edge */
61#define DMxCTR_RQM_LOLEVEL 0x00040000 /* - low level */
62#define DMxCTR_RQM_HILEVEL 0x00060000 /* - high level */
63#define DMxCTR_RQF 0x01000000 /* DMA transfer request flag */
64#define DMxCTR_XEND 0x80000000 /* DMA transfer end flag */
65
66#define DMxSRC(N) __SYSREG(0xd2000004 + ((N) * 0x100), u32) /* control reg */
67
68#define DMxDST(N) __SYSREG(0xd2000008 + ((N) * 0x100), u32) /* src addr reg */
69
70#define DMxSIZ(N) __SYSREG(0xd200000c + ((N) * 0x100), u32) /* dest addr reg */
71#define DMxSIZ_CT 0x000fffff /* number of bytes to transfer */
72
73#define DMxCYC(N) __SYSREG(0xd2000010 + ((N) * 0x100), u32) /* intermittent
74 * size reg */
75#define DMxCYC_CYC 0x000000ff /* number of interrmittent transfers -1 */
76
77#define DM0IRQ 16 /* DMA channel 0 complete IRQ */
78#define DM1IRQ 17 /* DMA channel 1 complete IRQ */
79#define DM2IRQ 18 /* DMA channel 2 complete IRQ */
80#define DM3IRQ 19 /* DMA channel 3 complete IRQ */
81
82#define DM0ICR GxICR(DM0IRQ) /* DMA channel 0 complete intr ctrl reg */
83#define DM1ICR GxICR(DM0IR1) /* DMA channel 1 complete intr ctrl reg */
84#define DM2ICR GxICR(DM0IR2) /* DMA channel 2 complete intr ctrl reg */
85#define DM3ICR GxICR(DM0IR3) /* DMA channel 3 complete intr ctrl reg */
86
87#ifndef __ASSEMBLY__
88
89struct mn10300_dmactl_regs {
90 u32 ctr;
91 const void *src;
92 void *dst;
93 u32 siz;
94 u32 cyc;
95} __attribute__((aligned(0x100)));
96
97#endif /* __ASSEMBLY__ */
98
99#endif /* __KERNEL__ */
100
101#endif /* _ASM_DMACTL_REGS_H */
diff --git a/arch/mn10300/include/asm/elf.h b/arch/mn10300/include/asm/elf.h
new file mode 100644
index 000000000000..bf09f8bb392e
--- /dev/null
+++ b/arch/mn10300/include/asm/elf.h
@@ -0,0 +1,147 @@
1/* MN10300 ELF constant and register definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Written by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_ELF_H
13#define _ASM_ELF_H
14
15#include <linux/utsname.h>
16#include <asm/ptrace.h>
17#include <asm/user.h>
18
19/*
20 * AM33 relocations
21 */
22#define R_MN10300_NONE 0 /* No reloc. */
23#define R_MN10300_32 1 /* Direct 32 bit. */
24#define R_MN10300_16 2 /* Direct 16 bit. */
25#define R_MN10300_8 3 /* Direct 8 bit. */
26#define R_MN10300_PCREL32 4 /* PC-relative 32-bit. */
27#define R_MN10300_PCREL16 5 /* PC-relative 16-bit signed. */
28#define R_MN10300_PCREL8 6 /* PC-relative 8-bit signed. */
29#define R_MN10300_24 9 /* Direct 24 bit. */
30#define R_MN10300_RELATIVE 23 /* Adjust by program base. */
31
32/*
33 * ELF register definitions..
34 */
35typedef unsigned long elf_greg_t;
36
37#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
38typedef elf_greg_t elf_gregset_t[ELF_NGREG];
39
40#define ELF_NFPREG 32
41typedef float elf_fpreg_t;
42
43typedef struct {
44 elf_fpreg_t fpregs[ELF_NFPREG];
45 u_int32_t fpcr;
46} elf_fpregset_t;
47
48extern int dump_fpu(struct pt_regs *, elf_fpregset_t *);
49
50/*
51 * This is used to ensure we don't load something for the wrong architecture
52 */
53#define elf_check_arch(x) \
54 (((x)->e_machine == EM_CYGNUS_MN10300) || \
55 ((x)->e_machine == EM_MN10300))
56
57/*
58 * These are used to set parameters in the core dumps.
59 */
60#define ELF_CLASS ELFCLASS32
61#define ELF_DATA ELFDATA2LSB
62#define ELF_ARCH EM_MN10300
63
64/*
65 * ELF process initialiser
66 */
67#define ELF_PLAT_INIT(_r, load_addr) \
68do { \
69 struct pt_regs *_ur = current->thread.uregs; \
70 _ur->a3 = 0; _ur->a2 = 0; _ur->d3 = 0; _ur->d2 = 0; \
71 _ur->mcvf = 0; _ur->mcrl = 0; _ur->mcrh = 0; _ur->mdrq = 0; \
72 _ur->e1 = 0; _ur->e0 = 0; _ur->e7 = 0; _ur->e6 = 0; \
73 _ur->e5 = 0; _ur->e4 = 0; _ur->e3 = 0; _ur->e2 = 0; \
74 _ur->lar = 0; _ur->lir = 0; _ur->mdr = 0; \
75 _ur->a1 = 0; _ur->a0 = 0; _ur->d1 = 0; _ur->d0 = 0; \
76} while (0)
77
78#define USE_ELF_CORE_DUMP
79#define ELF_EXEC_PAGESIZE 4096
80
81/*
82 * This is the location that an ET_DYN program is loaded if exec'ed. Typical
83 * use of this is to invoke "./ld.so someprog" to test out a new version of
84 * the loader. We need to make sure that it is out of the way of the program
85 * that it will "exec", and that there is sufficient room for the brk.
86 * - must clear the VMALLOC area
87 */
88#define ELF_ET_DYN_BASE 0x04000000
89
90/*
91 * regs is struct pt_regs, pr_reg is elf_gregset_t (which is
92 * now struct user_regs, they are different)
93 * - ELF_CORE_COPY_REGS has been guessed, and may be wrong
94 */
95#define ELF_CORE_COPY_REGS(pr_reg, regs) \
96do { \
97 pr_reg[0] = regs->a3; \
98 pr_reg[1] = regs->a2; \
99 pr_reg[2] = regs->d3; \
100 pr_reg[3] = regs->d2; \
101 pr_reg[4] = regs->mcvf; \
102 pr_reg[5] = regs->mcrl; \
103 pr_reg[6] = regs->mcrh; \
104 pr_reg[7] = regs->mdrq; \
105 pr_reg[8] = regs->e1; \
106 pr_reg[9] = regs->e0; \
107 pr_reg[10] = regs->e7; \
108 pr_reg[11] = regs->e6; \
109 pr_reg[12] = regs->e5; \
110 pr_reg[13] = regs->e4; \
111 pr_reg[14] = regs->e3; \
112 pr_reg[15] = regs->e2; \
113 pr_reg[16] = regs->sp; \
114 pr_reg[17] = regs->lar; \
115 pr_reg[18] = regs->lir; \
116 pr_reg[19] = regs->mdr; \
117 pr_reg[20] = regs->a1; \
118 pr_reg[21] = regs->a0; \
119 pr_reg[22] = regs->d1; \
120 pr_reg[23] = regs->d0; \
121 pr_reg[24] = regs->orig_d0; \
122 pr_reg[25] = regs->epsw; \
123 pr_reg[26] = regs->pc; \
124} while (0);
125
126/*
127 * This yields a mask that user programs can use to figure out what
128 * instruction set this CPU supports. This could be done in user space,
129 * but it's not easy, and we've already done it here.
130 */
131#define ELF_HWCAP (0)
132
133/*
134 * This yields a string that ld.so will use to load implementation
135 * specific libraries for optimization. This is more specific in
136 * intent than poking at uname or /proc/cpuinfo.
137 *
138 * For the moment, we have only optimizations for the Intel generations,
139 * but that could change...
140 */
141#define ELF_PLATFORM (NULL)
142
143#ifdef __KERNEL__
144#define SET_PERSONALITY(ex) set_personality(PER_LINUX)
145#endif
146
147#endif /* _ASM_ELF_H */
diff --git a/arch/mn10300/include/asm/emergency-restart.h b/arch/mn10300/include/asm/emergency-restart.h
new file mode 100644
index 000000000000..3711bd9d50bd
--- /dev/null
+++ b/arch/mn10300/include/asm/emergency-restart.h
@@ -0,0 +1 @@
#include <asm-generic/emergency-restart.h>
diff --git a/arch/mn10300/include/asm/errno.h b/arch/mn10300/include/asm/errno.h
new file mode 100644
index 000000000000..4c82b503d92f
--- /dev/null
+++ b/arch/mn10300/include/asm/errno.h
@@ -0,0 +1 @@
#include <asm-generic/errno.h>
diff --git a/arch/mn10300/include/asm/exceptions.h b/arch/mn10300/include/asm/exceptions.h
new file mode 100644
index 000000000000..fa16466ef3f9
--- /dev/null
+++ b/arch/mn10300/include/asm/exceptions.h
@@ -0,0 +1,121 @@
1/* MN10300 Microcontroller core exceptions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_EXCEPTIONS_H
12#define _ASM_EXCEPTIONS_H
13
14#include <linux/linkage.h>
15
16/*
17 * define the breakpoint instruction opcode to use
18 * - note that the JTAG unit steals 0xFF, so we want to avoid that if we can
19 * (can use 0xF7)
20 */
21#define GDBSTUB_BKPT 0xFF
22
23#ifndef __ASSEMBLY__
24
25/*
26 * enumeration of exception codes (as extracted from TBR MSW)
27 */
28enum exception_code {
29 EXCEP_RESET = 0x000000, /* reset */
30
31 /* MMU exceptions */
32 EXCEP_ITLBMISS = 0x000100, /* instruction TLB miss */
33 EXCEP_DTLBMISS = 0x000108, /* data TLB miss */
34 EXCEP_IAERROR = 0x000110, /* instruction address */
35 EXCEP_DAERROR = 0x000118, /* data address */
36
37 /* system exceptions */
38 EXCEP_TRAP = 0x000128, /* program interrupt (PI instruction) */
39 EXCEP_ISTEP = 0x000130, /* single step */
40 EXCEP_IBREAK = 0x000150, /* instruction breakpoint */
41 EXCEP_OBREAK = 0x000158, /* operand breakpoint */
42 EXCEP_PRIVINS = 0x000160, /* privileged instruction execution */
43 EXCEP_UNIMPINS = 0x000168, /* unimplemented instruction execution */
44 EXCEP_UNIMPEXINS = 0x000170, /* unimplemented extended instruction execution */
45 EXCEP_MEMERR = 0x000178, /* illegal memory access */
46 EXCEP_MISALIGN = 0x000180, /* misalignment */
47 EXCEP_BUSERROR = 0x000188, /* bus error */
48 EXCEP_ILLINSACC = 0x000190, /* illegal instruction access */
49 EXCEP_ILLDATACC = 0x000198, /* illegal data access */
50 EXCEP_IOINSACC = 0x0001a0, /* I/O space instruction access */
51 EXCEP_PRIVINSACC = 0x0001a8, /* privileged space instruction access */
52 EXCEP_PRIVDATACC = 0x0001b0, /* privileged space data access */
53 EXCEP_DATINSACC = 0x0001b8, /* data space instruction access */
54 EXCEP_DOUBLE_FAULT = 0x000200, /* double fault */
55
56 /* FPU exceptions */
57 EXCEP_FPU_DISABLED = 0x0001c0, /* FPU disabled */
58 EXCEP_FPU_UNIMPINS = 0x0001c8, /* FPU unimplemented operation */
59 EXCEP_FPU_OPERATION = 0x0001d0, /* FPU operation */
60
61 /* interrupts */
62 EXCEP_WDT = 0x000240, /* watchdog timer overflow */
63 EXCEP_NMI = 0x000248, /* non-maskable interrupt */
64 EXCEP_IRQ_LEVEL0 = 0x000280, /* level 0 maskable interrupt */
65 EXCEP_IRQ_LEVEL1 = 0x000288, /* level 1 maskable interrupt */
66 EXCEP_IRQ_LEVEL2 = 0x000290, /* level 2 maskable interrupt */
67 EXCEP_IRQ_LEVEL3 = 0x000298, /* level 3 maskable interrupt */
68 EXCEP_IRQ_LEVEL4 = 0x0002a0, /* level 4 maskable interrupt */
69 EXCEP_IRQ_LEVEL5 = 0x0002a8, /* level 5 maskable interrupt */
70 EXCEP_IRQ_LEVEL6 = 0x0002b0, /* level 6 maskable interrupt */
71
72 /* system calls */
73 EXCEP_SYSCALL0 = 0x000300, /* system call 0 */
74 EXCEP_SYSCALL1 = 0x000308, /* system call 1 */
75 EXCEP_SYSCALL2 = 0x000310, /* system call 2 */
76 EXCEP_SYSCALL3 = 0x000318, /* system call 3 */
77 EXCEP_SYSCALL4 = 0x000320, /* system call 4 */
78 EXCEP_SYSCALL5 = 0x000328, /* system call 5 */
79 EXCEP_SYSCALL6 = 0x000330, /* system call 6 */
80 EXCEP_SYSCALL7 = 0x000338, /* system call 7 */
81 EXCEP_SYSCALL8 = 0x000340, /* system call 8 */
82 EXCEP_SYSCALL9 = 0x000348, /* system call 9 */
83 EXCEP_SYSCALL10 = 0x000350, /* system call 10 */
84 EXCEP_SYSCALL11 = 0x000358, /* system call 11 */
85 EXCEP_SYSCALL12 = 0x000360, /* system call 12 */
86 EXCEP_SYSCALL13 = 0x000368, /* system call 13 */
87 EXCEP_SYSCALL14 = 0x000370, /* system call 14 */
88 EXCEP_SYSCALL15 = 0x000378, /* system call 15 */
89};
90
91extern void __set_intr_stub(enum exception_code code, void *handler);
92extern void set_intr_stub(enum exception_code code, void *handler);
93extern void set_jtag_stub(enum exception_code code, void *handler);
94
95struct pt_regs;
96
97extern asmlinkage void __common_exception(void);
98extern asmlinkage void itlb_miss(void);
99extern asmlinkage void dtlb_miss(void);
100extern asmlinkage void itlb_aerror(void);
101extern asmlinkage void dtlb_aerror(void);
102extern asmlinkage void raw_bus_error(void);
103extern asmlinkage void double_fault(void);
104extern asmlinkage int system_call(struct pt_regs *);
105extern asmlinkage void fpu_exception(struct pt_regs *, enum exception_code);
106extern asmlinkage void nmi(struct pt_regs *, enum exception_code);
107extern asmlinkage void uninitialised_exception(struct pt_regs *,
108 enum exception_code);
109extern asmlinkage void irq_handler(void);
110extern asmlinkage void profile_handler(void);
111extern asmlinkage void nmi_handler(void);
112extern asmlinkage void misalignment(struct pt_regs *, enum exception_code);
113
114extern void die(const char *, struct pt_regs *, enum exception_code)
115 ATTRIB_NORET;
116
117extern int die_if_no_fixup(const char *, struct pt_regs *, enum exception_code);
118
119#endif /* __ASSEMBLY__ */
120
121#endif /* _ASM_EXCEPTIONS_H */
diff --git a/arch/mn10300/include/asm/fb.h b/arch/mn10300/include/asm/fb.h
new file mode 100644
index 000000000000..697b24a91e1a
--- /dev/null
+++ b/arch/mn10300/include/asm/fb.h
@@ -0,0 +1,23 @@
1/* MN10300 Frame buffer stuff
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_FB_H
12#define _ASM_FB_H
13
14#include <linux/fb.h>
15
16#define fb_pgprotect(...) do {} while (0)
17
18static inline int fb_is_primary_device(struct fb_info *info)
19{
20 return 0;
21}
22
23#endif /* _ASM_FB_H */
diff --git a/arch/mn10300/include/asm/fcntl.h b/arch/mn10300/include/asm/fcntl.h
new file mode 100644
index 000000000000..46ab12db5739
--- /dev/null
+++ b/arch/mn10300/include/asm/fcntl.h
@@ -0,0 +1 @@
#include <asm-generic/fcntl.h>
diff --git a/arch/mn10300/include/asm/fpu.h b/arch/mn10300/include/asm/fpu.h
new file mode 100644
index 000000000000..64a2b83a7a6a
--- /dev/null
+++ b/arch/mn10300/include/asm/fpu.h
@@ -0,0 +1,85 @@
1/* MN10300 FPU definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * Derived from include/asm-i386/i387.h: Copyright (C) 1994 Linus Torvalds
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_FPU_H
13#define _ASM_FPU_H
14
15#include <asm/processor.h>
16#include <asm/sigcontext.h>
17#include <asm/user.h>
18
19#ifdef __KERNEL__
20
21/* the task that owns the FPU state */
22extern struct task_struct *fpu_state_owner;
23
24#define set_using_fpu(tsk) \
25do { \
26 (tsk)->thread.fpu_flags |= THREAD_USING_FPU; \
27} while (0)
28
29#define clear_using_fpu(tsk) \
30do { \
31 (tsk)->thread.fpu_flags &= ~THREAD_USING_FPU; \
32} while (0)
33
34#define is_using_fpu(tsk) ((tsk)->thread.fpu_flags & THREAD_USING_FPU)
35
36#define unlazy_fpu(tsk) \
37do { \
38 preempt_disable(); \
39 if (fpu_state_owner == (tsk)) \
40 fpu_save(&tsk->thread.fpu_state); \
41 preempt_enable(); \
42} while (0)
43
44#define exit_fpu() \
45do { \
46 struct task_struct *__tsk = current; \
47 preempt_disable(); \
48 if (fpu_state_owner == __tsk) \
49 fpu_state_owner = NULL; \
50 preempt_enable(); \
51} while (0)
52
53#define flush_fpu() \
54do { \
55 struct task_struct *__tsk = current; \
56 preempt_disable(); \
57 if (fpu_state_owner == __tsk) { \
58 fpu_state_owner = NULL; \
59 __tsk->thread.uregs->epsw &= ~EPSW_FE; \
60 } \
61 preempt_enable(); \
62 clear_using_fpu(__tsk); \
63} while (0)
64
65extern asmlinkage void fpu_init_state(void);
66extern asmlinkage void fpu_kill_state(struct task_struct *);
67extern asmlinkage void fpu_disabled(struct pt_regs *, enum exception_code);
68extern asmlinkage void fpu_exception(struct pt_regs *, enum exception_code);
69
70#ifdef CONFIG_FPU
71extern asmlinkage void fpu_save(struct fpu_state_struct *);
72extern asmlinkage void fpu_restore(struct fpu_state_struct *);
73#else
74#define fpu_save(a)
75#define fpu_restore(a)
76#endif /* CONFIG_FPU */
77
78/*
79 * signal frame handlers
80 */
81extern int fpu_setup_sigcontext(struct fpucontext *buf);
82extern int fpu_restore_sigcontext(struct fpucontext *buf);
83
84#endif /* __KERNEL__ */
85#endif /* _ASM_FPU_H */
diff --git a/arch/mn10300/include/asm/frame.inc b/arch/mn10300/include/asm/frame.inc
new file mode 100644
index 000000000000..5b1949bdf039
--- /dev/null
+++ b/arch/mn10300/include/asm/frame.inc
@@ -0,0 +1,91 @@
1/* MN10300 Microcontroller core system register definitions -*- asm -*-
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_FRAME_INC
12#define _ASM_FRAME_INC
13
14#ifndef __ASSEMBLY__
15#error not for use in C files
16#endif
17
18#ifndef __ASM_OFFSETS_H__
19#include <asm/asm-offsets.h>
20#endif
21
22#define pi break
23
24#define fp a3
25
26###############################################################################
27#
28# build a stack frame from the registers
29# - the caller has subtracted 4 from SP before coming here
30#
31###############################################################################
32.macro SAVE_ALL
33 add -4,sp # next exception frame ptr save area
34 movm [other],(sp)
35 mov usp,a1
36 mov a1,(sp) # USP in MOVM[other] dummy slot
37 movm [d2,d3,a2,a3,exreg0,exreg1,exother],(sp)
38 mov sp,fp # FRAME pointer in A3
39 add -12,sp # allow for calls to be made
40 mov (__frame),a1
41 mov a1,(REG_NEXT,fp)
42 mov fp,(__frame)
43
44 and ~EPSW_FE,epsw # disable the FPU inside the kernel
45
46 # we may be holding current in E2
47#ifdef CONFIG_MN10300_CURRENT_IN_E2
48 mov (__current),e2
49#endif
50.endm
51
52###############################################################################
53#
54# restore the registers from a stack frame
55#
56###############################################################################
57.macro RESTORE_ALL
58 # peel back the stack to the calling frame
59 # - this permits execve() to discard extra frames due to kernel syscalls
60 mov (__frame),fp
61 mov fp,sp
62 mov (REG_NEXT,fp),d0 # userspace has regs->next == 0
63 mov d0,(__frame)
64
65#ifndef CONFIG_MN10300_USING_JTAG
66 mov (REG_EPSW,fp),d0
67 btst EPSW_T,d0
68 beq 99f
69
70 or EPSW_NMID,epsw
71 movhu (DCR),d1
72 or 0x0001, d1
73 movhu d1,(DCR)
74
7599:
76#endif
77 movm (sp),[d2,d3,a2,a3,exreg0,exreg1,exother]
78
79 # must restore usp even if returning to kernel space,
80 # when CONFIG_PREEMPT is enabled.
81 mov (sp),a1 # USP in MOVM[other] dummy slot
82 mov a1,usp
83
84 movm (sp),[other]
85 add 8,sp
86 rti
87
88.endm
89
90
91#endif /* _ASM_FRAME_INC */
diff --git a/arch/mn10300/include/asm/ftrace.h b/arch/mn10300/include/asm/ftrace.h
new file mode 100644
index 000000000000..40a8c178f10d
--- /dev/null
+++ b/arch/mn10300/include/asm/ftrace.h
@@ -0,0 +1 @@
/* empty */
diff --git a/arch/mn10300/include/asm/futex.h b/arch/mn10300/include/asm/futex.h
new file mode 100644
index 000000000000..0b745828f42b
--- /dev/null
+++ b/arch/mn10300/include/asm/futex.h
@@ -0,0 +1 @@
#include <asm-generic/futex.h>
diff --git a/arch/mn10300/include/asm/gdb-stub.h b/arch/mn10300/include/asm/gdb-stub.h
new file mode 100644
index 000000000000..e5a6368559af
--- /dev/null
+++ b/arch/mn10300/include/asm/gdb-stub.h
@@ -0,0 +1,183 @@
1/* MN10300 Kernel GDB stub definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from asm-mips/gdb-stub.h (c) 1995 Andreas Busse
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_GDB_STUB_H
13#define _ASM_GDB_STUB_H
14
15#include <asm/exceptions.h>
16
17/*
18 * register ID numbers in GDB remote protocol
19 */
20
21#define GDB_REGID_PC 9
22#define GDB_REGID_FP 7
23#define GDB_REGID_SP 8
24
25/*
26 * virtual stack layout for the GDB exception handler
27 */
28#define NUMREGS 64
29
30#define GDB_FR_D0 (0 * 4)
31#define GDB_FR_D1 (1 * 4)
32#define GDB_FR_D2 (2 * 4)
33#define GDB_FR_D3 (3 * 4)
34#define GDB_FR_A0 (4 * 4)
35#define GDB_FR_A1 (5 * 4)
36#define GDB_FR_A2 (6 * 4)
37#define GDB_FR_A3 (7 * 4)
38
39#define GDB_FR_SP (8 * 4)
40#define GDB_FR_PC (9 * 4)
41#define GDB_FR_MDR (10 * 4)
42#define GDB_FR_EPSW (11 * 4)
43#define GDB_FR_LIR (12 * 4)
44#define GDB_FR_LAR (13 * 4)
45#define GDB_FR_MDRQ (14 * 4)
46
47#define GDB_FR_E0 (15 * 4)
48#define GDB_FR_E1 (16 * 4)
49#define GDB_FR_E2 (17 * 4)
50#define GDB_FR_E3 (18 * 4)
51#define GDB_FR_E4 (19 * 4)
52#define GDB_FR_E5 (20 * 4)
53#define GDB_FR_E6 (21 * 4)
54#define GDB_FR_E7 (22 * 4)
55
56#define GDB_FR_SSP (23 * 4)
57#define GDB_FR_MSP (24 * 4)
58#define GDB_FR_USP (25 * 4)
59#define GDB_FR_MCRH (26 * 4)
60#define GDB_FR_MCRL (27 * 4)
61#define GDB_FR_MCVF (28 * 4)
62
63#define GDB_FR_FPCR (29 * 4)
64#define GDB_FR_DUMMY0 (30 * 4)
65#define GDB_FR_DUMMY1 (31 * 4)
66
67#define GDB_FR_FS0 (32 * 4)
68
69#define GDB_FR_SIZE (NUMREGS * 4)
70
71#ifndef __ASSEMBLY__
72
73/*
74 * This is the same as above, but for the high-level
75 * part of the GDB stub.
76 */
77
78struct gdb_regs {
79 /* saved main processor registers */
80 u32 d0, d1, d2, d3, a0, a1, a2, a3;
81 u32 sp, pc, mdr, epsw, lir, lar, mdrq;
82 u32 e0, e1, e2, e3, e4, e5, e6, e7;
83 u32 ssp, msp, usp, mcrh, mcrl, mcvf;
84
85 /* saved floating point registers */
86 u32 fpcr, _dummy0, _dummy1;
87 u32 fs0, fs1, fs2, fs3, fs4, fs5, fs6, fs7;
88 u32 fs8, fs9, fs10, fs11, fs12, fs13, fs14, fs15;
89 u32 fs16, fs17, fs18, fs19, fs20, fs21, fs22, fs23;
90 u32 fs24, fs25, fs26, fs27, fs28, fs29, fs30, fs31;
91};
92
93/*
94 * Prototypes
95 */
96extern void show_registers_only(struct pt_regs *regs);
97
98extern asmlinkage void gdbstub_init(void);
99extern asmlinkage void gdbstub_exit(int status);
100extern asmlinkage void gdbstub_io_init(void);
101extern asmlinkage void gdbstub_io_set_baud(unsigned baud);
102extern asmlinkage int gdbstub_io_rx_char(unsigned char *_ch, int nonblock);
103extern asmlinkage void gdbstub_io_tx_char(unsigned char ch);
104extern asmlinkage void gdbstub_io_tx_flush(void);
105
106extern asmlinkage void gdbstub_io_rx_handler(void);
107extern asmlinkage void gdbstub_rx_irq(struct pt_regs *, enum exception_code);
108extern asmlinkage int gdbstub_intercept(struct pt_regs *, enum exception_code);
109extern asmlinkage void gdbstub_exception(struct pt_regs *, enum exception_code);
110extern asmlinkage void __gdbstub_bug_trap(void);
111extern asmlinkage void __gdbstub_pause(void);
112extern asmlinkage void start_kernel(void);
113
114#ifndef CONFIG_MN10300_CACHE_DISABLED
115extern asmlinkage void gdbstub_purge_cache(void);
116#else
117#define gdbstub_purge_cache() do {} while (0)
118#endif
119
120/* Used to prevent crashes in memory access */
121extern asmlinkage int gdbstub_read_byte(const u8 *, u8 *);
122extern asmlinkage int gdbstub_read_word(const u8 *, u8 *);
123extern asmlinkage int gdbstub_read_dword(const u8 *, u8 *);
124extern asmlinkage int gdbstub_write_byte(u32, u8 *);
125extern asmlinkage int gdbstub_write_word(u32, u8 *);
126extern asmlinkage int gdbstub_write_dword(u32, u8 *);
127
128extern asmlinkage void gdbstub_read_byte_guard(void);
129extern asmlinkage void gdbstub_read_byte_cont(void);
130extern asmlinkage void gdbstub_read_word_guard(void);
131extern asmlinkage void gdbstub_read_word_cont(void);
132extern asmlinkage void gdbstub_read_dword_guard(void);
133extern asmlinkage void gdbstub_read_dword_cont(void);
134extern asmlinkage void gdbstub_write_byte_guard(void);
135extern asmlinkage void gdbstub_write_byte_cont(void);
136extern asmlinkage void gdbstub_write_word_guard(void);
137extern asmlinkage void gdbstub_write_word_cont(void);
138extern asmlinkage void gdbstub_write_dword_guard(void);
139extern asmlinkage void gdbstub_write_dword_cont(void);
140
141extern u8 gdbstub_rx_buffer[PAGE_SIZE];
142extern u32 gdbstub_rx_inp;
143extern u32 gdbstub_rx_outp;
144extern u8 gdbstub_rx_overflow;
145extern u8 gdbstub_busy;
146extern u8 gdbstub_rx_unget;
147
148#ifdef CONFIG_GDBSTUB_DEBUGGING
149extern void gdbstub_printk(const char *fmt, ...)
150 __attribute__((format(printf, 1, 2)));
151#else
152static inline __attribute__((format(printf, 1, 2)))
153void gdbstub_printk(const char *fmt, ...)
154{
155}
156#endif
157
158#ifdef CONFIG_GDBSTUB_DEBUG_ENTRY
159#define gdbstub_entry(FMT, ...) gdbstub_printk(FMT, ##__VA_ARGS__)
160#else
161#define gdbstub_entry(FMT, ...) ({ 0; })
162#endif
163
164#ifdef CONFIG_GDBSTUB_DEBUG_PROTOCOL
165#define gdbstub_proto(FMT, ...) gdbstub_printk(FMT, ##__VA_ARGS__)
166#else
167#define gdbstub_proto(FMT, ...) ({ 0; })
168#endif
169
170#ifdef CONFIG_GDBSTUB_DEBUG_IO
171#define gdbstub_io(FMT, ...) gdbstub_printk(FMT, ##__VA_ARGS__)
172#else
173#define gdbstub_io(FMT, ...) ({ 0; })
174#endif
175
176#ifdef CONFIG_GDBSTUB_DEBUG_BREAKPOINT
177#define gdbstub_bkpt(FMT, ...) gdbstub_printk(FMT, ##__VA_ARGS__)
178#else
179#define gdbstub_bkpt(FMT, ...) ({ 0; })
180#endif
181
182#endif /* !__ASSEMBLY__ */
183#endif /* _ASM_GDB_STUB_H */
diff --git a/arch/mn10300/include/asm/hardirq.h b/arch/mn10300/include/asm/hardirq.h
new file mode 100644
index 000000000000..54d950117674
--- /dev/null
+++ b/arch/mn10300/include/asm/hardirq.h
@@ -0,0 +1,48 @@
1/* MN10300 Hardware IRQ statistics and management
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Modified by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_HARDIRQ_H
13#define _ASM_HARDIRQ_H
14
15#include <linux/threads.h>
16#include <linux/irq.h>
17#include <asm/exceptions.h>
18
19/* assembly code in softirq.h is sensitive to the offsets of these fields */
20typedef struct {
21 unsigned int __softirq_pending;
22 unsigned long idle_timestamp;
23 unsigned int __nmi_count; /* arch dependent */
24 unsigned int __irq_count; /* arch dependent */
25} ____cacheline_aligned irq_cpustat_t;
26
27#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
28
29extern void ack_bad_irq(int irq);
30
31/*
32 * manipulate stubs in the MN10300 CPU Trap/Interrupt Vector table
33 * - these should jump to __common_exception in entry.S unless there's a good
34 * reason to do otherwise (see trap_preinit() in traps.c)
35 */
36typedef void (*intr_stub_fnx)(struct pt_regs *regs,
37 enum exception_code intcode);
38
39/*
40 * manipulate pointers in the Exception table (see entry.S)
41 * - these are indexed by decoding the lower 24 bits of the TBR register
42 * - note that the MN103E010 doesn't always trap through the correct vector,
43 * but does always set the TBR correctly
44 */
45extern asmlinkage void set_excp_vector(enum exception_code code,
46 intr_stub_fnx handler);
47
48#endif /* _ASM_HARDIRQ_H */
diff --git a/arch/mn10300/include/asm/highmem.h b/arch/mn10300/include/asm/highmem.h
new file mode 100644
index 000000000000..90f2abb04bfd
--- /dev/null
+++ b/arch/mn10300/include/asm/highmem.h
@@ -0,0 +1,116 @@
1/* MN10300 Virtual kernel memory mappings for high memory
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from include/asm-i386/highmem.h
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_HIGHMEM_H
13#define _ASM_HIGHMEM_H
14
15#ifdef __KERNEL__
16
17#include <linux/init.h>
18#include <linux/interrupt.h>
19#include <linux/highmem.h>
20#include <asm/kmap_types.h>
21#include <asm/pgtable.h>
22
23/* undef for production */
24#undef HIGHMEM_DEBUG
25
26/* declarations for highmem.c */
27extern unsigned long highstart_pfn, highend_pfn;
28
29extern pte_t *kmap_pte;
30extern pgprot_t kmap_prot;
31extern pte_t *pkmap_page_table;
32
33extern void __init kmap_init(void);
34
35/*
36 * Right now we initialize only a single pte table. It can be extended
37 * easily, subsequent pte tables have to be allocated in one physical
38 * chunk of RAM.
39 */
40#define PKMAP_BASE 0xfe000000UL
41#define LAST_PKMAP 1024
42#define LAST_PKMAP_MASK (LAST_PKMAP - 1)
43#define PKMAP_NR(virt) ((virt - PKMAP_BASE) >> PAGE_SHIFT)
44#define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT))
45
46extern unsigned long kmap_high(struct page *page);
47extern void kunmap_high(struct page *page);
48
49static inline unsigned long kmap(struct page *page)
50{
51 if (in_interrupt())
52 BUG();
53 if (page < highmem_start_page)
54 return page_address(page);
55 return kmap_high(page);
56}
57
58static inline void kunmap(struct page *page)
59{
60 if (in_interrupt())
61 BUG();
62 if (page < highmem_start_page)
63 return;
64 kunmap_high(page);
65}
66
67/*
68 * The use of kmap_atomic/kunmap_atomic is discouraged - kmap/kunmap
69 * gives a more generic (and caching) interface. But kmap_atomic can
70 * be used in IRQ contexts, so in some (very limited) cases we need
71 * it.
72 */
73static inline unsigned long kmap_atomic(struct page *page, enum km_type type)
74{
75 enum fixed_addresses idx;
76 unsigned long vaddr;
77
78 if (page < highmem_start_page)
79 return page_address(page);
80
81 debug_kmap_atomic(type);
82 idx = type + KM_TYPE_NR * smp_processor_id();
83 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
84#if HIGHMEM_DEBUG
85 if (!pte_none(*(kmap_pte - idx)))
86 BUG();
87#endif
88 set_pte(kmap_pte - idx, mk_pte(page, kmap_prot));
89 __flush_tlb_one(vaddr);
90
91 return vaddr;
92}
93
94static inline void kunmap_atomic(unsigned long vaddr, enum km_type type)
95{
96#if HIGHMEM_DEBUG
97 enum fixed_addresses idx = type + KM_TYPE_NR * smp_processor_id();
98
99 if (vaddr < FIXADDR_START) /* FIXME */
100 return;
101
102 if (vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx))
103 BUG();
104
105 /*
106 * force other mappings to Oops if they'll try to access
107 * this pte without first remap it
108 */
109 pte_clear(kmap_pte - idx);
110 __flush_tlb_one(vaddr);
111#endif
112}
113
114#endif /* __KERNEL__ */
115
116#endif /* _ASM_HIGHMEM_H */
diff --git a/arch/mn10300/include/asm/hw_irq.h b/arch/mn10300/include/asm/hw_irq.h
new file mode 100644
index 000000000000..70619901098e
--- /dev/null
+++ b/arch/mn10300/include/asm/hw_irq.h
@@ -0,0 +1,14 @@
1/* MN10300 Hardware interrupt definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_HW_IRQ_H
12#define _ASM_HW_IRQ_H
13
14#endif /* _ASM_HW_IRQ_H */
diff --git a/arch/mn10300/include/asm/intctl-regs.h b/arch/mn10300/include/asm/intctl-regs.h
new file mode 100644
index 000000000000..ba544c796c5a
--- /dev/null
+++ b/arch/mn10300/include/asm/intctl-regs.h
@@ -0,0 +1,73 @@
1/* MN10300 On-board interrupt controller registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_INTCTL_REGS_H
12#define _ASM_INTCTL_REGS_H
13
14#include <asm/cpu-regs.h>
15
16#ifdef __KERNEL__
17
18/* interrupt controller registers */
19#define GxICR(X) __SYSREG(0xd4000000 + (X) * 4, u16) /* group irq ctrl regs */
20
21#define IAGR __SYSREG(0xd4000100, u16) /* intr acceptance group reg */
22#define IAGR_GN 0x00fc /* group number register
23 * (documentation _has_ to be wrong)
24 */
25
26#define EXTMD __SYSREG(0xd4000200, u16) /* external pin intr spec reg */
27#define GET_XIRQ_TRIGGER(X) ((EXTMD >> ((X) * 2)) & 3)
28
29#define SET_XIRQ_TRIGGER(X,Y) \
30do { \
31 u16 x = EXTMD; \
32 x &= ~(3 << ((X) * 2)); \
33 x |= ((Y) & 3) << ((X) * 2); \
34 EXTMD = x; \
35} while (0)
36
37#define XIRQ_TRIGGER_LOWLEVEL 0
38#define XIRQ_TRIGGER_HILEVEL 1
39#define XIRQ_TRIGGER_NEGEDGE 2
40#define XIRQ_TRIGGER_POSEDGE 3
41
42/* non-maskable interrupt control */
43#define NMIIRQ 0
44#define NMICR GxICR(NMIIRQ) /* NMI control register */
45#define NMICR_NMIF 0x0001 /* NMI pin interrupt flag */
46#define NMICR_WDIF 0x0002 /* watchdog timer overflow flag */
47#define NMICR_ABUSERR 0x0008 /* async bus error flag */
48
49/* maskable interrupt control */
50#define GxICR_DETECT 0x0001 /* interrupt detect flag */
51#define GxICR_REQUEST 0x0010 /* interrupt request flag */
52#define GxICR_ENABLE 0x0100 /* interrupt enable flag */
53#define GxICR_LEVEL 0x7000 /* interrupt priority level */
54#define GxICR_LEVEL_0 0x0000 /* - level 0 */
55#define GxICR_LEVEL_1 0x1000 /* - level 1 */
56#define GxICR_LEVEL_2 0x2000 /* - level 2 */
57#define GxICR_LEVEL_3 0x3000 /* - level 3 */
58#define GxICR_LEVEL_4 0x4000 /* - level 4 */
59#define GxICR_LEVEL_5 0x5000 /* - level 5 */
60#define GxICR_LEVEL_6 0x6000 /* - level 6 */
61#define GxICR_LEVEL_SHIFT 12
62
63#ifndef __ASSEMBLY__
64extern void set_intr_level(int irq, u16 level);
65extern void set_intr_postackable(int irq);
66#endif
67
68/* external interrupts */
69#define XIRQxICR(X) GxICR((X)) /* external interrupt control regs */
70
71#endif /* __KERNEL__ */
72
73#endif /* _ASM_INTCTL_REGS_H */
diff --git a/arch/mn10300/include/asm/io.h b/arch/mn10300/include/asm/io.h
new file mode 100644
index 000000000000..c1a4119e6497
--- /dev/null
+++ b/arch/mn10300/include/asm/io.h
@@ -0,0 +1,301 @@
1/* MN10300 I/O port emulation and memory-mapped I/O
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_IO_H
12#define _ASM_IO_H
13
14#include <asm/page.h> /* I/O is all done through memory accesses */
15#include <asm/cpu-regs.h>
16#include <asm/cacheflush.h>
17
18#define mmiowb() do {} while (0)
19
20/*****************************************************************************/
21/*
22 * readX/writeX() are used to access memory mapped devices. On some
23 * architectures the memory mapped IO stuff needs to be accessed
24 * differently. On the x86 architecture, we just read/write the
25 * memory location directly.
26 */
27static inline u8 readb(const volatile void __iomem *addr)
28{
29 return *(const volatile u8 *) addr;
30}
31
32static inline u16 readw(const volatile void __iomem *addr)
33{
34 return *(const volatile u16 *) addr;
35}
36
37static inline u32 readl(const volatile void __iomem *addr)
38{
39 return *(const volatile u32 *) addr;
40}
41
42#define __raw_readb readb
43#define __raw_readw readw
44#define __raw_readl readl
45
46#define readb_relaxed readb
47#define readw_relaxed readw
48#define readl_relaxed readl
49
50static inline void writeb(u8 b, volatile void __iomem *addr)
51{
52 *(volatile u8 *) addr = b;
53}
54
55static inline void writew(u16 b, volatile void __iomem *addr)
56{
57 *(volatile u16 *) addr = b;
58}
59
60static inline void writel(u32 b, volatile void __iomem *addr)
61{
62 *(volatile u32 *) addr = b;
63}
64
65#define __raw_writeb writeb
66#define __raw_writew writew
67#define __raw_writel writel
68
69/*****************************************************************************/
70/*
71 * traditional input/output functions
72 */
73static inline u8 inb_local(unsigned long addr)
74{
75 return readb((volatile void __iomem *) addr);
76}
77
78static inline void outb_local(u8 b, unsigned long addr)
79{
80 return writeb(b, (volatile void __iomem *) addr);
81}
82
83static inline u8 inb(unsigned long addr)
84{
85 return readb((volatile void __iomem *) addr);
86}
87
88static inline u16 inw(unsigned long addr)
89{
90 return readw((volatile void __iomem *) addr);
91}
92
93static inline u32 inl(unsigned long addr)
94{
95 return readl((volatile void __iomem *) addr);
96}
97
98static inline void outb(u8 b, unsigned long addr)
99{
100 return writeb(b, (volatile void __iomem *) addr);
101}
102
103static inline void outw(u16 b, unsigned long addr)
104{
105 return writew(b, (volatile void __iomem *) addr);
106}
107
108static inline void outl(u32 b, unsigned long addr)
109{
110 return writel(b, (volatile void __iomem *) addr);
111}
112
113#define inb_p(addr) inb(addr)
114#define inw_p(addr) inw(addr)
115#define inl_p(addr) inl(addr)
116#define outb_p(x, addr) outb((x), (addr))
117#define outw_p(x, addr) outw((x), (addr))
118#define outl_p(x, addr) outl((x), (addr))
119
120static inline void insb(unsigned long addr, void *buffer, int count)
121{
122 if (count) {
123 u8 *buf = buffer;
124 do {
125 u8 x = inb(addr);
126 *buf++ = x;
127 } while (--count);
128 }
129}
130
131static inline void insw(unsigned long addr, void *buffer, int count)
132{
133 if (count) {
134 u16 *buf = buffer;
135 do {
136 u16 x = inw(addr);
137 *buf++ = x;
138 } while (--count);
139 }
140}
141
142static inline void insl(unsigned long addr, void *buffer, int count)
143{
144 if (count) {
145 u32 *buf = buffer;
146 do {
147 u32 x = inl(addr);
148 *buf++ = x;
149 } while (--count);
150 }
151}
152
153static inline void outsb(unsigned long addr, const void *buffer, int count)
154{
155 if (count) {
156 const u8 *buf = buffer;
157 do {
158 outb(*buf++, addr);
159 } while (--count);
160 }
161}
162
163static inline void outsw(unsigned long addr, const void *buffer, int count)
164{
165 if (count) {
166 const u16 *buf = buffer;
167 do {
168 outw(*buf++, addr);
169 } while (--count);
170 }
171}
172
173extern void __outsl(unsigned long addr, const void *buffer, int count);
174static inline void outsl(unsigned long addr, const void *buffer, int count)
175{
176 if ((unsigned long) buffer & 0x3)
177 return __outsl(addr, buffer, count);
178
179 if (count) {
180 const u32 *buf = buffer;
181 do {
182 outl(*buf++, addr);
183 } while (--count);
184 }
185}
186
187#define ioread8(addr) readb(addr)
188#define ioread16(addr) readw(addr)
189#define ioread32(addr) readl(addr)
190
191#define iowrite8(v, addr) writeb((v), (addr))
192#define iowrite16(v, addr) writew((v), (addr))
193#define iowrite32(v, addr) writel((v), (addr))
194
195#define ioread8_rep(p, dst, count) \
196 insb((unsigned long) (p), (dst), (count))
197#define ioread16_rep(p, dst, count) \
198 insw((unsigned long) (p), (dst), (count))
199#define ioread32_rep(p, dst, count) \
200 insl((unsigned long) (p), (dst), (count))
201
202#define iowrite8_rep(p, src, count) \
203 outsb((unsigned long) (p), (src), (count))
204#define iowrite16_rep(p, src, count) \
205 outsw((unsigned long) (p), (src), (count))
206#define iowrite32_rep(p, src, count) \
207 outsl((unsigned long) (p), (src), (count))
208
209
210#define IO_SPACE_LIMIT 0xffffffff
211
212#ifdef __KERNEL__
213
214#include <linux/vmalloc.h>
215#define __io_virt(x) ((void *) (x))
216
217/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
218struct pci_dev;
219extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
220static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p)
221{
222}
223
224/*
225 * Change virtual addresses to physical addresses and vv.
226 * These are pretty trivial
227 */
228static inline unsigned long virt_to_phys(volatile void *address)
229{
230 return __pa(address);
231}
232
233static inline void *phys_to_virt(unsigned long address)
234{
235 return __va(address);
236}
237
238/*
239 * Change "struct page" to physical address.
240 */
241static inline void *__ioremap(unsigned long offset, unsigned long size,
242 unsigned long flags)
243{
244 return (void *) offset;
245}
246
247static inline void *ioremap(unsigned long offset, unsigned long size)
248{
249 return (void *) offset;
250}
251
252/*
253 * This one maps high address device memory and turns off caching for that
254 * area. it's useful if some control registers are in such an area and write
255 * combining or read caching is not desirable:
256 */
257static inline void *ioremap_nocache(unsigned long offset, unsigned long size)
258{
259 return (void *) (offset | 0x20000000);
260}
261
262#define ioremap_wc ioremap_nocache
263
264static inline void iounmap(void *addr)
265{
266}
267
268static inline void __iomem *ioport_map(unsigned long port, unsigned int nr)
269{
270 return (void __iomem *) port;
271}
272
273static inline void ioport_unmap(void __iomem *p)
274{
275}
276
277#define xlate_dev_kmem_ptr(p) ((void *) (p))
278#define xlate_dev_mem_ptr(p) ((void *) (p))
279
280/*
281 * PCI bus iomem addresses must be in the region 0x80000000-0x9fffffff
282 */
283static inline unsigned long virt_to_bus(volatile void *address)
284{
285 return ((unsigned long) address) & ~0x20000000;
286}
287
288static inline void *bus_to_virt(unsigned long address)
289{
290 return (void *) address;
291}
292
293#define page_to_bus page_to_phys
294
295#define memset_io(a, b, c) memset(__io_virt(a), (b), (c))
296#define memcpy_fromio(a, b, c) memcpy((a), __io_virt(b), (c))
297#define memcpy_toio(a, b, c) memcpy(__io_virt(a), (b), (c))
298
299#endif /* __KERNEL__ */
300
301#endif /* _ASM_IO_H */
diff --git a/arch/mn10300/include/asm/ioctl.h b/arch/mn10300/include/asm/ioctl.h
new file mode 100644
index 000000000000..b279fe06dfe5
--- /dev/null
+++ b/arch/mn10300/include/asm/ioctl.h
@@ -0,0 +1 @@
#include <asm-generic/ioctl.h>
diff --git a/arch/mn10300/include/asm/ioctls.h b/arch/mn10300/include/asm/ioctls.h
new file mode 100644
index 000000000000..dcbfb452974f
--- /dev/null
+++ b/arch/mn10300/include/asm/ioctls.h
@@ -0,0 +1,88 @@
1#ifndef _ASM_IOCTLS_H
2#define _ASM_IOCTLS_H
3
4#include <asm/ioctl.h>
5
6/* 0x54 is just a magic number to make these relatively unique ('T') */
7
8#define TCGETS 0x5401
9#define TCSETS 0x5402
10#define TCSETSW 0x5403
11#define TCSETSF 0x5404
12#define TCGETA 0x5405
13#define TCSETA 0x5406
14#define TCSETAW 0x5407
15#define TCSETAF 0x5408
16#define TCSBRK 0x5409
17#define TCXONC 0x540A
18#define TCFLSH 0x540B
19#define TIOCEXCL 0x540C
20#define TIOCNXCL 0x540D
21#define TIOCSCTTY 0x540E
22#define TIOCGPGRP 0x540F
23#define TIOCSPGRP 0x5410
24#define TIOCOUTQ 0x5411
25#define TIOCSTI 0x5412
26#define TIOCGWINSZ 0x5413
27#define TIOCSWINSZ 0x5414
28#define TIOCMGET 0x5415
29#define TIOCMBIS 0x5416
30#define TIOCMBIC 0x5417
31#define TIOCMSET 0x5418
32#define TIOCGSOFTCAR 0x5419
33#define TIOCSSOFTCAR 0x541A
34#define FIONREAD 0x541B
35#define TIOCINQ FIONREAD
36#define TIOCLINUX 0x541C
37#define TIOCCONS 0x541D
38#define TIOCGSERIAL 0x541E
39#define TIOCSSERIAL 0x541F
40#define TIOCPKT 0x5420
41#define FIONBIO 0x5421
42#define TIOCNOTTY 0x5422
43#define TIOCSETD 0x5423
44#define TIOCGETD 0x5424
45#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */
46/* #define TIOCTTYGSTRUCT 0x5426 - Former debugging-only ioctl */
47#define TIOCSBRK 0x5427 /* BSD compatibility */
48#define TIOCCBRK 0x5428 /* BSD compatibility */
49#define TIOCGSID 0x5429 /* Return the session ID of FD */
50#define TCGETS2 _IOR('T', 0x2A, struct termios2)
51#define TCSETS2 _IOW('T', 0x2B, struct termios2)
52#define TCSETSW2 _IOW('T', 0x2C, struct termios2)
53#define TCSETSF2 _IOW('T', 0x2D, struct termios2)
54#define TIOCGPTN _IOR('T', 0x30, unsigned int) /* Get Pty Number
55 * (of pty-mux device) */
56#define TIOCSPTLCK _IOW('T', 0x31, int) /* Lock/unlock Pty */
57
58#define FIONCLEX 0x5450
59#define FIOCLEX 0x5451
60#define FIOASYNC 0x5452
61#define TIOCSERCONFIG 0x5453
62#define TIOCSERGWILD 0x5454
63#define TIOCSERSWILD 0x5455
64#define TIOCGLCKTRMIOS 0x5456
65#define TIOCSLCKTRMIOS 0x5457
66#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
67#define TIOCSERGETLSR 0x5459 /* Get line status register */
68#define TIOCSERGETMULTI 0x545A /* Get multiport config */
69#define TIOCSERSETMULTI 0x545B /* Set multiport config */
70
71#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */
72#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
73#define TIOCGHAYESESP 0x545E /* Get Hayes ESP configuration */
74#define TIOCSHAYESESP 0x545F /* Set Hayes ESP configuration */
75#define FIOQSIZE 0x5460
76
77/* Used for packet mode */
78#define TIOCPKT_DATA 0
79#define TIOCPKT_FLUSHREAD 1
80#define TIOCPKT_FLUSHWRITE 2
81#define TIOCPKT_STOP 4
82#define TIOCPKT_START 8
83#define TIOCPKT_NOSTOP 16
84#define TIOCPKT_DOSTOP 32
85
86#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
87
88#endif /* _ASM_IOCTLS_H */
diff --git a/arch/mn10300/include/asm/ipc.h b/arch/mn10300/include/asm/ipc.h
new file mode 100644
index 000000000000..a46e3d9c2a3f
--- /dev/null
+++ b/arch/mn10300/include/asm/ipc.h
@@ -0,0 +1 @@
#include <asm-generic/ipc.h>
diff --git a/arch/mn10300/include/asm/ipcbuf.h b/arch/mn10300/include/asm/ipcbuf.h
new file mode 100644
index 000000000000..f6f63d448272
--- /dev/null
+++ b/arch/mn10300/include/asm/ipcbuf.h
@@ -0,0 +1,29 @@
1#ifndef _ASM_IPCBUF_H
2#define _ASM_IPCBUF_H
3
4/*
5 * The ipc64_perm structure for MN10300 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 32-bit mode_t and seq
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct ipc64_perm
15{
16 __kernel_key_t key;
17 __kernel_uid32_t uid;
18 __kernel_gid32_t gid;
19 __kernel_uid32_t cuid;
20 __kernel_gid32_t cgid;
21 __kernel_mode_t mode;
22 unsigned short __pad1;
23 unsigned short seq;
24 unsigned short __pad2;
25 unsigned long __unused1;
26 unsigned long __unused2;
27};
28
29#endif /* _ASM_IPCBUF_H */
diff --git a/arch/mn10300/include/asm/irq.h b/arch/mn10300/include/asm/irq.h
new file mode 100644
index 000000000000..25c045d16d1c
--- /dev/null
+++ b/arch/mn10300/include/asm/irq.h
@@ -0,0 +1,32 @@
1/* MN10300 Hardware interrupt definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Modified by David Howells (dhowells@redhat.com)
6 * - Derived from include/asm-i386/irq.h:
7 * - (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public Licence
11 * as published by the Free Software Foundation; either version
12 * 2 of the Licence, or (at your option) any later version.
13 */
14#ifndef _ASM_IRQ_H
15#define _ASM_IRQ_H
16
17#include <asm/intctl-regs.h>
18#include <asm/reset-regs.h>
19#include <proc/irq.h>
20
21/* this number is used when no interrupt has been assigned */
22#define NO_IRQ INT_MAX
23
24/* hardware irq numbers */
25#define NR_IRQS GxICR_NUM_IRQS
26
27/* external hardware irq numbers */
28#define NR_XIRQS GxICR_NUM_XIRQS
29
30#define irq_canonicalize(IRQ) (IRQ)
31
32#endif /* _ASM_IRQ_H */
diff --git a/arch/mn10300/include/asm/irq_regs.h b/arch/mn10300/include/asm/irq_regs.h
new file mode 100644
index 000000000000..a848cd232eb4
--- /dev/null
+++ b/arch/mn10300/include/asm/irq_regs.h
@@ -0,0 +1,24 @@
1/* MN10300 IRQ registers pointer definition
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_IRQ_REGS_H
12#define _ASM_IRQ_REGS_H
13
14/*
15 * Per-cpu current frame pointer - the location of the last exception frame on
16 * the stack
17 */
18#define ARCH_HAS_OWN_IRQ_REGS
19
20#ifndef __ASSEMBLY__
21#define get_irq_regs() (__frame)
22#endif
23
24#endif /* _ASM_IRQ_REGS_H */
diff --git a/arch/mn10300/include/asm/kdebug.h b/arch/mn10300/include/asm/kdebug.h
new file mode 100644
index 000000000000..0f47e112190c
--- /dev/null
+++ b/arch/mn10300/include/asm/kdebug.h
@@ -0,0 +1,22 @@
1/* MN10300 In-kernel death knells
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_KDEBUG_H
13#define _ASM_KDEBUG_H
14
15/* Grossly misnamed. */
16enum die_val {
17 DIE_OOPS = 1,
18 DIE_BREAKPOINT,
19 DIE_GPF,
20};
21
22#endif /* _ASM_KDEBUG_H */
diff --git a/arch/mn10300/include/asm/kmap_types.h b/arch/mn10300/include/asm/kmap_types.h
new file mode 100644
index 000000000000..3398f9f35603
--- /dev/null
+++ b/arch/mn10300/include/asm/kmap_types.h
@@ -0,0 +1,31 @@
1/* MN10300 kmap_atomic() slot IDs
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_KMAP_TYPES_H
12#define _ASM_KMAP_TYPES_H
13
14enum km_type {
15 KM_BOUNCE_READ,
16 KM_SKB_SUNRPC_DATA,
17 KM_SKB_DATA_SOFTIRQ,
18 KM_USER0,
19 KM_USER1,
20 KM_BIO_SRC_IRQ,
21 KM_BIO_DST_IRQ,
22 KM_PTE0,
23 KM_PTE1,
24 KM_IRQ0,
25 KM_IRQ1,
26 KM_SOFTIRQ0,
27 KM_SOFTIRQ1,
28 KM_TYPE_NR
29};
30
31#endif /* _ASM_KMAP_TYPES_H */
diff --git a/arch/mn10300/include/asm/kprobes.h b/arch/mn10300/include/asm/kprobes.h
new file mode 100644
index 000000000000..c800b590183a
--- /dev/null
+++ b/arch/mn10300/include/asm/kprobes.h
@@ -0,0 +1,50 @@
1/* MN10300 Kernel Probes support
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by Mark Salter (msalter@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public Licence as published by
8 * the Free Software Foundation; either version 2 of the Licence, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public Licence for more details.
15 *
16 * You should have received a copy of the GNU General Public Licence
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 *
20 */
21#ifndef _ASM_KPROBES_H
22#define _ASM_KPROBES_H
23
24#include <linux/types.h>
25#include <linux/ptrace.h>
26
27struct kprobe;
28
29typedef unsigned char kprobe_opcode_t;
30#define BREAKPOINT_INSTRUCTION 0xff
31#define MAX_INSN_SIZE 8
32#define MAX_STACK_SIZE 128
33
34/* Architecture specific copy of original instruction */
35struct arch_specific_insn {
36 /* copy of original instruction
37 */
38 kprobe_opcode_t insn[MAX_INSN_SIZE];
39};
40
41extern const int kretprobe_blacklist_size;
42
43extern int kprobe_exceptions_notify(struct notifier_block *self,
44 unsigned long val, void *data);
45
46#define flush_insn_slot(p) do {} while (0)
47
48extern void arch_remove_kprobe(struct kprobe *p);
49
50#endif /* _ASM_KPROBES_H */
diff --git a/arch/mn10300/include/asm/linkage.h b/arch/mn10300/include/asm/linkage.h
new file mode 100644
index 000000000000..dda3002a5dfa
--- /dev/null
+++ b/arch/mn10300/include/asm/linkage.h
@@ -0,0 +1,20 @@
1/* MN10300 Linkage and calling-convention overrides
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_LINKAGE_H
12#define _ASM_LINKAGE_H
13
14/* don't override anything */
15#define asmlinkage
16
17#define __ALIGN .align 4,0xcb
18#define __ALIGN_STR ".align 4,0xcb"
19
20#endif
diff --git a/arch/mn10300/include/asm/local.h b/arch/mn10300/include/asm/local.h
new file mode 100644
index 000000000000..c11c530f74d0
--- /dev/null
+++ b/arch/mn10300/include/asm/local.h
@@ -0,0 +1 @@
#include <asm-generic/local.h>
diff --git a/arch/mn10300/include/asm/mc146818rtc.h b/arch/mn10300/include/asm/mc146818rtc.h
new file mode 100644
index 000000000000..df6bc6e0e8c6
--- /dev/null
+++ b/arch/mn10300/include/asm/mc146818rtc.h
@@ -0,0 +1 @@
#include <asm/rtc-regs.h>
diff --git a/arch/mn10300/include/asm/mman.h b/arch/mn10300/include/asm/mman.h
new file mode 100644
index 000000000000..b7986b65addf
--- /dev/null
+++ b/arch/mn10300/include/asm/mman.h
@@ -0,0 +1,28 @@
1/* MN10300 Constants for mmap and co.
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * - Derived from asm-x86/mman.h
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_MMAN_H
13#define _ASM_MMAN_H
14
15#include <asm-generic/mman.h>
16
17#define MAP_GROWSDOWN 0x0100 /* stack-like segment */
18#define MAP_DENYWRITE 0x0800 /* ETXTBSY */
19#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
20#define MAP_LOCKED 0x2000 /* pages are locked */
21#define MAP_NORESERVE 0x4000 /* don't check for reservations */
22#define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */
23#define MAP_NONBLOCK 0x10000 /* do not block on IO */
24
25#define MCL_CURRENT 1 /* lock all current mappings */
26#define MCL_FUTURE 2 /* lock all future mappings */
27
28#endif /* _ASM_MMAN_H */
diff --git a/arch/mn10300/include/asm/mmu.h b/arch/mn10300/include/asm/mmu.h
new file mode 100644
index 000000000000..2d2d097e7309
--- /dev/null
+++ b/arch/mn10300/include/asm/mmu.h
@@ -0,0 +1,19 @@
1/* MN10300 Memory management context
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 * - Derived from include/asm-frv/mmu.h
6 */
7
8#ifndef _ASM_MMU_H
9#define _ASM_MMU_H
10
11/*
12 * MMU context
13 */
14typedef struct {
15 unsigned long tlbpid[NR_CPUS]; /* TLB PID for this process on
16 * each CPU */
17} mm_context_t;
18
19#endif /* _ASM_MMU_H */
diff --git a/arch/mn10300/include/asm/mmu_context.h b/arch/mn10300/include/asm/mmu_context.h
new file mode 100644
index 000000000000..a9e2e34f69b0
--- /dev/null
+++ b/arch/mn10300/include/asm/mmu_context.h
@@ -0,0 +1,138 @@
1/* MN10300 MMU context management
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Modified by David Howells (dhowells@redhat.com)
5 * - Derived from include/asm-m32r/mmu_context.h
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 *
12 *
13 * This implements an algorithm to provide TLB PID mappings to provide
14 * selective access to the TLB for processes, thus reducing the number of TLB
15 * flushes required.
16 *
17 * Note, however, that the M32R algorithm is technically broken as it does not
18 * handle version wrap-around, and could, theoretically, have a problem with a
19 * very long lived program that sleeps long enough for the version number to
20 * wrap all the way around so that its TLB mappings appear valid once again.
21 */
22#ifndef _ASM_MMU_CONTEXT_H
23#define _ASM_MMU_CONTEXT_H
24
25#include <asm/atomic.h>
26#include <asm/pgalloc.h>
27#include <asm/tlbflush.h>
28#include <asm-generic/mm_hooks.h>
29
30#define MMU_CONTEXT_TLBPID_MASK 0x000000ffUL
31#define MMU_CONTEXT_VERSION_MASK 0xffffff00UL
32#define MMU_CONTEXT_FIRST_VERSION 0x00000100UL
33#define MMU_NO_CONTEXT 0x00000000UL
34
35extern unsigned long mmu_context_cache[NR_CPUS];
36#define mm_context(mm) (mm->context.tlbpid[smp_processor_id()])
37
38#define enter_lazy_tlb(mm, tsk) do {} while (0)
39
40#ifdef CONFIG_SMP
41#define cpu_ran_vm(cpu, task) \
42 cpu_set((cpu), (task)->cpu_vm_mask)
43#define cpu_maybe_ran_vm(cpu, task) \
44 cpu_test_and_set((cpu), (task)->cpu_vm_mask)
45#else
46#define cpu_ran_vm(cpu, task) do {} while (0)
47#define cpu_maybe_ran_vm(cpu, task) true
48#endif /* CONFIG_SMP */
49
50/*
51 * allocate an MMU context
52 */
53static inline unsigned long allocate_mmu_context(struct mm_struct *mm)
54{
55 unsigned long *pmc = &mmu_context_cache[smp_processor_id()];
56 unsigned long mc = ++(*pmc);
57
58 if (!(mc & MMU_CONTEXT_TLBPID_MASK)) {
59 /* we exhausted the TLB PIDs of this version on this CPU, so we
60 * flush this CPU's TLB in its entirety and start new cycle */
61 flush_tlb_all();
62
63 /* fix the TLB version if needed (we avoid version #0 so as to
64 * distingush MMU_NO_CONTEXT) */
65 if (!mc)
66 *pmc = mc = MMU_CONTEXT_FIRST_VERSION;
67 }
68 mm_context(mm) = mc;
69 return mc;
70}
71
72/*
73 * get an MMU context if one is needed
74 */
75static inline unsigned long get_mmu_context(struct mm_struct *mm)
76{
77 unsigned long mc = MMU_NO_CONTEXT, cache;
78
79 if (mm) {
80 cache = mmu_context_cache[smp_processor_id()];
81 mc = mm_context(mm);
82
83 /* if we have an old version of the context, replace it */
84 if ((mc ^ cache) & MMU_CONTEXT_VERSION_MASK)
85 mc = allocate_mmu_context(mm);
86 }
87 return mc;
88}
89
90/*
91 * initialise the context related info for a new mm_struct instance
92 */
93static inline int init_new_context(struct task_struct *tsk,
94 struct mm_struct *mm)
95{
96 int num_cpus = NR_CPUS, i;
97
98 for (i = 0; i < num_cpus; i++)
99 mm->context.tlbpid[i] = MMU_NO_CONTEXT;
100 return 0;
101}
102
103/*
104 * destroy context related info for an mm_struct that is about to be put to
105 * rest
106 */
107#define destroy_context(mm) do { } while (0)
108
109/*
110 * after we have set current->mm to a new value, this activates the context for
111 * the new mm so we see the new mappings.
112 */
113static inline void activate_context(struct mm_struct *mm, int cpu)
114{
115 PIDR = get_mmu_context(mm) & MMU_CONTEXT_TLBPID_MASK;
116}
117
118/*
119 * change between virtual memory sets
120 */
121static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
122 struct task_struct *tsk)
123{
124 int cpu = smp_processor_id();
125
126 if (prev != next) {
127 cpu_ran_vm(cpu, next);
128 activate_context(next, cpu);
129 PTBR = (unsigned long) next->pgd;
130 } else if (!cpu_maybe_ran_vm(cpu, next)) {
131 activate_context(next, cpu);
132 }
133}
134
135#define deactivate_mm(tsk, mm) do {} while (0)
136#define activate_mm(prev, next) switch_mm((prev), (next), NULL)
137
138#endif /* _ASM_MMU_CONTEXT_H */
diff --git a/arch/mn10300/include/asm/module.h b/arch/mn10300/include/asm/module.h
new file mode 100644
index 000000000000..5d7057d01494
--- /dev/null
+++ b/arch/mn10300/include/asm/module.h
@@ -0,0 +1,27 @@
1/* MN10300 Arch-specific module definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by Mark Salter (msalter@redhat.com)
5 * Derived from include/asm-i386/module.h
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_MODULE_H
13#define _ASM_MODULE_H
14
15struct mod_arch_specific {
16};
17
18#define Elf_Shdr Elf32_Shdr
19#define Elf_Sym Elf32_Sym
20#define Elf_Ehdr Elf32_Ehdr
21
22/*
23 * Include the MN10300 architecture version.
24 */
25#define MODULE_ARCH_VERMAGIC __stringify(PROCESSOR_MODEL_NAME) " "
26
27#endif /* _ASM_MODULE_H */
diff --git a/arch/mn10300/include/asm/msgbuf.h b/arch/mn10300/include/asm/msgbuf.h
new file mode 100644
index 000000000000..8b602450cc4a
--- /dev/null
+++ b/arch/mn10300/include/asm/msgbuf.h
@@ -0,0 +1,31 @@
1#ifndef _ASM_MSGBUF_H
2#define _ASM_MSGBUF_H
3
4/*
5 * The msqid64_ds structure for MN10300 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct msqid64_ds {
15 struct ipc64_perm msg_perm;
16 __kernel_time_t msg_stime; /* last msgsnd time */
17 unsigned long __unused1;
18 __kernel_time_t msg_rtime; /* last msgrcv time */
19 unsigned long __unused2;
20 __kernel_time_t msg_ctime; /* last change time */
21 unsigned long __unused3;
22 unsigned long msg_cbytes; /* current number of bytes on queue */
23 unsigned long msg_qnum; /* number of messages in queue */
24 unsigned long msg_qbytes; /* max number of bytes on queue */
25 __kernel_pid_t msg_lspid; /* pid of last msgsnd */
26 __kernel_pid_t msg_lrpid; /* last receive pid */
27 unsigned long __unused4;
28 unsigned long __unused5;
29};
30
31#endif /* _ASM_MSGBUF_H */
diff --git a/arch/mn10300/include/asm/mutex.h b/arch/mn10300/include/asm/mutex.h
new file mode 100644
index 000000000000..84f5490c6fb4
--- /dev/null
+++ b/arch/mn10300/include/asm/mutex.h
@@ -0,0 +1,16 @@
1/* MN10300 Mutex fastpath
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 *
11 *
12 * TODO: implement optimized primitives instead, or leave the generic
13 * implementation in place, or pick the atomic_xchg() based generic
14 * implementation. (see asm-generic/mutex-xchg.h for details)
15 */
16#include <asm-generic/mutex-null.h>
diff --git a/arch/mn10300/include/asm/nmi.h b/arch/mn10300/include/asm/nmi.h
new file mode 100644
index 000000000000..f3671cbbc117
--- /dev/null
+++ b/arch/mn10300/include/asm/nmi.h
@@ -0,0 +1,14 @@
1/* MN10300 NMI handling
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_NMI_H
12#define _ASM_NMI_H
13
14#endif /* _ASM_NMI_H */
diff --git a/arch/mn10300/include/asm/page.h b/arch/mn10300/include/asm/page.h
new file mode 100644
index 000000000000..8288e124165b
--- /dev/null
+++ b/arch/mn10300/include/asm/page.h
@@ -0,0 +1,128 @@
1/* MN10300 Page table definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PAGE_H
12#define _ASM_PAGE_H
13
14/* PAGE_SHIFT determines the page size */
15#define PAGE_SHIFT 12
16
17#ifndef __ASSEMBLY__
18#define PAGE_SIZE (1UL << PAGE_SHIFT)
19#define PAGE_MASK (~(PAGE_SIZE - 1))
20#else
21#define PAGE_SIZE +(1 << PAGE_SHIFT) /* unary plus marks an
22 * immediate val not an addr */
23#define PAGE_MASK +(~(PAGE_SIZE - 1))
24#endif
25
26#ifdef __KERNEL__
27#ifndef __ASSEMBLY__
28
29#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE)
30#define copy_page(to, from) memcpy((void *)(to), (void *)(from), PAGE_SIZE)
31
32#define clear_user_page(addr, vaddr, page) clear_page(addr)
33#define copy_user_page(vto, vfrom, vaddr, to) copy_page(vto, vfrom)
34
35/*
36 * These are used to make use of C type-checking..
37 */
38typedef struct { unsigned long pte; } pte_t;
39typedef struct { unsigned long pgd; } pgd_t;
40typedef struct { unsigned long pgprot; } pgprot_t;
41typedef struct page *pgtable_t;
42
43#define PTE_MASK PAGE_MASK
44#define HPAGE_SHIFT 22
45
46#ifdef CONFIG_HUGETLB_PAGE
47#define HPAGE_SIZE ((1UL) << HPAGE_SHIFT)
48#define HPAGE_MASK (~(HPAGE_SIZE - 1))
49#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
50#endif
51
52#define pte_val(x) ((x).pte)
53#define pgd_val(x) ((x).pgd)
54#define pgprot_val(x) ((x).pgprot)
55
56#define __pte(x) ((pte_t) { (x) })
57#define __pgd(x) ((pgd_t) { (x) })
58#define __pgprot(x) ((pgprot_t) { (x) })
59
60#include <asm-generic/pgtable-nopmd.h>
61
62#endif /* !__ASSEMBLY__ */
63
64/*
65 * This handles the memory map.. We could make this a config
66 * option, but too many people screw it up, and too few need
67 * it.
68 *
69 * A __PAGE_OFFSET of 0xC0000000 means that the kernel has
70 * a virtual address space of one gigabyte, which limits the
71 * amount of physical memory you can use to about 950MB.
72 */
73
74#ifndef __ASSEMBLY__
75
76/* Pure 2^n version of get_order */
77static inline int get_order(unsigned long size) __attribute__((const));
78static inline int get_order(unsigned long size)
79{
80 int order;
81
82 size = (size - 1) >> (PAGE_SHIFT - 1);
83 order = -1;
84 do {
85 size >>= 1;
86 order++;
87 } while (size);
88 return order;
89}
90
91#endif /* __ASSEMBLY__ */
92
93#include <asm/page_offset.h>
94
95#define __PAGE_OFFSET (PAGE_OFFSET_RAW)
96#define PAGE_OFFSET ((unsigned long) __PAGE_OFFSET)
97
98/*
99 * main RAM and kernel working space are coincident at 0x90000000, but to make
100 * life more interesting, there's also an uncached virtual shadow at 0xb0000000
101 * - these mappings are fixed in the MMU
102 */
103#define __pfn_disp (CONFIG_KERNEL_RAM_BASE_ADDRESS >> PAGE_SHIFT)
104
105#define __pa(x) ((unsigned long)(x))
106#define __va(x) ((void *)(unsigned long)(x))
107#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
108#define pfn_to_page(pfn) (mem_map + ((pfn) - __pfn_disp))
109#define page_to_pfn(page) ((unsigned long)((page) - mem_map) + __pfn_disp)
110
111#define pfn_valid(pfn) \
112({ \
113 unsigned long __pfn = (pfn) - __pfn_disp; \
114 __pfn < max_mapnr; \
115})
116
117#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
118#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
119#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
120
121#define VM_DATA_DEFAULT_FLAGS \
122 (VM_READ | VM_WRITE | \
123 ((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0) | \
124 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
125
126#endif /* __KERNEL__ */
127
128#endif /* _ASM_PAGE_H */
diff --git a/arch/mn10300/include/asm/page_offset.h b/arch/mn10300/include/asm/page_offset.h
new file mode 100644
index 000000000000..8eb5b16ad86b
--- /dev/null
+++ b/arch/mn10300/include/asm/page_offset.h
@@ -0,0 +1,11 @@
1/* MN10300 Kernel base address
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 */
6#ifndef _ASM_PAGE_OFFSET_H
7#define _ASM_PAGE_OFFSET_H
8
9#define PAGE_OFFSET_RAW CONFIG_KERNEL_RAM_BASE_ADDRESS
10
11#endif
diff --git a/arch/mn10300/include/asm/param.h b/arch/mn10300/include/asm/param.h
new file mode 100644
index 000000000000..789b1df41fcb
--- /dev/null
+++ b/arch/mn10300/include/asm/param.h
@@ -0,0 +1,34 @@
1/* MN10300 Kernel parameters
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PARAM_H
12#define _ASM_PARAM_H
13
14#ifdef __KERNEL__
15#define HZ CONFIG_HZ /* Internal kernel timer frequency */
16#define USER_HZ 100 /* .. some user interfaces are in
17 * "ticks" */
18#define CLOCKS_PER_SEC (USER_HZ) /* like times() */
19#endif
20
21#ifndef HZ
22#define HZ 100
23#endif
24
25#define EXEC_PAGESIZE 4096
26
27#ifndef NOGROUP
28#define NOGROUP (-1)
29#endif
30
31#define MAXHOSTNAMELEN 64 /* max length of hostname */
32#define COMMAND_LINE_SIZE 256
33
34#endif /* _ASM_PARAM_H */
diff --git a/arch/mn10300/include/asm/pci.h b/arch/mn10300/include/asm/pci.h
new file mode 100644
index 000000000000..0517b45313d8
--- /dev/null
+++ b/arch/mn10300/include/asm/pci.h
@@ -0,0 +1,129 @@
1/* MN10300 PCI definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PCI_H
12#define _ASM_PCI_H
13
14#ifdef __KERNEL__
15#include <linux/mm.h> /* for struct page */
16
17#if 0
18#define __pcbdebug(FMT, ADDR, ...) \
19 printk(KERN_DEBUG "PCIBRIDGE[%08x]: "FMT"\n", \
20 (u32)(ADDR), ##__VA_ARGS__)
21
22#define __pcidebug(FMT, BUS, DEVFN, WHERE,...) \
23do { \
24 printk(KERN_DEBUG "PCI[%02x:%02x.%x + %02x]: "FMT"\n", \
25 (BUS)->number, \
26 PCI_SLOT(DEVFN), \
27 PCI_FUNC(DEVFN), \
28 (u32)(WHERE), ##__VA_ARGS__); \
29} while (0)
30
31#else
32#define __pcbdebug(FMT, ADDR, ...) do {} while (0)
33#define __pcidebug(FMT, BUS, DEVFN, WHERE, ...) do {} while (0)
34#endif
35
36/* Can be used to override the logic in pci_scan_bus for skipping
37 * already-configured bus numbers - to be used for buggy BIOSes or
38 * architectures with incomplete PCI setup by the loader */
39
40#ifdef CONFIG_PCI
41#define pcibios_assign_all_busses() 1
42extern void unit_pci_init(void);
43#else
44#define pcibios_assign_all_busses() 0
45#endif
46
47extern unsigned long pci_mem_start;
48#define PCIBIOS_MIN_IO 0xBE000004
49#define PCIBIOS_MIN_MEM 0xB8000000
50
51void pcibios_set_master(struct pci_dev *dev);
52void pcibios_penalize_isa_irq(int irq);
53
54/* Dynamic DMA mapping stuff.
55 * i386 has everything mapped statically.
56 */
57
58#include <linux/types.h>
59#include <linux/slab.h>
60#include <asm/scatterlist.h>
61#include <linux/string.h>
62#include <linux/mm.h>
63#include <asm/io.h>
64
65struct pci_dev;
66
67/* The PCI address space does equal the physical memory
68 * address space. The networking and block device layers use
69 * this boolean for bounce buffer decisions.
70 */
71#define PCI_DMA_BUS_IS_PHYS (1)
72
73
74/* This is always fine. */
75#define pci_dac_dma_supported(pci_dev, mask) (0)
76
77/* Return the index of the PCI controller for device. */
78static inline int pci_controller_num(struct pci_dev *dev)
79{
80 return 0;
81}
82
83#define HAVE_PCI_MMAP
84extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
85 enum pci_mmap_state mmap_state,
86 int write_combine);
87
88#endif /* __KERNEL__ */
89
90/* implement the pci_ DMA API in terms of the generic device dma_ one */
91#include <asm-generic/pci-dma-compat.h>
92
93/**
94 * pcibios_resource_to_bus - convert resource to PCI bus address
95 * @dev: device which owns this resource
96 * @region: converted bus-centric region (start,end)
97 * @res: resource to convert
98 *
99 * Convert a resource to a PCI device bus address or bus window.
100 */
101extern void pcibios_resource_to_bus(struct pci_dev *dev,
102 struct pci_bus_region *region,
103 struct resource *res);
104
105extern void pcibios_bus_to_resource(struct pci_dev *dev,
106 struct resource *res,
107 struct pci_bus_region *region);
108
109static inline struct resource *
110pcibios_select_root(struct pci_dev *pdev, struct resource *res)
111{
112 struct resource *root = NULL;
113
114 if (res->flags & IORESOURCE_IO)
115 root = &ioport_resource;
116 if (res->flags & IORESOURCE_MEM)
117 root = &iomem_resource;
118
119 return root;
120}
121
122#define pcibios_scan_all_fns(a, b) 0
123
124static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
125{
126 return channel ? 15 : 14;
127}
128
129#endif /* _ASM_PCI_H */
diff --git a/arch/mn10300/include/asm/percpu.h b/arch/mn10300/include/asm/percpu.h
new file mode 100644
index 000000000000..06a959d67234
--- /dev/null
+++ b/arch/mn10300/include/asm/percpu.h
@@ -0,0 +1 @@
#include <asm-generic/percpu.h>
diff --git a/arch/mn10300/include/asm/pgalloc.h b/arch/mn10300/include/asm/pgalloc.h
new file mode 100644
index 000000000000..ec057e1bd4cf
--- /dev/null
+++ b/arch/mn10300/include/asm/pgalloc.h
@@ -0,0 +1,56 @@
1/* MN10300 Page and page table/directory allocation
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PGALLOC_H
12#define _ASM_PGALLOC_H
13
14#include <asm/processor.h>
15#include <asm/page.h>
16#include <linux/threads.h>
17#include <linux/mm.h> /* for struct page */
18
19struct mm_struct;
20struct page;
21
22/* attach a page table to a PMD entry */
23#define pmd_populate_kernel(mm, pmd, pte) \
24 set_pmd(pmd, __pmd(__pa(pte) | _PAGE_TABLE))
25
26static inline
27void pmd_populate(struct mm_struct *mm, pmd_t *pmd, struct page *pte)
28{
29 set_pmd(pmd, __pmd((page_to_pfn(pte) << PAGE_SHIFT) | _PAGE_TABLE));
30}
31#define pmd_pgtable(pmd) pmd_page(pmd)
32
33/*
34 * Allocate and free page tables.
35 */
36
37extern pgd_t *pgd_alloc(struct mm_struct *);
38extern void pgd_free(struct mm_struct *, pgd_t *);
39
40extern pte_t *pte_alloc_one_kernel(struct mm_struct *, unsigned long);
41extern struct page *pte_alloc_one(struct mm_struct *, unsigned long);
42
43static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
44{
45 free_page((unsigned long) pte);
46}
47
48static inline void pte_free(struct mm_struct *mm, struct page *pte)
49{
50 __free_page(pte);
51}
52
53
54#define __pte_free_tlb(tlb, pte) tlb_remove_page((tlb), (pte))
55
56#endif /* _ASM_PGALLOC_H */
diff --git a/arch/mn10300/include/asm/pgtable.h b/arch/mn10300/include/asm/pgtable.h
new file mode 100644
index 000000000000..6dc30fc827c4
--- /dev/null
+++ b/arch/mn10300/include/asm/pgtable.h
@@ -0,0 +1,492 @@
1/* MN10300 Page table manipulators and constants
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 *
11 *
12 * The Linux memory management assumes a three-level page table setup. On
13 * the i386, we use that, but "fold" the mid level into the top-level page
14 * table, so that we physically have the same two-level page table as the
15 * i386 mmu expects.
16 *
17 * This file contains the functions and defines necessary to modify and use
18 * the i386 page table tree for the purposes of the MN10300 TLB handler
19 * functions.
20 */
21#ifndef _ASM_PGTABLE_H
22#define _ASM_PGTABLE_H
23
24#include <asm/cpu-regs.h>
25
26#ifndef __ASSEMBLY__
27#include <asm/processor.h>
28#include <asm/cache.h>
29#include <linux/threads.h>
30
31#include <asm/bitops.h>
32
33#include <linux/slab.h>
34#include <linux/list.h>
35#include <linux/spinlock.h>
36
37/*
38 * ZERO_PAGE is a global shared page that is always zero: used
39 * for zero-mapped memory areas etc..
40 */
41#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
42extern unsigned long empty_zero_page[1024];
43extern spinlock_t pgd_lock;
44extern struct page *pgd_list;
45
46extern void pmd_ctor(void *, struct kmem_cache *, unsigned long);
47extern void pgtable_cache_init(void);
48extern void paging_init(void);
49
50#endif /* !__ASSEMBLY__ */
51
52/*
53 * The Linux mn10300 paging architecture only implements both the traditional
54 * 2-level page tables
55 */
56#define PGDIR_SHIFT 22
57#define PTRS_PER_PGD 1024
58#define PTRS_PER_PUD 1 /* we don't really have any PUD physically */
59#define PTRS_PER_PMD 1 /* we don't really have any PMD physically */
60#define PTRS_PER_PTE 1024
61
62#define PGD_SIZE PAGE_SIZE
63#define PMD_SIZE (1UL << PMD_SHIFT)
64#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
65#define PGDIR_MASK (~(PGDIR_SIZE - 1))
66
67#define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
68#define FIRST_USER_ADDRESS 0
69
70#define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
71#define KERNEL_PGD_PTRS (PTRS_PER_PGD - USER_PGD_PTRS)
72
73#define TWOLEVEL_PGDIR_SHIFT 22
74#define BOOT_USER_PGD_PTRS (__PAGE_OFFSET >> TWOLEVEL_PGDIR_SHIFT)
75#define BOOT_KERNEL_PGD_PTRS (1024 - BOOT_USER_PGD_PTRS)
76
77#ifndef __ASSEMBLY__
78extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
79#endif
80
81/*
82 * Unfortunately, due to the way the MMU works on the MN10300, the vmalloc VM
83 * area has to be in the lower half of the virtual address range (the upper
84 * half is not translated through the TLB).
85 *
86 * So in this case, the vmalloc area goes at the bottom of the address map
87 * (leaving a hole at the very bottom to catch addressing errors), and
88 * userspace starts immediately above.
89 *
90 * The vmalloc() routines also leaves a hole of 4kB between each vmalloced
91 * area to catch addressing errors.
92 */
93#define VMALLOC_OFFSET (8 * 1024 * 1024)
94#define VMALLOC_START (0x70000000)
95#define VMALLOC_END (0x7C000000)
96
97#ifndef __ASSEMBLY__
98extern pte_t kernel_vmalloc_ptes[(VMALLOC_END - VMALLOC_START) / PAGE_SIZE];
99#endif
100
101/* IPTEL/DPTEL bit assignments */
102#define _PAGE_BIT_VALID xPTEL_V_BIT
103#define _PAGE_BIT_ACCESSED xPTEL_UNUSED1_BIT /* mustn't be loaded into IPTEL/DPTEL */
104#define _PAGE_BIT_NX xPTEL_UNUSED2_BIT /* mustn't be loaded into IPTEL/DPTEL */
105#define _PAGE_BIT_CACHE xPTEL_C_BIT
106#define _PAGE_BIT_PRESENT xPTEL_PV_BIT
107#define _PAGE_BIT_DIRTY xPTEL_D_BIT
108#define _PAGE_BIT_GLOBAL xPTEL_G_BIT
109
110#define _PAGE_VALID xPTEL_V
111#define _PAGE_ACCESSED xPTEL_UNUSED1
112#define _PAGE_NX xPTEL_UNUSED2 /* no-execute bit */
113#define _PAGE_CACHE xPTEL_C
114#define _PAGE_PRESENT xPTEL_PV
115#define _PAGE_DIRTY xPTEL_D
116#define _PAGE_PROT xPTEL_PR
117#define _PAGE_PROT_RKNU xPTEL_PR_ROK
118#define _PAGE_PROT_WKNU xPTEL_PR_RWK
119#define _PAGE_PROT_RKRU xPTEL_PR_ROK_ROU
120#define _PAGE_PROT_WKRU xPTEL_PR_RWK_ROU
121#define _PAGE_PROT_WKWU xPTEL_PR_RWK_RWU
122#define _PAGE_GLOBAL xPTEL_G
123#define _PAGE_PSE xPTEL_PS_4Mb /* 4MB page */
124
125#define _PAGE_FILE xPTEL_UNUSED1_BIT /* set:pagecache unset:swap */
126
127#define __PAGE_PROT_UWAUX 0x040
128#define __PAGE_PROT_USER 0x080
129#define __PAGE_PROT_WRITE 0x100
130
131#define _PAGE_PRESENTV (_PAGE_PRESENT|_PAGE_VALID)
132#define _PAGE_PROTNONE 0x000 /* If not present */
133
134#ifndef __ASSEMBLY__
135
136#define VMALLOC_VMADDR(x) ((unsigned long)(x))
137
138#define _PAGE_TABLE (_PAGE_PRESENTV | _PAGE_PROT_WKNU | _PAGE_ACCESSED | _PAGE_DIRTY)
139#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
140
141#define __PAGE_NONE (_PAGE_PRESENTV | _PAGE_PROT_RKNU | _PAGE_ACCESSED | _PAGE_CACHE)
142#define __PAGE_SHARED (_PAGE_PRESENTV | _PAGE_PROT_WKWU | _PAGE_ACCESSED | _PAGE_CACHE)
143#define __PAGE_COPY (_PAGE_PRESENTV | _PAGE_PROT_RKRU | _PAGE_ACCESSED | _PAGE_CACHE)
144#define __PAGE_READONLY (_PAGE_PRESENTV | _PAGE_PROT_RKRU | _PAGE_ACCESSED | _PAGE_CACHE)
145
146#define PAGE_NONE __pgprot(__PAGE_NONE | _PAGE_NX)
147#define PAGE_SHARED_NOEXEC __pgprot(__PAGE_SHARED | _PAGE_NX)
148#define PAGE_COPY_NOEXEC __pgprot(__PAGE_COPY | _PAGE_NX)
149#define PAGE_READONLY_NOEXEC __pgprot(__PAGE_READONLY | _PAGE_NX)
150#define PAGE_SHARED_EXEC __pgprot(__PAGE_SHARED)
151#define PAGE_COPY_EXEC __pgprot(__PAGE_COPY)
152#define PAGE_READONLY_EXEC __pgprot(__PAGE_READONLY)
153#define PAGE_COPY PAGE_COPY_NOEXEC
154#define PAGE_READONLY PAGE_READONLY_NOEXEC
155#define PAGE_SHARED PAGE_SHARED_EXEC
156
157#define __PAGE_KERNEL_BASE (_PAGE_PRESENTV | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_GLOBAL)
158
159#define __PAGE_KERNEL (__PAGE_KERNEL_BASE | _PAGE_PROT_WKNU | _PAGE_CACHE | _PAGE_NX)
160#define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL_BASE | _PAGE_PROT_WKNU | _PAGE_NX)
161#define __PAGE_KERNEL_EXEC (__PAGE_KERNEL & ~_PAGE_NX)
162#define __PAGE_KERNEL_RO (__PAGE_KERNEL_BASE | _PAGE_PROT_RKNU | _PAGE_CACHE | _PAGE_NX)
163#define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE)
164#define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC | _PAGE_PSE)
165
166#define PAGE_KERNEL __pgprot(__PAGE_KERNEL)
167#define PAGE_KERNEL_RO __pgprot(__PAGE_KERNEL_RO)
168#define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC)
169#define PAGE_KERNEL_NOCACHE __pgprot(__PAGE_KERNEL_NOCACHE)
170#define PAGE_KERNEL_LARGE __pgprot(__PAGE_KERNEL_LARGE)
171#define PAGE_KERNEL_LARGE_EXEC __pgprot(__PAGE_KERNEL_LARGE_EXEC)
172
173/*
174 * Whilst the MN10300 can do page protection for execute (given separate data
175 * and insn TLBs), we are not supporting it at the moment. Write permission,
176 * however, always implies read permission (but not execute permission).
177 */
178#define __P000 PAGE_NONE
179#define __P001 PAGE_READONLY_NOEXEC
180#define __P010 PAGE_COPY_NOEXEC
181#define __P011 PAGE_COPY_NOEXEC
182#define __P100 PAGE_READONLY_EXEC
183#define __P101 PAGE_READONLY_EXEC
184#define __P110 PAGE_COPY_EXEC
185#define __P111 PAGE_COPY_EXEC
186
187#define __S000 PAGE_NONE
188#define __S001 PAGE_READONLY_NOEXEC
189#define __S010 PAGE_SHARED_NOEXEC
190#define __S011 PAGE_SHARED_NOEXEC
191#define __S100 PAGE_READONLY_EXEC
192#define __S101 PAGE_READONLY_EXEC
193#define __S110 PAGE_SHARED_EXEC
194#define __S111 PAGE_SHARED_EXEC
195
196/*
197 * Define this to warn about kernel memory accesses that are
198 * done without a 'verify_area(VERIFY_WRITE,..)'
199 */
200#undef TEST_VERIFY_AREA
201
202#define pte_present(x) (pte_val(x) & _PAGE_VALID)
203#define pte_clear(mm, addr, xp) \
204do { \
205 set_pte_at((mm), (addr), (xp), __pte(0)); \
206} while (0)
207
208#define pmd_none(x) (!pmd_val(x))
209#define pmd_present(x) (!pmd_none(x))
210#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
211#define pmd_bad(x) 0
212
213
214#define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT))
215
216#ifndef __ASSEMBLY__
217
218/*
219 * The following only work if pte_present() is true.
220 * Undefined behaviour if not..
221 */
222static inline int pte_user(pte_t pte) { return pte_val(pte) & __PAGE_PROT_USER; }
223static inline int pte_read(pte_t pte) { return pte_val(pte) & __PAGE_PROT_USER; }
224static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
225static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
226static inline int pte_write(pte_t pte) { return pte_val(pte) & __PAGE_PROT_WRITE; }
227static inline int pte_special(pte_t pte){ return 0; }
228
229/*
230 * The following only works if pte_present() is not true.
231 */
232static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
233
234static inline pte_t pte_rdprotect(pte_t pte)
235{
236 pte_val(pte) &= ~(__PAGE_PROT_USER|__PAGE_PROT_UWAUX); return pte;
237}
238static inline pte_t pte_exprotect(pte_t pte)
239{
240 pte_val(pte) |= _PAGE_NX; return pte;
241}
242
243static inline pte_t pte_wrprotect(pte_t pte)
244{
245 pte_val(pte) &= ~(__PAGE_PROT_WRITE|__PAGE_PROT_UWAUX); return pte;
246}
247
248static inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) &= ~_PAGE_DIRTY; return pte; }
249static inline pte_t pte_mkold(pte_t pte) { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
250static inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) |= _PAGE_DIRTY; return pte; }
251static inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) |= _PAGE_ACCESSED; return pte; }
252static inline pte_t pte_mkexec(pte_t pte) { pte_val(pte) &= ~_PAGE_NX; return pte; }
253
254static inline pte_t pte_mkread(pte_t pte)
255{
256 pte_val(pte) |= __PAGE_PROT_USER;
257 if (pte_write(pte))
258 pte_val(pte) |= __PAGE_PROT_UWAUX;
259 return pte;
260}
261static inline pte_t pte_mkwrite(pte_t pte)
262{
263 pte_val(pte) |= __PAGE_PROT_WRITE;
264 if (pte_val(pte) & __PAGE_PROT_USER)
265 pte_val(pte) |= __PAGE_PROT_UWAUX;
266 return pte;
267}
268
269static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
270
271#define pte_ERROR(e) \
272 printk(KERN_ERR "%s:%d: bad pte %08lx.\n", \
273 __FILE__, __LINE__, pte_val(e))
274#define pgd_ERROR(e) \
275 printk(KERN_ERR "%s:%d: bad pgd %08lx.\n", \
276 __FILE__, __LINE__, pgd_val(e))
277
278/*
279 * The "pgd_xxx()" functions here are trivial for a folded two-level
280 * setup: the pgd is never bad, and a pmd always exists (as it's folded
281 * into the pgd entry)
282 */
283#define pgd_clear(xp) do { } while (0)
284
285/*
286 * Certain architectures need to do special things when PTEs
287 * within a page table are directly modified. Thus, the following
288 * hook is made available.
289 */
290#define set_pte(pteptr, pteval) (*(pteptr) = pteval)
291#define set_pte_at(mm, addr, ptep, pteval) set_pte((ptep), (pteval))
292#define set_pte_atomic(pteptr, pteval) set_pte((pteptr), (pteval))
293
294/*
295 * (pmds are folded into pgds so this doesn't get actually called,
296 * but the define is needed for a generic inline function.)
297 */
298#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
299
300#define ptep_get_and_clear(mm, addr, ptep) \
301 __pte(xchg(&(ptep)->pte, 0))
302#define pte_same(a, b) (pte_val(a) == pte_val(b))
303#define pte_page(x) pfn_to_page(pte_pfn(x))
304#define pte_none(x) (!pte_val(x))
305#define pte_pfn(x) ((unsigned long) (pte_val(x) >> PAGE_SHIFT))
306#define __pfn_addr(pfn) ((pfn) << PAGE_SHIFT)
307#define pfn_pte(pfn, prot) __pte(__pfn_addr(pfn) | pgprot_val(prot))
308#define pfn_pmd(pfn, prot) __pmd(__pfn_addr(pfn) | pgprot_val(prot))
309
310/*
311 * All present user pages are user-executable:
312 */
313static inline int pte_exec(pte_t pte)
314{
315 return pte_user(pte);
316}
317
318/*
319 * All present pages are kernel-executable:
320 */
321static inline int pte_exec_kernel(pte_t pte)
322{
323 return 1;
324}
325
326/*
327 * Bits 0 and 1 are taken, split up the 29 bits of offset
328 * into this range:
329 */
330#define PTE_FILE_MAX_BITS 29
331
332#define pte_to_pgoff(pte) (pte_val(pte) >> 2)
333#define pgoff_to_pte(off) __pte((off) << 2 | _PAGE_FILE)
334
335/* Encode and de-code a swap entry */
336#define __swp_type(x) (((x).val >> 2) & 0x3f)
337#define __swp_offset(x) ((x).val >> 8)
338#define __swp_entry(type, offset) \
339 ((swp_entry_t) { ((type) << 2) | ((offset) << 8) })
340#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
341#define __swp_entry_to_pte(x) __pte((x).val)
342
343static inline
344int ptep_test_and_clear_dirty(struct vm_area_struct *vma, unsigned long addr,
345 pte_t *ptep)
346{
347 if (!pte_dirty(*ptep))
348 return 0;
349 return test_and_clear_bit(_PAGE_BIT_DIRTY, &ptep->pte);
350}
351
352static inline
353int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr,
354 pte_t *ptep)
355{
356 if (!pte_young(*ptep))
357 return 0;
358 return test_and_clear_bit(_PAGE_BIT_ACCESSED, &ptep->pte);
359}
360
361static inline
362void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
363{
364 pte_val(*ptep) &= ~(__PAGE_PROT_WRITE|__PAGE_PROT_UWAUX);
365}
366
367static inline void ptep_mkdirty(pte_t *ptep)
368{
369 set_bit(_PAGE_BIT_DIRTY, &ptep->pte);
370}
371
372/*
373 * Macro to mark a page protection value as "uncacheable". On processors which
374 * do not support it, this is a no-op.
375 */
376#define pgprot_noncached(prot) __pgprot(pgprot_val(prot) | _PAGE_CACHE)
377
378
379/*
380 * Conversion functions: convert a page and protection to a page entry,
381 * and a page entry and page directory to the page they refer to.
382 */
383
384#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
385#define mk_pte_huge(entry) \
386 ((entry).pte |= _PAGE_PRESENT | _PAGE_PSE | _PAGE_VALID)
387
388static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
389{
390 pte_val(pte) &= _PAGE_CHG_MASK;
391 pte_val(pte) |= pgprot_val(newprot);
392 return pte;
393}
394
395#define page_pte(page) page_pte_prot((page), __pgprot(0))
396
397#define pmd_page_kernel(pmd) \
398 ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
399
400#define pmd_page(pmd) pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)
401
402#define pmd_large(pmd) \
403 ((pmd_val(pmd) & (_PAGE_PSE | _PAGE_PRESENT)) == \
404 (_PAGE_PSE | _PAGE_PRESENT))
405
406/*
407 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
408 *
409 * this macro returns the index of the entry in the pgd page which would
410 * control the given virtual address
411 */
412#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
413
414/*
415 * pgd_offset() returns a (pgd_t *)
416 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
417 */
418#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
419
420/*
421 * a shortcut which implies the use of the kernel's pgd, instead
422 * of a process's
423 */
424#define pgd_offset_k(address) pgd_offset(&init_mm, address)
425
426/*
427 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
428 *
429 * this macro returns the index of the entry in the pmd page which would
430 * control the given virtual address
431 */
432#define pmd_index(address) \
433 (((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
434
435/*
436 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
437 *
438 * this macro returns the index of the entry in the pte page which would
439 * control the given virtual address
440 */
441#define pte_index(address) \
442 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
443
444#define pte_offset_kernel(dir, address) \
445 ((pte_t *) pmd_page_kernel(*(dir)) + pte_index(address))
446
447/*
448 * Make a given kernel text page executable/non-executable.
449 * Returns the previous executability setting of that page (which
450 * is used to restore the previous state). Used by the SMP bootup code.
451 * NOTE: this is an __init function for security reasons.
452 */
453static inline int set_kernel_exec(unsigned long vaddr, int enable)
454{
455 return 0;
456}
457
458#define pte_offset_map(dir, address) \
459 ((pte_t *) page_address(pmd_page(*(dir))) + pte_index(address))
460#define pte_offset_map_nested(dir, address) pte_offset_map(dir, address)
461#define pte_unmap(pte) do {} while (0)
462#define pte_unmap_nested(pte) do {} while (0)
463
464/*
465 * The MN10300 has external MMU info in the form of a TLB: this is adapted from
466 * the kernel page tables containing the necessary information by tlb-mn10300.S
467 */
468extern void update_mmu_cache(struct vm_area_struct *vma,
469 unsigned long address, pte_t pte);
470
471#endif /* !__ASSEMBLY__ */
472
473#define kern_addr_valid(addr) (1)
474
475#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
476 remap_pfn_range((vma), (vaddr), (pfn), (size), (prot))
477
478#define MK_IOSPACE_PFN(space, pfn) (pfn)
479#define GET_IOSPACE(pfn) 0
480#define GET_PFN(pfn) (pfn)
481
482#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
483#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
484#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
485#define __HAVE_ARCH_PTEP_SET_WRPROTECT
486#define __HAVE_ARCH_PTEP_MKDIRTY
487#define __HAVE_ARCH_PTE_SAME
488#include <asm-generic/pgtable.h>
489
490#endif /* !__ASSEMBLY__ */
491
492#endif /* _ASM_PGTABLE_H */
diff --git a/arch/mn10300/include/asm/pio-regs.h b/arch/mn10300/include/asm/pio-regs.h
new file mode 100644
index 000000000000..96bc8182d0ba
--- /dev/null
+++ b/arch/mn10300/include/asm/pio-regs.h
@@ -0,0 +1,233 @@
1/* MN10300 On-board I/O port module registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PIO_REGS_H
12#define _ASM_PIO_REGS_H
13
14#include <asm/cpu-regs.h>
15#include <asm/intctl-regs.h>
16
17#ifdef __KERNEL__
18
19/* I/O port 0 */
20#define P0MD __SYSREG(0xdb000000, u16) /* mode reg */
21#define P0MD_0 0x0003 /* mask */
22#define P0MD_0_IN 0x0000 /* input mode */
23#define P0MD_0_OUT 0x0001 /* output mode */
24#define P0MD_0_TM0IO 0x0002 /* timer 0 I/O mode */
25#define P0MD_0_EYECLK 0x0003 /* test signal output (clock) */
26#define P0MD_1 0x000c
27#define P0MD_1_IN 0x0000
28#define P0MD_1_OUT 0x0004
29#define P0MD_1_TM1IO 0x0008 /* timer 1 I/O mode */
30#define P0MD_1_EYED 0x000c /* test signal output (data) */
31#define P0MD_2 0x0030
32#define P0MD_2_IN 0x0000
33#define P0MD_2_OUT 0x0010
34#define P0MD_2_TM2IO 0x0020 /* timer 2 I/O mode */
35#define P0MD_3 0x00c0
36#define P0MD_3_IN 0x0000
37#define P0MD_3_OUT 0x0040
38#define P0MD_3_TM3IO 0x0080 /* timer 3 I/O mode */
39#define P0MD_4 0x0300
40#define P0MD_4_IN 0x0000
41#define P0MD_4_OUT 0x0100
42#define P0MD_4_TM4IO 0x0200 /* timer 4 I/O mode */
43#define P0MD_4_XCTS 0x0300 /* XCTS input for serial port 2 */
44#define P0MD_5 0x0c00
45#define P0MD_5_IN 0x0000
46#define P0MD_5_OUT 0x0400
47#define P0MD_5_TM5IO 0x0800 /* timer 5 I/O mode */
48#define P0MD_6 0x3000
49#define P0MD_6_IN 0x0000
50#define P0MD_6_OUT 0x1000
51#define P0MD_6_TM6IOA 0x2000 /* timer 6 I/O mode A */
52#define P0MD_7 0xc000
53#define P0MD_7_IN 0x0000
54#define P0MD_7_OUT 0x4000
55#define P0MD_7_TM6IOB 0x8000 /* timer 6 I/O mode B */
56
57#define P0IN __SYSREG(0xdb000004, u8) /* in reg */
58#define P0OUT __SYSREG(0xdb000008, u8) /* out reg */
59
60#define P0TMIO __SYSREG(0xdb00000c, u8) /* TM pin I/O control reg */
61#define P0TMIO_TM0_IN 0x00
62#define P0TMIO_TM0_OUT 0x01
63#define P0TMIO_TM1_IN 0x00
64#define P0TMIO_TM1_OUT 0x02
65#define P0TMIO_TM2_IN 0x00
66#define P0TMIO_TM2_OUT 0x04
67#define P0TMIO_TM3_IN 0x00
68#define P0TMIO_TM3_OUT 0x08
69#define P0TMIO_TM4_IN 0x00
70#define P0TMIO_TM4_OUT 0x10
71#define P0TMIO_TM5_IN 0x00
72#define P0TMIO_TM5_OUT 0x20
73#define P0TMIO_TM6A_IN 0x00
74#define P0TMIO_TM6A_OUT 0x40
75#define P0TMIO_TM6B_IN 0x00
76#define P0TMIO_TM6B_OUT 0x80
77
78/* I/O port 1 */
79#define P1MD __SYSREG(0xdb000100, u16) /* mode reg */
80#define P1MD_0 0x0003 /* mask */
81#define P1MD_0_IN 0x0000 /* input mode */
82#define P1MD_0_OUT 0x0001 /* output mode */
83#define P1MD_0_TM7IO 0x0002 /* timer 7 I/O mode */
84#define P1MD_0_ADTRG 0x0003 /* A/D converter trigger mode */
85#define P1MD_1 0x000c
86#define P1MD_1_IN 0x0000
87#define P1MD_1_OUT 0x0004
88#define P1MD_1_TM8IO 0x0008 /* timer 8 I/O mode */
89#define P1MD_1_XDMR0 0x000c /* DMA request input 0 mode */
90#define P1MD_2 0x0030
91#define P1MD_2_IN 0x0000
92#define P1MD_2_OUT 0x0010
93#define P1MD_2_TM9IO 0x0020 /* timer 9 I/O mode */
94#define P1MD_2_XDMR1 0x0030 /* DMA request input 1 mode */
95#define P1MD_3 0x00c0
96#define P1MD_3_IN 0x0000
97#define P1MD_3_OUT 0x0040
98#define P1MD_3_TM10IO 0x0080 /* timer 10 I/O mode */
99#define P1MD_3_FRQS0 0x00c0 /* CPU clock multiplier setting input 0 mode */
100#define P1MD_4 0x0300
101#define P1MD_4_IN 0x0000
102#define P1MD_4_OUT 0x0100
103#define P1MD_4_TM11IO 0x0200 /* timer 11 I/O mode */
104#define P1MD_4_FRQS1 0x0300 /* CPU clock multiplier setting input 1 mode */
105
106#define P1IN __SYSREG(0xdb000104, u8) /* in reg */
107#define P1OUT __SYSREG(0xdb000108, u8) /* out reg */
108#define P1TMIO __SYSREG(0xdb00010c, u8) /* TM pin I/O control reg */
109#define P1TMIO_TM11_IN 0x00
110#define P1TMIO_TM11_OUT 0x01
111#define P1TMIO_TM10_IN 0x00
112#define P1TMIO_TM10_OUT 0x02
113#define P1TMIO_TM9_IN 0x00
114#define P1TMIO_TM9_OUT 0x04
115#define P1TMIO_TM8_IN 0x00
116#define P1TMIO_TM8_OUT 0x08
117#define P1TMIO_TM7_IN 0x00
118#define P1TMIO_TM7_OUT 0x10
119
120/* I/O port 2 */
121#define P2MD __SYSREG(0xdb000200, u16) /* mode reg */
122#define P2MD_0 0x0003 /* mask */
123#define P2MD_0_IN 0x0000 /* input mode */
124#define P2MD_0_OUT 0x0001 /* output mode */
125#define P2MD_0_BOOTBW 0x0003 /* boot bus width selector mode */
126#define P2MD_1 0x000c
127#define P2MD_1_IN 0x0000
128#define P2MD_1_OUT 0x0004
129#define P2MD_1_BOOTSEL 0x000c /* boot device selector mode */
130#define P2MD_2 0x0030
131#define P2MD_2_IN 0x0000
132#define P2MD_2_OUT 0x0010
133#define P2MD_3 0x00c0
134#define P2MD_3_IN 0x0000
135#define P2MD_3_OUT 0x0040
136#define P2MD_3_CKIO 0x00c0 /* mode */
137#define P2MD_4 0x0300
138#define P2MD_4_IN 0x0000
139#define P2MD_4_OUT 0x0100
140#define P2MD_4_CMOD 0x0300 /* mode */
141
142#define P2IN __SYSREG(0xdb000204, u8) /* in reg */
143#define P2OUT __SYSREG(0xdb000208, u8) /* out reg */
144#define P2TMIO __SYSREG(0xdb00020c, u8) /* TM pin I/O control reg */
145
146/* I/O port 3 */
147#define P3MD __SYSREG(0xdb000300, u16) /* mode reg */
148#define P3MD_0 0x0003 /* mask */
149#define P3MD_0_IN 0x0000 /* input mode */
150#define P3MD_0_OUT 0x0001 /* output mode */
151#define P3MD_0_AFRXD 0x0002 /* AFR interface mode */
152#define P3MD_1 0x000c
153#define P3MD_1_IN 0x0000
154#define P3MD_1_OUT 0x0004
155#define P3MD_1_AFTXD 0x0008 /* AFR interface mode */
156#define P3MD_2 0x0030
157#define P3MD_2_IN 0x0000
158#define P3MD_2_OUT 0x0010
159#define P3MD_2_AFSCLK 0x0020 /* AFR interface mode */
160#define P3MD_3 0x00c0
161#define P3MD_3_IN 0x0000
162#define P3MD_3_OUT 0x0040
163#define P3MD_3_AFFS 0x0080 /* AFR interface mode */
164#define P3MD_4 0x0300
165#define P3MD_4_IN 0x0000
166#define P3MD_4_OUT 0x0100
167#define P3MD_4_AFEHC 0x0200 /* AFR interface mode */
168
169#define P3IN __SYSREG(0xdb000304, u8) /* in reg */
170#define P3OUT __SYSREG(0xdb000308, u8) /* out reg */
171
172/* I/O port 4 */
173#define P4MD __SYSREG(0xdb000400, u16) /* mode reg */
174#define P4MD_0 0x0003 /* mask */
175#define P4MD_0_IN 0x0000 /* input mode */
176#define P4MD_0_OUT 0x0001 /* output mode */
177#define P4MD_0_SCL0 0x0002 /* I2C/serial mode */
178#define P4MD_1 0x000c
179#define P4MD_1_IN 0x0000
180#define P4MD_1_OUT 0x0004
181#define P4MD_1_SDA0 0x0008
182#define P4MD_2 0x0030
183#define P4MD_2_IN 0x0000
184#define P4MD_2_OUT 0x0010
185#define P4MD_2_SCL1 0x0020
186#define P4MD_3 0x00c0
187#define P4MD_3_IN 0x0000
188#define P4MD_3_OUT 0x0040
189#define P4MD_3_SDA1 0x0080
190#define P4MD_4 0x0300
191#define P4MD_4_IN 0x0000
192#define P4MD_4_OUT 0x0100
193#define P4MD_4_SBO0 0x0200
194#define P4MD_5 0x0c00
195#define P4MD_5_IN 0x0000
196#define P4MD_5_OUT 0x0400
197#define P4MD_5_SBO1 0x0800
198#define P4MD_6 0x3000
199#define P4MD_6_IN 0x0000
200#define P4MD_6_OUT 0x1000
201#define P4MD_6_SBT0 0x2000
202#define P4MD_7 0xc000
203#define P4MD_7_IN 0x0000
204#define P4MD_7_OUT 0x4000
205#define P4MD_7_SBT1 0x8000
206
207#define P4IN __SYSREG(0xdb000404, u8) /* in reg */
208#define P4OUT __SYSREG(0xdb000408, u8) /* out reg */
209
210/* I/O port 5 */
211#define P5MD __SYSREG(0xdb000500, u16) /* mode reg */
212#define P5MD_0 0x0003 /* mask */
213#define P5MD_0_IN 0x0000 /* input mode */
214#define P5MD_0_OUT 0x0001 /* output mode */
215#define P5MD_0_IRTXD 0x0002 /* IrDA mode */
216#define P5MD_0_SOUT 0x0004 /* serial mode */
217#define P5MD_1 0x000c
218#define P5MD_1_IN 0x0000
219#define P5MD_1_OUT 0x0004
220#define P5MD_1_IRRXDS 0x0008 /* IrDA mode */
221#define P5MD_1_SIN 0x000c /* serial mode */
222#define P5MD_2 0x0030
223#define P5MD_2_IN 0x0000
224#define P5MD_2_OUT 0x0010
225#define P5MD_2_IRRXDF 0x0020 /* IrDA mode */
226
227#define P5IN __SYSREG(0xdb000504, u8) /* in reg */
228#define P5OUT __SYSREG(0xdb000508, u8) /* out reg */
229
230
231#endif /* __KERNEL__ */
232
233#endif /* _ASM_PIO_REGS_H */
diff --git a/arch/mn10300/include/asm/poll.h b/arch/mn10300/include/asm/poll.h
new file mode 100644
index 000000000000..c98509d3149e
--- /dev/null
+++ b/arch/mn10300/include/asm/poll.h
@@ -0,0 +1 @@
#include <asm-generic/poll.h>
diff --git a/arch/mn10300/include/asm/posix_types.h b/arch/mn10300/include/asm/posix_types.h
new file mode 100644
index 000000000000..077567c37798
--- /dev/null
+++ b/arch/mn10300/include/asm/posix_types.h
@@ -0,0 +1,132 @@
1/* MN10300 POSIX types
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_POSIX_TYPES_H
12#define _ASM_POSIX_TYPES_H
13
14/*
15 * This file is generally used by user-level software, so you need to
16 * be a little careful about namespace pollution etc. Also, we cannot
17 * assume GCC is being used.
18 */
19
20typedef unsigned long __kernel_ino_t;
21typedef unsigned short __kernel_mode_t;
22typedef unsigned short __kernel_nlink_t;
23typedef long __kernel_off_t;
24typedef int __kernel_pid_t;
25typedef unsigned short __kernel_ipc_pid_t;
26typedef unsigned short __kernel_uid_t;
27typedef unsigned short __kernel_gid_t;
28typedef unsigned long __kernel_size_t;
29typedef long __kernel_ssize_t;
30typedef int __kernel_ptrdiff_t;
31typedef long __kernel_time_t;
32typedef long __kernel_suseconds_t;
33typedef long __kernel_clock_t;
34typedef int __kernel_timer_t;
35typedef int __kernel_clockid_t;
36typedef int __kernel_daddr_t;
37typedef char * __kernel_caddr_t;
38typedef unsigned short __kernel_uid16_t;
39typedef unsigned short __kernel_gid16_t;
40typedef unsigned int __kernel_uid32_t;
41typedef unsigned int __kernel_gid32_t;
42
43typedef unsigned short __kernel_old_uid_t;
44typedef unsigned short __kernel_old_gid_t;
45typedef unsigned short __kernel_old_dev_t;
46
47#ifdef __GNUC__
48typedef long long __kernel_loff_t;
49#endif
50
51typedef struct {
52#if defined(__KERNEL__) || defined(__USE_ALL)
53 int val[2];
54#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
55 int __val[2];
56#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
57} __kernel_fsid_t;
58
59#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)
60
61#undef __FD_SET
62static inline void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp)
63{
64 unsigned long __tmp = __fd / __NFDBITS;
65 unsigned long __rem = __fd % __NFDBITS;
66 __fdsetp->fds_bits[__tmp] |= (1UL<<__rem);
67}
68
69#undef __FD_CLR
70static inline void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp)
71{
72 unsigned long __tmp = __fd / __NFDBITS;
73 unsigned long __rem = __fd % __NFDBITS;
74 __fdsetp->fds_bits[__tmp] &= ~(1UL<<__rem);
75}
76
77
78#undef __FD_ISSET
79static inline int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p)
80{
81 unsigned long __tmp = __fd / __NFDBITS;
82 unsigned long __rem = __fd % __NFDBITS;
83 return (__p->fds_bits[__tmp] & (1UL<<__rem)) != 0;
84}
85
86/*
87 * This will unroll the loop for the normal constant case (8 ints,
88 * for a 256-bit fd_set)
89 */
90#undef __FD_ZERO
91static inline void __FD_ZERO(__kernel_fd_set *__p)
92{
93 unsigned long *__tmp = __p->fds_bits;
94 int __i;
95
96 if (__builtin_constant_p(__FDSET_LONGS)) {
97 switch (__FDSET_LONGS) {
98 case 16:
99 __tmp[ 0] = 0; __tmp[ 1] = 0;
100 __tmp[ 2] = 0; __tmp[ 3] = 0;
101 __tmp[ 4] = 0; __tmp[ 5] = 0;
102 __tmp[ 6] = 0; __tmp[ 7] = 0;
103 __tmp[ 8] = 0; __tmp[ 9] = 0;
104 __tmp[10] = 0; __tmp[11] = 0;
105 __tmp[12] = 0; __tmp[13] = 0;
106 __tmp[14] = 0; __tmp[15] = 0;
107 return;
108
109 case 8:
110 __tmp[ 0] = 0; __tmp[ 1] = 0;
111 __tmp[ 2] = 0; __tmp[ 3] = 0;
112 __tmp[ 4] = 0; __tmp[ 5] = 0;
113 __tmp[ 6] = 0; __tmp[ 7] = 0;
114 return;
115
116 case 4:
117 __tmp[ 0] = 0; __tmp[ 1] = 0;
118 __tmp[ 2] = 0; __tmp[ 3] = 0;
119 return;
120 }
121 }
122 __i = __FDSET_LONGS;
123 while (__i) {
124 __i--;
125 *__tmp = 0;
126 __tmp++;
127 }
128}
129
130#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */
131
132#endif /* _ASM_POSIX_TYPES_H */
diff --git a/arch/mn10300/include/asm/processor.h b/arch/mn10300/include/asm/processor.h
new file mode 100644
index 000000000000..73239271873d
--- /dev/null
+++ b/arch/mn10300/include/asm/processor.h
@@ -0,0 +1,186 @@
1/* MN10300 Processor specifics
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Written by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12
13#ifndef _ASM_PROCESSOR_H
14#define _ASM_PROCESSOR_H
15
16#include <asm/page.h>
17#include <asm/ptrace.h>
18#include <asm/cpu-regs.h>
19#include <linux/threads.h>
20
21/* Forward declaration, a strange C thing */
22struct task_struct;
23struct mm_struct;
24
25/*
26 * Default implementation of macro that returns current
27 * instruction pointer ("program counter").
28 */
29#define current_text_addr() \
30({ \
31 void *__pc; \
32 asm("mov pc,%0" : "=a"(__pc)); \
33 __pc; \
34})
35
36extern void show_registers(struct pt_regs *regs);
37
38/*
39 * CPU type and hardware bug flags. Kept separately for each CPU.
40 * Members of this structure are referenced in head.S, so think twice
41 * before touching them. [mj]
42 */
43
44struct mn10300_cpuinfo {
45 int type;
46 unsigned long loops_per_sec;
47 char hard_math;
48 unsigned long *pgd_quick;
49 unsigned long *pte_quick;
50 unsigned long pgtable_cache_sz;
51};
52
53extern struct mn10300_cpuinfo boot_cpu_data;
54
55#define cpu_data &boot_cpu_data
56#define current_cpu_data boot_cpu_data
57
58extern void identify_cpu(struct mn10300_cpuinfo *);
59extern void print_cpu_info(struct mn10300_cpuinfo *);
60extern void dodgy_tsc(void);
61#define cpu_relax() barrier()
62
63/*
64 * User space process size: 1.75GB (default).
65 */
66#define TASK_SIZE 0x70000000
67
68/*
69 * Where to put the userspace stack by default
70 */
71#define STACK_TOP 0x70000000
72#define STACK_TOP_MAX STACK_TOP
73
74/* This decides where the kernel will search for a free chunk of vm
75 * space during mmap's.
76 */
77#define TASK_UNMAPPED_BASE 0x30000000
78
79typedef struct {
80 unsigned long seg;
81} mm_segment_t;
82
83struct fpu_state_struct {
84 unsigned long fs[32]; /* fpu registers */
85 unsigned long fpcr; /* fpu control register */
86};
87
88struct thread_struct {
89 struct pt_regs *uregs; /* userspace register frame */
90 unsigned long pc; /* kernel PC */
91 unsigned long sp; /* kernel SP */
92 unsigned long a3; /* kernel FP */
93 unsigned long wchan;
94 unsigned long usp;
95 struct pt_regs *__frame;
96 unsigned long fpu_flags;
97#define THREAD_USING_FPU 0x00000001 /* T if this task is using the FPU */
98 struct fpu_state_struct fpu_state;
99};
100
101#define INIT_THREAD \
102{ \
103 .uregs = init_uregs, \
104 .pc = 0, \
105 .sp = 0, \
106 .a3 = 0, \
107 .wchan = 0, \
108 .__frame = NULL, \
109}
110
111#define INIT_MMAP \
112{ &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, \
113 NULL, NULL }
114
115/*
116 * do necessary setup to start up a newly executed thread
117 * - need to discard the frame stacked by the kernel thread invoking the execve
118 * syscall (see RESTORE_ALL macro)
119 */
120#define start_thread(regs, new_pc, new_sp) do { \
121 set_fs(USER_DS); \
122 __frame = current->thread.uregs; \
123 __frame->epsw = EPSW_nSL | EPSW_IE | EPSW_IM; \
124 __frame->pc = new_pc; \
125 __frame->sp = new_sp; \
126} while (0)
127
128/* Free all resources held by a thread. */
129extern void release_thread(struct task_struct *);
130
131/* Prepare to copy thread state - unlazy all lazy status */
132extern void prepare_to_copy(struct task_struct *tsk);
133
134/*
135 * create a kernel thread without removing it from tasklists
136 */
137extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
138
139/*
140 * Return saved PC of a blocked thread.
141 */
142extern unsigned long thread_saved_pc(struct task_struct *tsk);
143
144unsigned long get_wchan(struct task_struct *p);
145
146#define task_pt_regs(task) \
147({ \
148 struct pt_regs *__regs__; \
149 __regs__ = (struct pt_regs *) (KSTK_TOP(task_stack_page(task)) - 8); \
150 __regs__ - 1; \
151})
152
153#define KSTK_EIP(task) (task_pt_regs(task)->pc)
154#define KSTK_ESP(task) (task_pt_regs(task)->sp)
155
156#define KSTK_TOP(info) \
157({ \
158 (unsigned long)(info) + THREAD_SIZE; \
159})
160
161#define ARCH_HAS_PREFETCH
162#define ARCH_HAS_PREFETCHW
163
164static inline void prefetch(const void *x)
165{
166#ifndef CONFIG_MN10300_CACHE_DISABLED
167#ifdef CONFIG_MN10300_PROC_MN103E010
168 asm volatile ("nop; nop; dcpf (%0)" : : "r"(x));
169#else
170 asm volatile ("dcpf (%0)" : : "r"(x));
171#endif
172#endif
173}
174
175static inline void prefetchw(const void *x)
176{
177#ifndef CONFIG_MN10300_CACHE_DISABLED
178#ifdef CONFIG_MN10300_PROC_MN103E010
179 asm volatile ("nop; nop; dcpf (%0)" : : "r"(x));
180#else
181 asm volatile ("dcpf (%0)" : : "r"(x));
182#endif
183#endif
184}
185
186#endif /* _ASM_PROCESSOR_H */
diff --git a/arch/mn10300/include/asm/ptrace.h b/arch/mn10300/include/asm/ptrace.h
new file mode 100644
index 000000000000..7b06cc623d8b
--- /dev/null
+++ b/arch/mn10300/include/asm/ptrace.h
@@ -0,0 +1,103 @@
1/* MN10300 Exception frame layout and ptrace constants
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_PTRACE_H
12#define _ASM_PTRACE_H
13
14#define PT_A3 0
15#define PT_A2 1
16#define PT_D3 2
17#define PT_D2 3
18#define PT_MCVF 4
19#define PT_MCRL 5
20#define PT_MCRH 6
21#define PT_MDRQ 7
22#define PT_E1 8
23#define PT_E0 9
24#define PT_E7 10
25#define PT_E6 11
26#define PT_E5 12
27#define PT_E4 13
28#define PT_E3 14
29#define PT_E2 15
30#define PT_SP 16
31#define PT_LAR 17
32#define PT_LIR 18
33#define PT_MDR 19
34#define PT_A1 20
35#define PT_A0 21
36#define PT_D1 22
37#define PT_D0 23
38#define PT_ORIG_D0 24
39#define PT_EPSW 25
40#define PT_PC 26
41#define NR_PTREGS 27
42
43#ifndef __ASSEMBLY__
44/*
45 * This defines the way registers are stored in the event of an exception
46 * - the strange order is due to the MOVM instruction
47 */
48struct pt_regs {
49 unsigned long a3; /* syscall arg 3 */
50 unsigned long a2; /* syscall arg 4 */
51 unsigned long d3; /* syscall arg 5 */
52 unsigned long d2; /* syscall arg 6 */
53 unsigned long mcvf;
54 unsigned long mcrl;
55 unsigned long mcrh;
56 unsigned long mdrq;
57 unsigned long e1;
58 unsigned long e0;
59 unsigned long e7;
60 unsigned long e6;
61 unsigned long e5;
62 unsigned long e4;
63 unsigned long e3;
64 unsigned long e2;
65 unsigned long sp;
66 unsigned long lar;
67 unsigned long lir;
68 unsigned long mdr;
69 unsigned long a1;
70 unsigned long a0; /* syscall arg 1 */
71 unsigned long d1; /* syscall arg 2 */
72 unsigned long d0; /* syscall ret */
73 struct pt_regs *next; /* next frame pointer */
74 unsigned long orig_d0; /* syscall number */
75 unsigned long epsw;
76 unsigned long pc;
77};
78#endif
79
80extern struct pt_regs *__frame; /* current frame pointer */
81
82/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
83#define PTRACE_GETREGS 12
84#define PTRACE_SETREGS 13
85#define PTRACE_GETFPREGS 14
86#define PTRACE_SETFPREGS 15
87
88/* options set using PTRACE_SETOPTIONS */
89#define PTRACE_O_TRACESYSGOOD 0x00000001
90
91#if defined(__KERNEL__)
92
93#if !defined(__ASSEMBLY__)
94#define user_mode(regs) (((regs)->epsw & EPSW_nSL) == EPSW_nSL)
95#define instruction_pointer(regs) ((regs)->pc)
96extern void show_regs(struct pt_regs *);
97#endif /* !__ASSEMBLY */
98
99#define profile_pc(regs) ((regs)->pc)
100
101#endif /* __KERNEL__ */
102
103#endif /* _ASM_PTRACE_H */
diff --git a/arch/mn10300/include/asm/reset-regs.h b/arch/mn10300/include/asm/reset-regs.h
new file mode 100644
index 000000000000..174523d50132
--- /dev/null
+++ b/arch/mn10300/include/asm/reset-regs.h
@@ -0,0 +1,64 @@
1/* MN10300 Reset controller and watchdog timer definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_RESET_REGS_H
13#define _ASM_RESET_REGS_H
14
15#include <asm/cpu-regs.h>
16#include <asm/exceptions.h>
17
18#ifdef __KERNEL__
19
20#ifdef CONFIG_MN10300_WD_TIMER
21#define ARCH_HAS_NMI_WATCHDOG /* See include/linux/nmi.h */
22#endif
23
24/*
25 * watchdog timer registers
26 */
27#define WDBC __SYSREGC(0xc0001000, u8) /* watchdog binary counter reg */
28
29#define WDCTR __SYSREG(0xc0001002, u8) /* watchdog timer control reg */
30#define WDCTR_WDCK 0x07 /* clock source selection */
31#define WDCTR_WDCK_256th 0x00 /* - OSCI/256 */
32#define WDCTR_WDCK_1024th 0x01 /* - OSCI/1024 */
33#define WDCTR_WDCK_2048th 0x02 /* - OSCI/2048 */
34#define WDCTR_WDCK_16384th 0x03 /* - OSCI/16384 */
35#define WDCTR_WDCK_65536th 0x04 /* - OSCI/65536 */
36#define WDCTR_WDRST 0x40 /* binary counter reset */
37#define WDCTR_WDCNE 0x80 /* watchdog timer enable */
38
39#define RSTCTR __SYSREG(0xc0001004, u8) /* reset control reg */
40#define RSTCTR_CHIPRST 0x01 /* chip reset */
41#define RSTCTR_DBFRST 0x02 /* double fault reset flag */
42#define RSTCTR_WDTRST 0x04 /* watchdog timer reset flag */
43#define RSTCTR_WDREN 0x08 /* watchdog timer reset enable */
44
45#ifndef __ASSEMBLY__
46
47static inline void mn10300_proc_hard_reset(void)
48{
49 RSTCTR &= ~RSTCTR_CHIPRST;
50 RSTCTR |= RSTCTR_CHIPRST;
51}
52
53extern unsigned int watchdog_alert_counter;
54
55extern void watchdog_go(void);
56extern asmlinkage void watchdog_handler(void);
57extern asmlinkage
58void watchdog_interrupt(struct pt_regs *, enum exception_code);
59
60#endif
61
62#endif /* __KERNEL__ */
63
64#endif /* _ASM_RESET_REGS_H */
diff --git a/arch/mn10300/include/asm/resource.h b/arch/mn10300/include/asm/resource.h
new file mode 100644
index 000000000000..04bc4db8921b
--- /dev/null
+++ b/arch/mn10300/include/asm/resource.h
@@ -0,0 +1 @@
#include <asm-generic/resource.h>
diff --git a/arch/mn10300/include/asm/rtc-regs.h b/arch/mn10300/include/asm/rtc-regs.h
new file mode 100644
index 000000000000..c42deefaec11
--- /dev/null
+++ b/arch/mn10300/include/asm/rtc-regs.h
@@ -0,0 +1,86 @@
1/* MN10300 on-chip Real-Time Clock registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_RTC_REGS_H
12#define _ASM_RTC_REGS_H
13
14#include <asm/intctl-regs.h>
15
16#ifdef __KERNEL__
17
18#define RTSCR __SYSREG(0xd8600000, u8) /* RTC seconds count reg */
19#define RTSAR __SYSREG(0xd8600001, u8) /* RTC seconds alarm reg */
20#define RTMCR __SYSREG(0xd8600002, u8) /* RTC minutes count reg */
21#define RTMAR __SYSREG(0xd8600003, u8) /* RTC minutes alarm reg */
22#define RTHCR __SYSREG(0xd8600004, u8) /* RTC hours count reg */
23#define RTHAR __SYSREG(0xd8600005, u8) /* RTC hours alarm reg */
24#define RTDWCR __SYSREG(0xd8600006, u8) /* RTC day of the week count reg */
25#define RTDMCR __SYSREG(0xd8600007, u8) /* RTC days count reg */
26#define RTMTCR __SYSREG(0xd8600008, u8) /* RTC months count reg */
27#define RTYCR __SYSREG(0xd8600009, u8) /* RTC years count reg */
28
29#define RTCRA __SYSREG(0xd860000a, u8)/* RTC control reg A */
30#define RTCRA_RS 0x0f /* periodic timer interrupt cycle setting */
31#define RTCRA_RS_NONE 0x00 /* - off */
32#define RTCRA_RS_3_90625ms 0x01 /* - 3.90625ms (1/256s) */
33#define RTCRA_RS_7_8125ms 0x02 /* - 7.8125ms (1/128s) */
34#define RTCRA_RS_122_070us 0x03 /* - 122.070us (1/8192s) */
35#define RTCRA_RS_244_141us 0x04 /* - 244.141us (1/4096s) */
36#define RTCRA_RS_488_281us 0x05 /* - 488.281us (1/2048s) */
37#define RTCRA_RS_976_5625us 0x06 /* - 976.5625us (1/1024s) */
38#define RTCRA_RS_1_953125ms 0x07 /* - 1.953125ms (1/512s) */
39#define RTCRA_RS_3_90624ms 0x08 /* - 3.90624ms (1/256s) */
40#define RTCRA_RS_7_8125ms_b 0x09 /* - 7.8125ms (1/128s) */
41#define RTCRA_RS_15_625ms 0x0a /* - 15.625ms (1/64s) */
42#define RTCRA_RS_31_25ms 0x0b /* - 31.25ms (1/32s) */
43#define RTCRA_RS_62_5ms 0x0c /* - 62.5ms (1/16s) */
44#define RTCRA_RS_125ms 0x0d /* - 125ms (1/8s) */
45#define RTCRA_RS_250ms 0x0e /* - 250ms (1/4s) */
46#define RTCRA_RS_500ms 0x0f /* - 500ms (1/2s) */
47#define RTCRA_DVR 0x40 /* divider reset */
48#define RTCRA_UIP 0x80 /* clock update flag */
49
50#define RTCRB __SYSREG(0xd860000b, u8) /* RTC control reg B */
51#define RTCRB_DSE 0x01 /* daylight savings time enable */
52#define RTCRB_TM 0x02 /* time format */
53#define RTCRB_TM_12HR 0x00 /* - 12 hour format */
54#define RTCRB_TM_24HR 0x02 /* - 24 hour format */
55#define RTCRB_DM 0x04 /* numeric value format */
56#define RTCRB_DM_BCD 0x00 /* - BCD */
57#define RTCRB_DM_BINARY 0x04 /* - binary */
58#define RTCRB_UIE 0x10 /* update interrupt disable */
59#define RTCRB_AIE 0x20 /* alarm interrupt disable */
60#define RTCRB_PIE 0x40 /* periodic interrupt disable */
61#define RTCRB_SET 0x80 /* clock update enable */
62
63#define RTSRC __SYSREG(0xd860000c, u8) /* RTC status reg C */
64#define RTSRC_UF 0x10 /* update end interrupt flag */
65#define RTSRC_AF 0x20 /* alarm interrupt flag */
66#define RTSRC_PF 0x40 /* periodic interrupt flag */
67#define RTSRC_IRQF 0x80 /* interrupt flag */
68
69#define RTIRQ 32
70#define RTICR GxICR(RTIRQ)
71
72/*
73 * MC146818 RTC compatibility defs for the MN10300 on-chip RTC
74 */
75#define RTC_PORT(x) 0xd8600000
76#define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */
77
78#define CMOS_READ(addr) __SYSREG(0xd8600000 + (addr), u8)
79#define CMOS_WRITE(val, addr) \
80 do { __SYSREG(0xd8600000 + (addr), u8) = val; } while (0)
81
82#define RTC_IRQ RTIRQ
83
84#endif /* __KERNEL__ */
85
86#endif /* _ASM_RTC_REGS_H */
diff --git a/arch/mn10300/include/asm/rtc.h b/arch/mn10300/include/asm/rtc.h
new file mode 100644
index 000000000000..c295194cc703
--- /dev/null
+++ b/arch/mn10300/include/asm/rtc.h
@@ -0,0 +1,41 @@
1/* MN10300 Real time clock definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_RTC_H
12#define _ASM_RTC_H
13
14#ifdef CONFIG_MN10300_RTC
15
16#include <linux/init.h>
17
18extern void check_rtc_time(void);
19extern void __init calibrate_clock(void);
20extern unsigned long __init get_initial_rtc_time(void);
21
22#else /* !CONFIG_MN10300_RTC */
23
24static inline void check_rtc_time(void)
25{
26}
27
28static inline void calibrate_clock(void)
29{
30}
31
32static inline unsigned long get_initial_rtc_time(void)
33{
34 return 0;
35}
36
37#endif /* !CONFIG_MN10300_RTC */
38
39#include <asm-generic/rtc.h>
40
41#endif /* _ASM_RTC_H */
diff --git a/arch/mn10300/include/asm/scatterlist.h b/arch/mn10300/include/asm/scatterlist.h
new file mode 100644
index 000000000000..67535901b9ff
--- /dev/null
+++ b/arch/mn10300/include/asm/scatterlist.h
@@ -0,0 +1,55 @@
1/* MN10300 Scatterlist definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SCATTERLIST_H
12#define _ASM_SCATTERLIST_H
13
14#include <asm/types.h>
15
16/*
17 * Drivers must set either ->address or (preferred) page and ->offset
18 * to indicate where data must be transferred to/from.
19 *
20 * Using page is recommended since it handles highmem data as well as
21 * low mem. ->address is restricted to data which has a virtual mapping, and
22 * it will go away in the future. Updating to page can be automated very
23 * easily -- something like
24 *
25 * sg->address = some_ptr;
26 *
27 * can be rewritten as
28 *
29 * sg_set_page(virt_to_page(some_ptr));
30 * sg->offset = (unsigned long) some_ptr & ~PAGE_MASK;
31 *
32 * and that's it. There's no excuse for not highmem enabling YOUR driver. /jens
33 */
34struct scatterlist {
35#ifdef CONFIG_DEBUG_SG
36 unsigned long sg_magic;
37#endif
38 unsigned long page_link;
39 unsigned int offset; /* for highmem, page offset */
40 dma_addr_t dma_address;
41 unsigned int length;
42};
43
44#define ISA_DMA_THRESHOLD (0x00ffffff)
45
46/*
47 * These macros should be used after a pci_map_sg call has been done
48 * to get bus addresses of each of the SG entries and their lengths.
49 * You should only work with the number of sg entries pci_map_sg
50 * returns.
51 */
52#define sg_dma_address(sg) ((sg)->dma_address)
53#define sg_dma_len(sg) ((sg)->length)
54
55#endif /* _ASM_SCATTERLIST_H */
diff --git a/arch/mn10300/include/asm/sections.h b/arch/mn10300/include/asm/sections.h
new file mode 100644
index 000000000000..2b8c5160388f
--- /dev/null
+++ b/arch/mn10300/include/asm/sections.h
@@ -0,0 +1 @@
#include <asm-generic/sections.h>
diff --git a/arch/mn10300/include/asm/sembuf.h b/arch/mn10300/include/asm/sembuf.h
new file mode 100644
index 000000000000..301f3f9d8aa9
--- /dev/null
+++ b/arch/mn10300/include/asm/sembuf.h
@@ -0,0 +1,25 @@
1#ifndef _ASM_SEMBUF_H
2#define _ASM_SEMBUF_H
3
4/*
5 * The semid64_ds structure for MN10300 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct semid64_ds {
15 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
16 __kernel_time_t sem_otime; /* last semop time */
17 unsigned long __unused1;
18 __kernel_time_t sem_ctime; /* last change time */
19 unsigned long __unused2;
20 unsigned long sem_nsems; /* no. of semaphores in array */
21 unsigned long __unused3;
22 unsigned long __unused4;
23};
24
25#endif /* _ASM_SEMBUF_H */
diff --git a/arch/mn10300/include/asm/serial-regs.h b/arch/mn10300/include/asm/serial-regs.h
new file mode 100644
index 000000000000..6498469e93ac
--- /dev/null
+++ b/arch/mn10300/include/asm/serial-regs.h
@@ -0,0 +1,160 @@
1/* MN10300 on-board serial port module registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_SERIAL_REGS_H
13#define _ASM_SERIAL_REGS_H
14
15#include <asm/cpu-regs.h>
16#include <asm/intctl-regs.h>
17
18#ifdef __KERNEL__
19
20/* serial port 0 */
21#define SC0CTR __SYSREG(0xd4002000, u16) /* control reg */
22#define SC01CTR_CK 0x0007 /* clock source select */
23#define SC0CTR_CK_TM8UFLOW_8 0x0000 /* - 1/8 timer 8 underflow (serial port 0 only) */
24#define SC1CTR_CK_TM9UFLOW_8 0x0000 /* - 1/8 timer 9 underflow (serial port 1 only) */
25#define SC01CTR_CK_IOCLK_8 0x0001 /* - 1/8 IOCLK */
26#define SC01CTR_CK_IOCLK_32 0x0002 /* - 1/32 IOCLK */
27#define SC0CTR_CK_TM2UFLOW_2 0x0003 /* - 1/2 timer 2 underflow (serial port 0 only) */
28#define SC1CTR_CK_TM3UFLOW_2 0x0003 /* - 1/2 timer 3 underflow (serial port 1 only) */
29#define SC0CTR_CK_TM0UFLOW_8 0x0004 /* - 1/8 timer 1 underflow (serial port 0 only) */
30#define SC1CTR_CK_TM1UFLOW_8 0x0004 /* - 1/8 timer 2 underflow (serial port 1 only) */
31#define SC0CTR_CK_TM2UFLOW_8 0x0005 /* - 1/8 timer 2 underflow (serial port 0 only) */
32#define SC1CTR_CK_TM3UFLOW_8 0x0005 /* - 1/8 timer 3 underflow (serial port 1 only) */
33#define SC01CTR_CK_EXTERN_8 0x0006 /* - 1/8 external closk */
34#define SC01CTR_CK_EXTERN 0x0007 /* - external closk */
35#define SC01CTR_STB 0x0008 /* stop bit select */
36#define SC01CTR_STB_1BIT 0x0000 /* - 1 stop bit */
37#define SC01CTR_STB_2BIT 0x0008 /* - 2 stop bits */
38#define SC01CTR_PB 0x0070 /* parity bit select */
39#define SC01CTR_PB_NONE 0x0000 /* - no parity */
40#define SC01CTR_PB_FIXED0 0x0040 /* - fixed at 0 */
41#define SC01CTR_PB_FIXED1 0x0050 /* - fixed at 1 */
42#define SC01CTR_PB_EVEN 0x0060 /* - even parity */
43#define SC01CTR_PB_ODD 0x0070 /* - odd parity */
44#define SC01CTR_CLN 0x0080 /* character length */
45#define SC01CTR_CLN_7BIT 0x0000 /* - 7 bit chars */
46#define SC01CTR_CLN_8BIT 0x0080 /* - 8 bit chars */
47#define SC01CTR_TOE 0x0100 /* T input output enable */
48#define SC01CTR_OD 0x0200 /* bit order select */
49#define SC01CTR_OD_LSBFIRST 0x0000 /* - LSB first */
50#define SC01CTR_OD_MSBFIRST 0x0200 /* - MSB first */
51#define SC01CTR_MD 0x0c00 /* mode select */
52#define SC01CTR_MD_STST_SYNC 0x0000 /* - start-stop synchronous */
53#define SC01CTR_MD_CLOCK_SYNC1 0x0400 /* - clock synchronous 1 */
54#define SC01CTR_MD_I2C 0x0800 /* - I2C mode */
55#define SC01CTR_MD_CLOCK_SYNC2 0x0c00 /* - clock synchronous 2 */
56#define SC01CTR_IIC 0x1000 /* I2C mode select */
57#define SC01CTR_BKE 0x2000 /* break transmit enable */
58#define SC01CTR_RXE 0x4000 /* receive enable */
59#define SC01CTR_TXE 0x8000 /* transmit enable */
60
61#define SC0ICR __SYSREG(0xd4002004, u8) /* interrupt control reg */
62#define SC01ICR_DMD 0x80 /* output data mode */
63#define SC01ICR_TD 0x20 /* transmit DMA trigger cause */
64#define SC01ICR_TI 0x10 /* transmit interrupt cause */
65#define SC01ICR_RES 0x04 /* receive error select */
66#define SC01ICR_RI 0x01 /* receive interrupt cause */
67
68#define SC0TXB __SYSREG(0xd4002008, u8) /* transmit buffer reg */
69#define SC0RXB __SYSREG(0xd4002009, u8) /* receive buffer reg */
70
71#define SC0STR __SYSREG(0xd400200c, u16) /* status reg */
72#define SC01STR_OEF 0x0001 /* overrun error found */
73#define SC01STR_PEF 0x0002 /* parity error found */
74#define SC01STR_FEF 0x0004 /* framing error found */
75#define SC01STR_RBF 0x0010 /* receive buffer status */
76#define SC01STR_TBF 0x0020 /* transmit buffer status */
77#define SC01STR_RXF 0x0040 /* receive status */
78#define SC01STR_TXF 0x0080 /* transmit status */
79#define SC01STR_STF 0x0100 /* I2C start sequence found */
80#define SC01STR_SPF 0x0200 /* I2C stop sequence found */
81
82#define SC0RXIRQ 20 /* timer 0 Receive IRQ */
83#define SC0TXIRQ 21 /* timer 0 Transmit IRQ */
84
85#define SC0RXICR GxICR(SC0RXIRQ) /* serial 0 receive intr ctrl reg */
86#define SC0TXICR GxICR(SC0TXIRQ) /* serial 0 transmit intr ctrl reg */
87
88/* serial port 1 */
89#define SC1CTR __SYSREG(0xd4002010, u16) /* serial port 1 control */
90#define SC1ICR __SYSREG(0xd4002014, u8) /* interrupt control reg */
91#define SC1TXB __SYSREG(0xd4002018, u8) /* transmit buffer reg */
92#define SC1RXB __SYSREG(0xd4002019, u8) /* receive buffer reg */
93#define SC1STR __SYSREG(0xd400201c, u16) /* status reg */
94
95#define SC1RXIRQ 22 /* timer 1 Receive IRQ */
96#define SC1TXIRQ 23 /* timer 1 Transmit IRQ */
97
98#define SC1RXICR GxICR(SC1RXIRQ) /* serial 1 receive intr ctrl reg */
99#define SC1TXICR GxICR(SC1TXIRQ) /* serial 1 transmit intr ctrl reg */
100
101/* serial port 2 */
102#define SC2CTR __SYSREG(0xd4002020, u16) /* control reg */
103#define SC2CTR_CK 0x0003 /* clock source select */
104#define SC2CTR_CK_TM10UFLOW 0x0000 /* - timer 10 underflow */
105#define SC2CTR_CK_TM2UFLOW 0x0001 /* - timer 2 underflow */
106#define SC2CTR_CK_EXTERN 0x0002 /* - external closk */
107#define SC2CTR_CK_TM3UFLOW 0x0003 /* - timer 3 underflow */
108#define SC2CTR_STB 0x0008 /* stop bit select */
109#define SC2CTR_STB_1BIT 0x0000 /* - 1 stop bit */
110#define SC2CTR_STB_2BIT 0x0008 /* - 2 stop bits */
111#define SC2CTR_PB 0x0070 /* parity bit select */
112#define SC2CTR_PB_NONE 0x0000 /* - no parity */
113#define SC2CTR_PB_FIXED0 0x0040 /* - fixed at 0 */
114#define SC2CTR_PB_FIXED1 0x0050 /* - fixed at 1 */
115#define SC2CTR_PB_EVEN 0x0060 /* - even parity */
116#define SC2CTR_PB_ODD 0x0070 /* - odd parity */
117#define SC2CTR_CLN 0x0080 /* character length */
118#define SC2CTR_CLN_7BIT 0x0000 /* - 7 bit chars */
119#define SC2CTR_CLN_8BIT 0x0080 /* - 8 bit chars */
120#define SC2CTR_TWE 0x0100 /* transmit wait enable (enable XCTS control) */
121#define SC2CTR_OD 0x0200 /* bit order select */
122#define SC2CTR_OD_LSBFIRST 0x0000 /* - LSB first */
123#define SC2CTR_OD_MSBFIRST 0x0200 /* - MSB first */
124#define SC2CTR_TWS 0x1000 /* transmit wait select */
125#define SC2CTR_TWS_XCTS_HIGH 0x0000 /* - interrupt TX when XCTS high */
126#define SC2CTR_TWS_XCTS_LOW 0x1000 /* - interrupt TX when XCTS low */
127#define SC2CTR_BKE 0x2000 /* break transmit enable */
128#define SC2CTR_RXE 0x4000 /* receive enable */
129#define SC2CTR_TXE 0x8000 /* transmit enable */
130
131#define SC2ICR __SYSREG(0xd4002024, u8) /* interrupt control reg */
132#define SC2ICR_TD 0x20 /* transmit DMA trigger cause */
133#define SC2ICR_TI 0x10 /* transmit interrupt cause */
134#define SC2ICR_RES 0x04 /* receive error select */
135#define SC2ICR_RI 0x01 /* receive interrupt cause */
136
137#define SC2TXB __SYSREG(0xd4002018, u8) /* transmit buffer reg */
138#define SC2RXB __SYSREG(0xd4002019, u8) /* receive buffer reg */
139#define SC2STR __SYSREG(0xd400201c, u8) /* status reg */
140#define SC2STR_OEF 0x0001 /* overrun error found */
141#define SC2STR_PEF 0x0002 /* parity error found */
142#define SC2STR_FEF 0x0004 /* framing error found */
143#define SC2STR_CTS 0x0008 /* XCTS input pin status (0 means high) */
144#define SC2STR_RBF 0x0010 /* receive buffer status */
145#define SC2STR_TBF 0x0020 /* transmit buffer status */
146#define SC2STR_RXF 0x0040 /* receive status */
147#define SC2STR_TXF 0x0080 /* transmit status */
148
149#define SC2TIM __SYSREG(0xd400202d, u8) /* status reg */
150
151#define SC2RXIRQ 24 /* serial 2 Receive IRQ */
152#define SC2TXIRQ 25 /* serial 2 Transmit IRQ */
153
154#define SC2RXICR GxICR(SC2RXIRQ) /* serial 2 receive intr ctrl reg */
155#define SC2TXICR GxICR(SC2TXIRQ) /* serial 2 transmit intr ctrl reg */
156
157
158#endif /* __KERNEL__ */
159
160#endif /* _ASM_SERIAL_REGS_H */
diff --git a/arch/mn10300/include/asm/serial.h b/arch/mn10300/include/asm/serial.h
new file mode 100644
index 000000000000..a29445cddd6f
--- /dev/null
+++ b/arch/mn10300/include/asm/serial.h
@@ -0,0 +1,36 @@
1/* Standard UART definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12/*
13 * The ASB2305 has an 18.432 MHz clock the UART
14 */
15#define BASE_BAUD (18432000 / 16)
16
17/* Standard COM flags (except for COM4, because of the 8514 problem) */
18#ifdef CONFIG_SERIAL_DETECT_IRQ
19#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ)
20#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ)
21#else
22#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
23#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF
24#endif
25
26#ifdef CONFIG_SERIAL_MANY_PORTS
27#define FOURPORT_FLAGS ASYNC_FOURPORT
28#define ACCENT_FLAGS 0
29#define BOCA_FLAGS 0
30#define HUB6_FLAGS 0
31#define RS_TABLE_SIZE 64
32#else
33#define RS_TABLE_SIZE
34#endif
35
36#include <unit/serial.h>
diff --git a/arch/mn10300/include/asm/setup.h b/arch/mn10300/include/asm/setup.h
new file mode 100644
index 000000000000..08356c832283
--- /dev/null
+++ b/arch/mn10300/include/asm/setup.h
@@ -0,0 +1,17 @@
1/* MN10300 Setup declarations
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SETUP_H
12#define _ASM_SETUP_H
13
14extern void __init unit_setup(void);
15extern void __init unit_init_IRQ(void);
16
17#endif /* _ASM_SETUP_H */
diff --git a/arch/mn10300/include/asm/shmbuf.h b/arch/mn10300/include/asm/shmbuf.h
new file mode 100644
index 000000000000..8f300cc35d6c
--- /dev/null
+++ b/arch/mn10300/include/asm/shmbuf.h
@@ -0,0 +1,42 @@
1#ifndef _ASM_SHMBUF_H
2#define _ASM_SHMBUF_H
3
4/*
5 * The shmid64_ds structure for MN10300 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct shmid64_ds {
15 struct ipc64_perm shm_perm; /* operation perms */
16 size_t shm_segsz; /* size of segment (bytes) */
17 __kernel_time_t shm_atime; /* last attach time */
18 unsigned long __unused1;
19 __kernel_time_t shm_dtime; /* last detach time */
20 unsigned long __unused2;
21 __kernel_time_t shm_ctime; /* last change time */
22 unsigned long __unused3;
23 __kernel_pid_t shm_cpid; /* pid of creator */
24 __kernel_pid_t shm_lpid; /* pid of last operator */
25 unsigned long shm_nattch; /* no. of current attaches */
26 unsigned long __unused4;
27 unsigned long __unused5;
28};
29
30struct shminfo64 {
31 unsigned long shmmax;
32 unsigned long shmmin;
33 unsigned long shmmni;
34 unsigned long shmseg;
35 unsigned long shmall;
36 unsigned long __unused1;
37 unsigned long __unused2;
38 unsigned long __unused3;
39 unsigned long __unused4;
40};
41
42#endif /* _ASM_SHMBUF_H */
diff --git a/arch/mn10300/include/asm/shmparam.h b/arch/mn10300/include/asm/shmparam.h
new file mode 100644
index 000000000000..ab666ed1a070
--- /dev/null
+++ b/arch/mn10300/include/asm/shmparam.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_SHMPARAM_H
2#define _ASM_SHMPARAM_H
3
4#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
5
6#endif /* _ASM_SHMPARAM_H */
diff --git a/arch/mn10300/include/asm/sigcontext.h b/arch/mn10300/include/asm/sigcontext.h
new file mode 100644
index 000000000000..4de3afff4ad7
--- /dev/null
+++ b/arch/mn10300/include/asm/sigcontext.h
@@ -0,0 +1,52 @@
1/* MN10300 Userspace signal context
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SIGCONTEXT_H
12#define _ASM_SIGCONTEXT_H
13
14struct fpucontext {
15 /* Regular FPU environment */
16 unsigned long fs[32]; /* fpu registers */
17 unsigned long fpcr; /* fpu control register */
18};
19
20struct sigcontext {
21 unsigned long d0;
22 unsigned long d1;
23 unsigned long d2;
24 unsigned long d3;
25 unsigned long a0;
26 unsigned long a1;
27 unsigned long a2;
28 unsigned long a3;
29 unsigned long e0;
30 unsigned long e1;
31 unsigned long e2;
32 unsigned long e3;
33 unsigned long e4;
34 unsigned long e5;
35 unsigned long e6;
36 unsigned long e7;
37 unsigned long lar;
38 unsigned long lir;
39 unsigned long mdr;
40 unsigned long mcvf;
41 unsigned long mcrl;
42 unsigned long mcrh;
43 unsigned long mdrq;
44 unsigned long sp;
45 unsigned long epsw;
46 unsigned long pc;
47 struct fpucontext *fpucontext;
48 unsigned long oldmask;
49};
50
51
52#endif /* _ASM_SIGCONTEXT_H */
diff --git a/arch/mn10300/include/asm/siginfo.h b/arch/mn10300/include/asm/siginfo.h
new file mode 100644
index 000000000000..0815d29d82e5
--- /dev/null
+++ b/arch/mn10300/include/asm/siginfo.h
@@ -0,0 +1 @@
#include <asm-generic/siginfo.h>
diff --git a/arch/mn10300/include/asm/signal.h b/arch/mn10300/include/asm/signal.h
new file mode 100644
index 000000000000..e98817cec5f7
--- /dev/null
+++ b/arch/mn10300/include/asm/signal.h
@@ -0,0 +1,171 @@
1/* MN10300 Signal definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SIGNAL_H
12#define _ASM_SIGNAL_H
13
14#include <linux/types.h>
15
16/* Avoid too many header ordering problems. */
17struct siginfo;
18
19#ifdef __KERNEL__
20/* Most things should be clean enough to redefine this at will, if care
21 is taken to make libc match. */
22
23#define _NSIG 64
24#define _NSIG_BPW 32
25#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
26
27typedef unsigned long old_sigset_t; /* at least 32 bits */
28
29typedef struct {
30 unsigned long sig[_NSIG_WORDS];
31} sigset_t;
32
33#else
34/* Here we must cater to libcs that poke about in kernel headers. */
35
36#define NSIG 32
37typedef unsigned long sigset_t;
38
39#endif /* __KERNEL__ */
40
41#define SIGHUP 1
42#define SIGINT 2
43#define SIGQUIT 3
44#define SIGILL 4
45#define SIGTRAP 5
46#define SIGABRT 6
47#define SIGIOT 6
48#define SIGBUS 7
49#define SIGFPE 8
50#define SIGKILL 9
51#define SIGUSR1 10
52#define SIGSEGV 11
53#define SIGUSR2 12
54#define SIGPIPE 13
55#define SIGALRM 14
56#define SIGTERM 15
57#define SIGSTKFLT 16
58#define SIGCHLD 17
59#define SIGCONT 18
60#define SIGSTOP 19
61#define SIGTSTP 20
62#define SIGTTIN 21
63#define SIGTTOU 22
64#define SIGURG 23
65#define SIGXCPU 24
66#define SIGXFSZ 25
67#define SIGVTALRM 26
68#define SIGPROF 27
69#define SIGWINCH 28
70#define SIGIO 29
71#define SIGPOLL SIGIO
72/*
73#define SIGLOST 29
74*/
75#define SIGPWR 30
76#define SIGSYS 31
77#define SIGUNUSED 31
78
79/* These should not be considered constants from userland. */
80#define SIGRTMIN 32
81#define SIGRTMAX (_NSIG-1)
82
83/*
84 * SA_FLAGS values:
85 *
86 * SA_ONSTACK indicates that a registered stack_t will be used.
87 * SA_RESTART flag to get restarting signals (which were the default long ago)
88 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
89 * SA_RESETHAND clears the handler when the signal is delivered.
90 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
91 * SA_NODEFER prevents the current signal from being masked in the handler.
92 *
93 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
94 * Unix names RESETHAND and NODEFER respectively.
95 */
96#define SA_NOCLDSTOP 0x00000001U
97#define SA_NOCLDWAIT 0x00000002U
98#define SA_SIGINFO 0x00000004U
99#define SA_ONSTACK 0x08000000U
100#define SA_RESTART 0x10000000U
101#define SA_NODEFER 0x40000000U
102#define SA_RESETHAND 0x80000000U
103
104#define SA_NOMASK SA_NODEFER
105#define SA_ONESHOT SA_RESETHAND
106
107#define SA_RESTORER 0x04000000
108
109/*
110 * sigaltstack controls
111 */
112#define SS_ONSTACK 1
113#define SS_DISABLE 2
114
115#define MINSIGSTKSZ 2048
116#define SIGSTKSZ 8192
117
118#include <asm-generic/signal.h>
119
120#ifdef __KERNEL__
121struct old_sigaction {
122 __sighandler_t sa_handler;
123 old_sigset_t sa_mask;
124 unsigned long sa_flags;
125 __sigrestore_t sa_restorer;
126};
127
128struct sigaction {
129 __sighandler_t sa_handler;
130 unsigned long sa_flags;
131 __sigrestore_t sa_restorer;
132 sigset_t sa_mask; /* mask last for extensibility */
133};
134
135struct k_sigaction {
136 struct sigaction sa;
137};
138#else
139/* Here we must cater to libcs that poke about in kernel headers. */
140
141struct sigaction {
142 union {
143 __sighandler_t _sa_handler;
144 void (*_sa_sigaction)(int, struct siginfo *, void *);
145 } _u;
146 sigset_t sa_mask;
147 unsigned long sa_flags;
148 void (*sa_restorer)(void);
149};
150
151#define sa_handler _u._sa_handler
152#define sa_sigaction _u._sa_sigaction
153
154#endif /* __KERNEL__ */
155
156typedef struct sigaltstack {
157 void __user *ss_sp;
158 int ss_flags;
159 size_t ss_size;
160} stack_t;
161
162#ifdef __KERNEL__
163#include <asm/sigcontext.h>
164
165
166struct pt_regs;
167#define ptrace_signal_deliver(regs, cookie) do { } while (0)
168
169#endif /* __KERNEL__ */
170
171#endif /* _ASM_SIGNAL_H */
diff --git a/arch/mn10300/include/asm/smp.h b/arch/mn10300/include/asm/smp.h
new file mode 100644
index 000000000000..4eb8c61b7dab
--- /dev/null
+++ b/arch/mn10300/include/asm/smp.h
@@ -0,0 +1,18 @@
1/* MN10300 SMP support
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SMP_H
12#define _ASM_SMP_H
13
14#ifdef CONFIG_SMP
15#error SMP not yet supported for MN10300
16#endif
17
18#endif
diff --git a/arch/mn10300/include/asm/socket.h b/arch/mn10300/include/asm/socket.h
new file mode 100644
index 000000000000..fb5daf438ec9
--- /dev/null
+++ b/arch/mn10300/include/asm/socket.h
@@ -0,0 +1,60 @@
1#ifndef _ASM_SOCKET_H
2#define _ASM_SOCKET_H
3
4#include <asm/sockios.h>
5
6/* For setsockopt(2) */
7#define SOL_SOCKET 1
8
9#define SO_DEBUG 1
10#define SO_REUSEADDR 2
11#define SO_TYPE 3
12#define SO_ERROR 4
13#define SO_DONTROUTE 5
14#define SO_BROADCAST 6
15#define SO_SNDBUF 7
16#define SO_RCVBUF 8
17#define SO_SNDBUFFORCE 32
18#define SO_RCVBUFFORCE 33
19#define SO_KEEPALIVE 9
20#define SO_OOBINLINE 10
21#define SO_NO_CHECK 11
22#define SO_PRIORITY 12
23#define SO_LINGER 13
24#define SO_BSDCOMPAT 14
25/* To add :#define SO_REUSEPORT 15 */
26#define SO_PASSCRED 16
27#define SO_PEERCRED 17
28#define SO_RCVLOWAT 18
29#define SO_SNDLOWAT 19
30#define SO_RCVTIMEO 20
31#define SO_SNDTIMEO 21
32
33/* Security levels - as per NRL IPv6 - don't actually do anything */
34#define SO_SECURITY_AUTHENTICATION 22
35#define SO_SECURITY_ENCRYPTION_TRANSPORT 23
36#define SO_SECURITY_ENCRYPTION_NETWORK 24
37
38#define SO_BINDTODEVICE 25
39
40/* Socket filtering */
41#define SO_ATTACH_FILTER 26
42#define SO_DETACH_FILTER 27
43
44#define SO_PEERNAME 28
45#define SO_TIMESTAMP 29
46#define SCM_TIMESTAMP SO_TIMESTAMP
47
48#define SO_ACCEPTCONN 30
49
50#define SO_PEERSEC 31
51#define SO_PASSSEC 34
52#define SO_TIMESTAMPNS 35
53#define SCM_TIMESTAMPNS SO_TIMESTAMPNS
54
55#define SO_MARK 36
56
57#define SO_TIMESTAMPING 37
58#define SCM_TIMESTAMPING SO_TIMESTAMPING
59
60#endif /* _ASM_SOCKET_H */
diff --git a/arch/mn10300/include/asm/sockios.h b/arch/mn10300/include/asm/sockios.h
new file mode 100644
index 000000000000..b03043a1c564
--- /dev/null
+++ b/arch/mn10300/include/asm/sockios.h
@@ -0,0 +1,13 @@
1#ifndef _ASM_SOCKIOS_H
2#define _ASM_SOCKIOS_H
3
4/* Socket-level I/O control calls. */
5#define FIOSETOWN 0x8901
6#define SIOCSPGRP 0x8902
7#define FIOGETOWN 0x8903
8#define SIOCGPGRP 0x8904
9#define SIOCATMARK 0x8905
10#define SIOCGSTAMP 0x8906 /* Get stamp */
11#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
12
13#endif /* _ASM_SOCKIOS_H */
diff --git a/arch/mn10300/include/asm/spinlock.h b/arch/mn10300/include/asm/spinlock.h
new file mode 100644
index 000000000000..4bf9c8b169e0
--- /dev/null
+++ b/arch/mn10300/include/asm/spinlock.h
@@ -0,0 +1,16 @@
1/* MN10300 spinlock support
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SPINLOCK_H
12#define _ASM_SPINLOCK_H
13
14#error SMP spinlocks not implemented for MN10300
15
16#endif /* _ASM_SPINLOCK_H */
diff --git a/arch/mn10300/include/asm/stat.h b/arch/mn10300/include/asm/stat.h
new file mode 100644
index 000000000000..63ff8371cf2c
--- /dev/null
+++ b/arch/mn10300/include/asm/stat.h
@@ -0,0 +1,78 @@
1#ifndef _ASM_STAT_H
2#define _ASM_STAT_H
3
4struct __old_kernel_stat {
5 unsigned short st_dev;
6 unsigned short st_ino;
7 unsigned short st_mode;
8 unsigned short st_nlink;
9 unsigned short st_uid;
10 unsigned short st_gid;
11 unsigned short st_rdev;
12 unsigned long st_size;
13 unsigned long st_atime;
14 unsigned long st_mtime;
15 unsigned long st_ctime;
16};
17
18struct stat {
19 unsigned long st_dev;
20 unsigned long st_ino;
21 unsigned short st_mode;
22 unsigned short st_nlink;
23 unsigned short st_uid;
24 unsigned short st_gid;
25 unsigned long st_rdev;
26 unsigned long st_size;
27 unsigned long st_blksize;
28 unsigned long st_blocks;
29 unsigned long st_atime;
30 unsigned long st_atime_nsec;
31 unsigned long st_mtime;
32 unsigned long st_mtime_nsec;
33 unsigned long st_ctime;
34 unsigned long st_ctime_nsec;
35 unsigned long __unused4;
36 unsigned long __unused5;
37};
38
39/* This matches struct stat64 in glibc2.1, hence the absolutely
40 * insane amounts of padding around dev_t's.
41 */
42struct stat64 {
43 unsigned long long st_dev;
44 unsigned char __pad0[4];
45
46#define STAT64_HAS_BROKEN_ST_INO 1
47 unsigned long __st_ino;
48
49 unsigned int st_mode;
50 unsigned int st_nlink;
51
52 unsigned long st_uid;
53 unsigned long st_gid;
54
55 unsigned long long st_rdev;
56 unsigned char __pad3[4];
57
58 long long st_size;
59 unsigned long st_blksize;
60
61 unsigned long st_blocks; /* Number 512-byte blocks allocated. */
62 unsigned long __pad4; /* future possible st_blocks high bits */
63
64 unsigned long st_atime;
65 unsigned long st_atime_nsec;
66
67 unsigned long st_mtime;
68 unsigned int st_mtime_nsec;
69
70 unsigned long st_ctime;
71 unsigned long st_ctime_nsec;
72
73 unsigned long long st_ino;
74};
75
76#define STAT_HAVE_NSEC 1
77
78#endif /* _ASM_STAT_H */
diff --git a/arch/mn10300/include/asm/statfs.h b/arch/mn10300/include/asm/statfs.h
new file mode 100644
index 000000000000..0b91fe198c20
--- /dev/null
+++ b/arch/mn10300/include/asm/statfs.h
@@ -0,0 +1 @@
#include <asm-generic/statfs.h>
diff --git a/arch/mn10300/include/asm/string.h b/arch/mn10300/include/asm/string.h
new file mode 100644
index 000000000000..47dbd4346c32
--- /dev/null
+++ b/arch/mn10300/include/asm/string.h
@@ -0,0 +1,32 @@
1/* MN10300 Optimised string functions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 * Modified by David Howells (dhowells@redhat.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public Licence
9 * as published by the Free Software Foundation; either version
10 * 2 of the Licence, or (at your option) any later version.
11 */
12#ifndef _ASM_STRING_H
13#define _ASM_STRING_H
14
15#define __HAVE_ARCH_MEMSET
16#define __HAVE_ARCH_MEMCPY
17#define __HAVE_ARCH_MEMMOVE
18
19extern void *memset(void *dest, int ch, size_t count);
20extern void *memcpy(void *dest, const void *src, size_t count);
21extern void *memmove(void *dest, const void *src, size_t count);
22
23
24extern void __struct_cpy_bug(void);
25#define struct_cpy(x, y) \
26({ \
27 if (sizeof(*(x)) != sizeof(*(y))) \
28 __struct_cpy_bug; \
29 memcpy(x, y, sizeof(*(x))); \
30})
31
32#endif /* _ASM_STRING_H */
diff --git a/arch/mn10300/include/asm/swab.h b/arch/mn10300/include/asm/swab.h
new file mode 100644
index 000000000000..bd818a820ca8
--- /dev/null
+++ b/arch/mn10300/include/asm/swab.h
@@ -0,0 +1,42 @@
1/* MN10300 Byte-order primitive construction
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SWAB_H
12#define _ASM_SWAB_H
13
14#include <linux/types.h>
15
16#ifdef __GNUC__
17
18static inline __attribute__((const))
19__u32 __arch_swab32(__u32 x)
20{
21 __u32 ret;
22 asm("swap %1,%0" : "=r" (ret) : "r" (x));
23 return ret;
24}
25#define __arch_swab32 __arch_swab32
26
27static inline __attribute__((const))
28__u16 __arch_swab16(__u16 x)
29{
30 __u16 ret;
31 asm("swaph %1,%0" : "=r" (ret) : "r" (x));
32 return ret;
33}
34#define __arch_swab32 __arch_swab32
35
36#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
37# define __SWAB_64_THRU_32__
38#endif
39
40#endif /* __GNUC__ */
41
42#endif /* _ASM_SWAB_H */
diff --git a/arch/mn10300/include/asm/system.h b/arch/mn10300/include/asm/system.h
new file mode 100644
index 000000000000..8214fb7e7fe4
--- /dev/null
+++ b/arch/mn10300/include/asm/system.h
@@ -0,0 +1,237 @@
1/* MN10300 System definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_SYSTEM_H
12#define _ASM_SYSTEM_H
13
14#include <asm/cpu-regs.h>
15
16#ifdef __KERNEL__
17#ifndef __ASSEMBLY__
18
19#include <linux/kernel.h>
20
21struct task_struct;
22struct thread_struct;
23
24extern asmlinkage
25struct task_struct *__switch_to(struct thread_struct *prev,
26 struct thread_struct *next,
27 struct task_struct *prev_task);
28
29/* context switching is now performed out-of-line in switch_to.S */
30#define switch_to(prev, next, last) \
31do { \
32 current->thread.wchan = (u_long) __builtin_return_address(0); \
33 (last) = __switch_to(&(prev)->thread, &(next)->thread, (prev)); \
34 mb(); \
35 current->thread.wchan = 0; \
36} while (0)
37
38#define arch_align_stack(x) (x)
39
40#define nop() asm volatile ("nop")
41
42#endif /* !__ASSEMBLY__ */
43
44/*
45 * Force strict CPU ordering.
46 * And yes, this is required on UP too when we're talking
47 * to devices.
48 *
49 * For now, "wmb()" doesn't actually do anything, as all
50 * Intel CPU's follow what Intel calls a *Processor Order*,
51 * in which all writes are seen in the program order even
52 * outside the CPU.
53 *
54 * I expect future Intel CPU's to have a weaker ordering,
55 * but I'd also expect them to finally get their act together
56 * and add some real memory barriers if so.
57 *
58 * Some non intel clones support out of order store. wmb() ceases to be a
59 * nop for these.
60 */
61
62#define mb() asm volatile ("": : :"memory")
63#define rmb() mb()
64#define wmb() asm volatile ("": : :"memory")
65
66#ifdef CONFIG_SMP
67#define smp_mb() mb()
68#define smp_rmb() rmb()
69#define smp_wmb() wmb()
70#else
71#define smp_mb() barrier()
72#define smp_rmb() barrier()
73#define smp_wmb() barrier()
74#endif
75
76#define set_mb(var, value) do { var = value; mb(); } while (0)
77#define set_wmb(var, value) do { var = value; wmb(); } while (0)
78
79#define read_barrier_depends() do {} while (0)
80#define smp_read_barrier_depends() do {} while (0)
81
82/*****************************************************************************/
83/*
84 * interrupt control
85 * - "disabled": run in IM1/2
86 * - level 0 - GDB stub
87 * - level 1 - virtual serial DMA (if present)
88 * - level 5 - normal interrupt priority
89 * - level 6 - timer interrupt
90 * - "enabled": run in IM7
91 */
92#ifdef CONFIG_MN10300_TTYSM
93#define MN10300_CLI_LEVEL EPSW_IM_2
94#else
95#define MN10300_CLI_LEVEL EPSW_IM_1
96#endif
97
98#define local_save_flags(x) \
99do { \
100 typecheck(unsigned long, x); \
101 asm volatile( \
102 " mov epsw,%0 \n" \
103 : "=d"(x) \
104 ); \
105} while (0)
106
107#define local_irq_disable() \
108do { \
109 asm volatile( \
110 " and %0,epsw \n" \
111 " or %1,epsw \n" \
112 " nop \n" \
113 " nop \n" \
114 " nop \n" \
115 : \
116 : "i"(~EPSW_IM), "i"(EPSW_IE | MN10300_CLI_LEVEL) \
117 ); \
118} while (0)
119
120#define local_irq_save(x) \
121do { \
122 local_save_flags(x); \
123 local_irq_disable(); \
124} while (0)
125
126/*
127 * we make sure local_irq_enable() doesn't cause priority inversion
128 */
129#ifndef __ASSEMBLY__
130
131extern unsigned long __mn10300_irq_enabled_epsw;
132
133#endif
134
135#define local_irq_enable() \
136do { \
137 unsigned long tmp; \
138 \
139 asm volatile( \
140 " mov epsw,%0 \n" \
141 " and %1,%0 \n" \
142 " or %2,%0 \n" \
143 " mov %0,epsw \n" \
144 : "=&d"(tmp) \
145 : "i"(~EPSW_IM), "r"(__mn10300_irq_enabled_epsw) \
146 ); \
147} while (0)
148
149#define local_irq_restore(x) \
150do { \
151 typecheck(unsigned long, x); \
152 asm volatile( \
153 " mov %0,epsw \n" \
154 " nop \n" \
155 " nop \n" \
156 " nop \n" \
157 : \
158 : "d"(x) \
159 : "memory", "cc" \
160 ); \
161} while (0)
162
163#define irqs_disabled() \
164({ \
165 unsigned long flags; \
166 local_save_flags(flags); \
167 (flags & EPSW_IM) <= MN10300_CLI_LEVEL; \
168})
169
170/* hook to save power by halting the CPU
171 * - called from the idle loop
172 * - must reenable interrupts (which takes three instruction cycles to complete)
173 */
174#define safe_halt() \
175do { \
176 asm volatile(" or %0,epsw \n" \
177 " nop \n" \
178 " nop \n" \
179 " bset %2,(%1) \n" \
180 : \
181 : "i"(EPSW_IE|EPSW_IM), "n"(&CPUM), "i"(CPUM_SLEEP)\
182 : "cc" \
183 ); \
184} while (0)
185
186#define STI or EPSW_IE|EPSW_IM,epsw
187#define CLI and ~EPSW_IM,epsw; or EPSW_IE|MN10300_CLI_LEVEL,epsw; nop; nop; nop
188
189/*****************************************************************************/
190/*
191 * MN10300 doesn't actually have an exchange instruction
192 */
193#ifndef __ASSEMBLY__
194
195struct __xchg_dummy { unsigned long a[100]; };
196#define __xg(x) ((struct __xchg_dummy *)(x))
197
198static inline
199unsigned long __xchg(volatile unsigned long *m, unsigned long val)
200{
201 unsigned long retval;
202 unsigned long flags;
203
204 local_irq_save(flags);
205 retval = *m;
206 *m = val;
207 local_irq_restore(flags);
208 return retval;
209}
210
211#define xchg(ptr, v) \
212 ((__typeof__(*(ptr))) __xchg((unsigned long *)(ptr), \
213 (unsigned long)(v)))
214
215static inline unsigned long __cmpxchg(volatile unsigned long *m,
216 unsigned long old, unsigned long new)
217{
218 unsigned long retval;
219 unsigned long flags;
220
221 local_irq_save(flags);
222 retval = *m;
223 if (retval == old)
224 *m = new;
225 local_irq_restore(flags);
226 return retval;
227}
228
229#define cmpxchg(ptr, o, n) \
230 ((__typeof__(*(ptr))) __cmpxchg((unsigned long *)(ptr), \
231 (unsigned long)(o), \
232 (unsigned long)(n)))
233
234#endif /* !__ASSEMBLY__ */
235
236#endif /* __KERNEL__ */
237#endif /* _ASM_SYSTEM_H */
diff --git a/arch/mn10300/include/asm/termbits.h b/arch/mn10300/include/asm/termbits.h
new file mode 100644
index 000000000000..eb2b0dc1f696
--- /dev/null
+++ b/arch/mn10300/include/asm/termbits.h
@@ -0,0 +1,200 @@
1#ifndef _ASM_TERMBITS_H
2#define _ASM_TERMBITS_H
3
4#include <linux/posix_types.h>
5
6typedef unsigned char cc_t;
7typedef unsigned int speed_t;
8typedef unsigned int tcflag_t;
9
10#define NCCS 19
11struct termios {
12 tcflag_t c_iflag; /* input mode flags */
13 tcflag_t c_oflag; /* output mode flags */
14 tcflag_t c_cflag; /* control mode flags */
15 tcflag_t c_lflag; /* local mode flags */
16 cc_t c_line; /* line discipline */
17 cc_t c_cc[NCCS]; /* control characters */
18};
19
20struct termios2 {
21 tcflag_t c_iflag; /* input mode flags */
22 tcflag_t c_oflag; /* output mode flags */
23 tcflag_t c_cflag; /* control mode flags */
24 tcflag_t c_lflag; /* local mode flags */
25 cc_t c_line; /* line discipline */
26 cc_t c_cc[NCCS]; /* control characters */
27 speed_t c_ispeed; /* input speed */
28 speed_t c_ospeed; /* output speed */
29};
30
31struct ktermios {
32 tcflag_t c_iflag; /* input mode flags */
33 tcflag_t c_oflag; /* output mode flags */
34 tcflag_t c_cflag; /* control mode flags */
35 tcflag_t c_lflag; /* local mode flags */
36 cc_t c_line; /* line discipline */
37 cc_t c_cc[NCCS]; /* control characters */
38 speed_t c_ispeed; /* input speed */
39 speed_t c_ospeed; /* output speed */
40};
41
42/* c_cc characters */
43#define VINTR 0
44#define VQUIT 1
45#define VERASE 2
46#define VKILL 3
47#define VEOF 4
48#define VTIME 5
49#define VMIN 6
50#define VSWTC 7
51#define VSTART 8
52#define VSTOP 9
53#define VSUSP 10
54#define VEOL 11
55#define VREPRINT 12
56#define VDISCARD 13
57#define VWERASE 14
58#define VLNEXT 15
59#define VEOL2 16
60
61
62/* c_iflag bits */
63#define IGNBRK 0000001
64#define BRKINT 0000002
65#define IGNPAR 0000004
66#define PARMRK 0000010
67#define INPCK 0000020
68#define ISTRIP 0000040
69#define INLCR 0000100
70#define IGNCR 0000200
71#define ICRNL 0000400
72#define IUCLC 0001000
73#define IXON 0002000
74#define IXANY 0004000
75#define IXOFF 0010000
76#define IMAXBEL 0020000
77#define IUTF8 0040000
78
79/* c_oflag bits */
80#define OPOST 0000001
81#define OLCUC 0000002
82#define ONLCR 0000004
83#define OCRNL 0000010
84#define ONOCR 0000020
85#define ONLRET 0000040
86#define OFILL 0000100
87#define OFDEL 0000200
88#define NLDLY 0000400
89#define NL0 0000000
90#define NL1 0000400
91#define CRDLY 0003000
92#define CR0 0000000
93#define CR1 0001000
94#define CR2 0002000
95#define CR3 0003000
96#define TABDLY 0014000
97#define TAB0 0000000
98#define TAB1 0004000
99#define TAB2 0010000
100#define TAB3 0014000
101#define XTABS 0014000
102#define BSDLY 0020000
103#define BS0 0000000
104#define BS1 0020000
105#define VTDLY 0040000
106#define VT0 0000000
107#define VT1 0040000
108#define FFDLY 0100000
109#define FF0 0000000
110#define FF1 0100000
111
112/* c_cflag bit meaning */
113#define CBAUD 0010017
114#define B0 0000000 /* hang up */
115#define B50 0000001
116#define B75 0000002
117#define B110 0000003
118#define B134 0000004
119#define B150 0000005
120#define B200 0000006
121#define B300 0000007
122#define B600 0000010
123#define B1200 0000011
124#define B1800 0000012
125#define B2400 0000013
126#define B4800 0000014
127#define B9600 0000015
128#define B19200 0000016
129#define B38400 0000017
130#define EXTA B19200
131#define EXTB B38400
132#define CSIZE 0000060
133#define CS5 0000000
134#define CS6 0000020
135#define CS7 0000040
136#define CS8 0000060
137#define CSTOPB 0000100
138#define CREAD 0000200
139#define PARENB 0000400
140#define PARODD 0001000
141#define HUPCL 0002000
142#define CLOCAL 0004000
143#define CBAUDEX 0010000
144#define BOTHER 0010000
145#define B57600 0010001
146#define B115200 0010002
147#define B230400 0010003
148#define B460800 0010004
149#define B500000 0010005
150#define B576000 0010006
151#define B921600 0010007
152#define B1000000 0010010
153#define B1152000 0010011
154#define B1500000 0010012
155#define B2000000 0010013
156#define B2500000 0010014
157#define B3000000 0010015
158#define B3500000 0010016
159#define B4000000 0010017
160#define CIBAUD 002003600000 /* input baud rate (not used) */
161#define CTVB 004000000000 /* VisioBraille Terminal flow control */
162#define CMSPAR 010000000000 /* mark or space (stick) parity */
163#define CRTSCTS 020000000000 /* flow control */
164
165#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
166
167/* c_lflag bits */
168#define ISIG 0000001
169#define ICANON 0000002
170#define XCASE 0000004
171#define ECHO 0000010
172#define ECHOE 0000020
173#define ECHOK 0000040
174#define ECHONL 0000100
175#define NOFLSH 0000200
176#define TOSTOP 0000400
177#define ECHOCTL 0001000
178#define ECHOPRT 0002000
179#define ECHOKE 0004000
180#define FLUSHO 0010000
181#define PENDIN 0040000
182#define IEXTEN 0100000
183
184/* tcflow() and TCXONC use these */
185#define TCOOFF 0
186#define TCOON 1
187#define TCIOFF 2
188#define TCION 3
189
190/* tcflush() and TCFLSH use these */
191#define TCIFLUSH 0
192#define TCOFLUSH 1
193#define TCIOFLUSH 2
194
195/* tcsetattr uses these */
196#define TCSANOW 0
197#define TCSADRAIN 1
198#define TCSAFLUSH 2
199
200#endif /* _ASM_TERMBITS_H */
diff --git a/arch/mn10300/include/asm/termios.h b/arch/mn10300/include/asm/termios.h
new file mode 100644
index 000000000000..dd7cf617e118
--- /dev/null
+++ b/arch/mn10300/include/asm/termios.h
@@ -0,0 +1,92 @@
1#ifndef _ASM_TERMIOS_H
2#define _ASM_TERMIOS_H
3
4#include <asm/termbits.h>
5#include <asm/ioctls.h>
6
7struct winsize {
8 unsigned short ws_row;
9 unsigned short ws_col;
10 unsigned short ws_xpixel;
11 unsigned short ws_ypixel;
12};
13
14#define NCC 8
15struct termio {
16 unsigned short c_iflag; /* input mode flags */
17 unsigned short c_oflag; /* output mode flags */
18 unsigned short c_cflag; /* control mode flags */
19 unsigned short c_lflag; /* local mode flags */
20 unsigned char c_line; /* line discipline */
21 unsigned char c_cc[NCC]; /* control characters */
22};
23
24#ifdef __KERNEL__
25/* intr=^C quit=^| erase=del kill=^U
26 eof=^D vtime=\0 vmin=\1 sxtc=\0
27 start=^Q stop=^S susp=^Z eol=\0
28 reprint=^R discard=^U werase=^W lnext=^V
29 eol2=\0
30*/
31#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
32#endif
33
34/* modem lines */
35#define TIOCM_LE 0x001
36#define TIOCM_DTR 0x002
37#define TIOCM_RTS 0x004
38#define TIOCM_ST 0x008
39#define TIOCM_SR 0x010
40#define TIOCM_CTS 0x020
41#define TIOCM_CAR 0x040
42#define TIOCM_RNG 0x080
43#define TIOCM_DSR 0x100
44#define TIOCM_CD TIOCM_CAR
45#define TIOCM_RI TIOCM_RNG
46#define TIOCM_OUT1 0x2000
47#define TIOCM_OUT2 0x4000
48#define TIOCM_LOOP 0x8000
49
50#define TIOCM_MODEM_BITS TIOCM_OUT2 /* IRDA support */
51
52/*
53 * Translate a "termio" structure into a "termios". Ugh.
54 */
55#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
56 unsigned short __tmp; \
57 get_user(__tmp, &(termio)->x); \
58 *(unsigned short *) &(termios)->x = __tmp; \
59}
60
61#define user_termio_to_kernel_termios(termios, termio) \
62({ \
63 SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
64 SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
65 SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
66 SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
67 copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
68})
69
70/*
71 * Translate a "termios" structure into a "termio". Ugh.
72 */
73#define kernel_termios_to_user_termio(termio, termios) \
74({ \
75 put_user((termios)->c_iflag, &(termio)->c_iflag); \
76 put_user((termios)->c_oflag, &(termio)->c_oflag); \
77 put_user((termios)->c_cflag, &(termio)->c_cflag); \
78 put_user((termios)->c_lflag, &(termio)->c_lflag); \
79 put_user((termios)->c_line, &(termio)->c_line); \
80 copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
81})
82
83#define user_termios_to_kernel_termios(k, u) \
84 copy_from_user(k, u, sizeof(struct termios2))
85#define kernel_termios_to_user_termios(u, k) \
86 copy_to_user(u, k, sizeof(struct termios2))
87#define user_termios_to_kernel_termios_1(k, u) \
88 copy_from_user(k, u, sizeof(struct termios))
89#define kernel_termios_to_user_termios_1(u, k) \
90 copy_to_user(u, k, sizeof(struct termios))
91
92#endif /* _ASM_TERMIOS_H */
diff --git a/arch/mn10300/include/asm/thread_info.h b/arch/mn10300/include/asm/thread_info.h
new file mode 100644
index 000000000000..78a3881f3c12
--- /dev/null
+++ b/arch/mn10300/include/asm/thread_info.h
@@ -0,0 +1,170 @@
1/* MN10300 Low-level thread information
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_THREAD_INFO_H
13#define _ASM_THREAD_INFO_H
14
15#ifdef __KERNEL__
16
17#include <asm/page.h>
18
19#ifndef __ASSEMBLY__
20#include <asm/processor.h>
21#endif
22
23#define PREEMPT_ACTIVE 0x10000000
24
25#ifdef CONFIG_4KSTACKS
26#define THREAD_SIZE (4096)
27#else
28#define THREAD_SIZE (8192)
29#endif
30
31#define STACK_WARN (THREAD_SIZE / 8)
32
33/*
34 * low level task data that entry.S needs immediate access to
35 * - this struct should fit entirely inside of one cache line
36 * - this struct shares the supervisor stack pages
37 * - if the contents of this structure are changed, the assembly constants
38 * must also be changed
39 */
40#ifndef __ASSEMBLY__
41
42struct thread_info {
43 struct task_struct *task; /* main task structure */
44 struct exec_domain *exec_domain; /* execution domain */
45 unsigned long flags; /* low level flags */
46 __u32 cpu; /* current CPU */
47 __s32 preempt_count; /* 0 => preemptable, <0 => BUG */
48
49 mm_segment_t addr_limit; /* thread address space:
50 0-0xBFFFFFFF for user-thead
51 0-0xFFFFFFFF for kernel-thread
52 */
53 struct restart_block restart_block;
54
55 __u8 supervisor_stack[0];
56};
57
58#else /* !__ASSEMBLY__ */
59
60#ifndef __ASM_OFFSETS_H__
61#include <asm/asm-offsets.h>
62#endif
63
64#endif
65
66/*
67 * macros/functions for gaining access to the thread information structure
68 *
69 * preempt_count needs to be 1 initially, until the scheduler is functional.
70 */
71#ifndef __ASSEMBLY__
72
73#define INIT_THREAD_INFO(tsk) \
74{ \
75 .task = &tsk, \
76 .exec_domain = &default_exec_domain, \
77 .flags = 0, \
78 .cpu = 0, \
79 .preempt_count = 1, \
80 .addr_limit = KERNEL_DS, \
81 .restart_block = { \
82 .fn = do_no_restart_syscall, \
83 }, \
84}
85
86#define init_thread_info (init_thread_union.thread_info)
87#define init_stack (init_thread_union.stack)
88#define init_uregs \
89 ((struct pt_regs *) \
90 ((unsigned long) init_stack + THREAD_SIZE - sizeof(struct pt_regs)))
91
92extern struct thread_info *__current_ti;
93
94/* how to get the thread information struct from C */
95static inline __attribute__((const))
96struct thread_info *current_thread_info(void)
97{
98 struct thread_info *ti;
99 asm("mov sp,%0\n"
100 "and %1,%0\n"
101 : "=d" (ti)
102 : "i" (~(THREAD_SIZE - 1))
103 : "cc");
104 return ti;
105}
106
107/* how to get the current stack pointer from C */
108static inline unsigned long current_stack_pointer(void)
109{
110 unsigned long sp;
111 asm("mov sp,%0; ":"=r" (sp));
112 return sp;
113}
114
115#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR
116
117/* thread information allocation */
118#ifdef CONFIG_DEBUG_STACK_USAGE
119#define alloc_thread_info(tsk) kzalloc(THREAD_SIZE, GFP_KERNEL)
120#else
121#define alloc_thread_info(tsk) kmalloc(THREAD_SIZE, GFP_KERNEL)
122#endif
123
124#define free_thread_info(ti) kfree((ti))
125#define get_thread_info(ti) get_task_struct((ti)->task)
126#define put_thread_info(ti) put_task_struct((ti)->task)
127
128#else /* !__ASSEMBLY__ */
129
130#ifndef __VMLINUX_LDS__
131/* how to get the thread information struct from ASM */
132.macro GET_THREAD_INFO reg
133 mov sp,\reg
134 and -THREAD_SIZE,\reg
135.endm
136#endif
137#endif
138
139/*
140 * thread information flags
141 * - these are process state flags that various assembly files may need to
142 * access
143 * - pending work-to-be-done flags are in LSW
144 * - other flags in MSW
145 */
146#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
147#define TIF_NOTIFY_RESUME 1 /* resumption notification requested */
148#define TIF_SIGPENDING 2 /* signal pending */
149#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
150#define TIF_SINGLESTEP 4 /* restore singlestep on return to user mode */
151#define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */
152#define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */
153#define TIF_MEMDIE 17 /* OOM killer killed process */
154#define TIF_FREEZE 18 /* freezing for suspend */
155
156#define _TIF_SYSCALL_TRACE +(1 << TIF_SYSCALL_TRACE)
157#define _TIF_NOTIFY_RESUME +(1 << TIF_NOTIFY_RESUME)
158#define _TIF_SIGPENDING +(1 << TIF_SIGPENDING)
159#define _TIF_NEED_RESCHED +(1 << TIF_NEED_RESCHED)
160#define _TIF_SINGLESTEP +(1 << TIF_SINGLESTEP)
161#define _TIF_RESTORE_SIGMASK +(1 << TIF_RESTORE_SIGMASK)
162#define _TIF_POLLING_NRFLAG +(1 << TIF_POLLING_NRFLAG)
163#define _TIF_FREEZE +(1 << TIF_FREEZE)
164
165#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */
166#define _TIF_ALLWORK_MASK 0x0000FFFF /* work to do on any return to u-space */
167
168#endif /* __KERNEL__ */
169
170#endif /* _ASM_THREAD_INFO_H */
diff --git a/arch/mn10300/include/asm/timer-regs.h b/arch/mn10300/include/asm/timer-regs.h
new file mode 100644
index 000000000000..1d883b7f94ab
--- /dev/null
+++ b/arch/mn10300/include/asm/timer-regs.h
@@ -0,0 +1,293 @@
1/* AM33v2 on-board timer module registers
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_TIMER_REGS_H
13#define _ASM_TIMER_REGS_H
14
15#include <asm/cpu-regs.h>
16#include <asm/intctl-regs.h>
17
18#ifdef __KERNEL__
19
20/* timer prescalar control */
21#define TMPSCNT __SYSREG(0xd4003071, u8) /* timer prescaler control */
22#define TMPSCNT_ENABLE 0x80 /* timer prescaler enable */
23#define TMPSCNT_DISABLE 0x00 /* timer prescaler disable */
24
25/* 8 bit timers */
26#define TM0MD __SYSREG(0xd4003000, u8) /* timer 0 mode register */
27#define TM0MD_SRC 0x07 /* timer source */
28#define TM0MD_SRC_IOCLK 0x00 /* - IOCLK */
29#define TM0MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
30#define TM0MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
31#define TM0MD_SRC_TM2IO 0x03 /* - TM2IO pin input */
32#define TM0MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
33#define TM0MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
34#define TM0MD_SRC_TM0IO 0x07 /* - TM0IO pin input */
35#define TM0MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
36#define TM0MD_COUNT_ENABLE 0x80 /* timer count enable */
37
38#define TM1MD __SYSREG(0xd4003001, u8) /* timer 1 mode register */
39#define TM1MD_SRC 0x07 /* timer source */
40#define TM1MD_SRC_IOCLK 0x00 /* - IOCLK */
41#define TM1MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
42#define TM1MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
43#define TM1MD_SRC_TM0CASCADE 0x03 /* - cascade with timer 0 */
44#define TM1MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
45#define TM1MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
46#define TM1MD_SRC_TM1IO 0x07 /* - TM1IO pin input */
47#define TM1MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
48#define TM1MD_COUNT_ENABLE 0x80 /* timer count enable */
49
50#define TM2MD __SYSREG(0xd4003002, u8) /* timer 2 mode register */
51#define TM2MD_SRC 0x07 /* timer source */
52#define TM2MD_SRC_IOCLK 0x00 /* - IOCLK */
53#define TM2MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
54#define TM2MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
55#define TM2MD_SRC_TM1CASCADE 0x03 /* - cascade with timer 1 */
56#define TM2MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
57#define TM2MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
58#define TM2MD_SRC_TM2IO 0x07 /* - TM2IO pin input */
59#define TM2MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
60#define TM2MD_COUNT_ENABLE 0x80 /* timer count enable */
61
62#define TM3MD __SYSREG(0xd4003003, u8) /* timer 3 mode register */
63#define TM3MD_SRC 0x07 /* timer source */
64#define TM3MD_SRC_IOCLK 0x00 /* - IOCLK */
65#define TM3MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
66#define TM3MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
67#define TM3MD_SRC_TM1CASCADE 0x03 /* - cascade with timer 2 */
68#define TM3MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
69#define TM3MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
70#define TM3MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
71#define TM3MD_SRC_TM3IO 0x07 /* - TM3IO pin input */
72#define TM3MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
73#define TM3MD_COUNT_ENABLE 0x80 /* timer count enable */
74
75#define TM01MD __SYSREG(0xd4003000, u16) /* timer 0:1 mode register */
76
77#define TM0BR __SYSREG(0xd4003010, u8) /* timer 0 base register */
78#define TM1BR __SYSREG(0xd4003011, u8) /* timer 1 base register */
79#define TM2BR __SYSREG(0xd4003012, u8) /* timer 2 base register */
80#define TM3BR __SYSREG(0xd4003013, u8) /* timer 3 base register */
81#define TM01BR __SYSREG(0xd4003010, u16) /* timer 0:1 base register */
82
83#define TM0BC __SYSREGC(0xd4003020, u8) /* timer 0 binary counter */
84#define TM1BC __SYSREGC(0xd4003021, u8) /* timer 1 binary counter */
85#define TM2BC __SYSREGC(0xd4003022, u8) /* timer 2 binary counter */
86#define TM3BC __SYSREGC(0xd4003023, u8) /* timer 3 binary counter */
87#define TM01BC __SYSREGC(0xd4003020, u16) /* timer 0:1 binary counter */
88
89#define TM0IRQ 2 /* timer 0 IRQ */
90#define TM1IRQ 3 /* timer 1 IRQ */
91#define TM2IRQ 4 /* timer 2 IRQ */
92#define TM3IRQ 5 /* timer 3 IRQ */
93
94#define TM0ICR GxICR(TM0IRQ) /* timer 0 uflow intr ctrl reg */
95#define TM1ICR GxICR(TM1IRQ) /* timer 1 uflow intr ctrl reg */
96#define TM2ICR GxICR(TM2IRQ) /* timer 2 uflow intr ctrl reg */
97#define TM3ICR GxICR(TM3IRQ) /* timer 3 uflow intr ctrl reg */
98
99/* 16-bit timers 4,5 & 7-11 */
100#define TM4MD __SYSREG(0xd4003080, u8) /* timer 4 mode register */
101#define TM4MD_SRC 0x07 /* timer source */
102#define TM4MD_SRC_IOCLK 0x00 /* - IOCLK */
103#define TM4MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
104#define TM4MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
105#define TM4MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
106#define TM4MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
107#define TM4MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
108#define TM4MD_SRC_TM4IO 0x07 /* - TM4IO pin input */
109#define TM4MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
110#define TM4MD_COUNT_ENABLE 0x80 /* timer count enable */
111
112#define TM5MD __SYSREG(0xd4003082, u8) /* timer 5 mode register */
113#define TM5MD_SRC 0x07 /* timer source */
114#define TM5MD_SRC_IOCLK 0x00 /* - IOCLK */
115#define TM5MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
116#define TM5MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
117#define TM5MD_SRC_TM4CASCADE 0x03 /* - cascade with timer 4 */
118#define TM5MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
119#define TM5MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
120#define TM5MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
121#define TM5MD_SRC_TM5IO 0x07 /* - TM5IO pin input */
122#define TM5MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
123#define TM5MD_COUNT_ENABLE 0x80 /* timer count enable */
124
125#define TM7MD __SYSREG(0xd4003086, u8) /* timer 7 mode register */
126#define TM7MD_SRC 0x07 /* timer source */
127#define TM7MD_SRC_IOCLK 0x00 /* - IOCLK */
128#define TM7MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
129#define TM7MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
130#define TM7MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
131#define TM7MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
132#define TM7MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
133#define TM7MD_SRC_TM7IO 0x07 /* - TM7IO pin input */
134#define TM7MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
135#define TM7MD_COUNT_ENABLE 0x80 /* timer count enable */
136
137#define TM8MD __SYSREG(0xd4003088, u8) /* timer 8 mode register */
138#define TM8MD_SRC 0x07 /* timer source */
139#define TM8MD_SRC_IOCLK 0x00 /* - IOCLK */
140#define TM8MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
141#define TM8MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
142#define TM8MD_SRC_TM7CASCADE 0x03 /* - cascade with timer 7 */
143#define TM8MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
144#define TM8MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
145#define TM8MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
146#define TM8MD_SRC_TM8IO 0x07 /* - TM8IO pin input */
147#define TM8MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
148#define TM8MD_COUNT_ENABLE 0x80 /* timer count enable */
149
150#define TM9MD __SYSREG(0xd400308a, u8) /* timer 9 mode register */
151#define TM9MD_SRC 0x07 /* timer source */
152#define TM9MD_SRC_IOCLK 0x00 /* - IOCLK */
153#define TM9MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
154#define TM9MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
155#define TM9MD_SRC_TM8CASCADE 0x03 /* - cascade with timer 8 */
156#define TM9MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
157#define TM9MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
158#define TM9MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
159#define TM9MD_SRC_TM9IO 0x07 /* - TM9IO pin input */
160#define TM9MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
161#define TM9MD_COUNT_ENABLE 0x80 /* timer count enable */
162
163#define TM10MD __SYSREG(0xd400308c, u8) /* timer 10 mode register */
164#define TM10MD_SRC 0x07 /* timer source */
165#define TM10MD_SRC_IOCLK 0x00 /* - IOCLK */
166#define TM10MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
167#define TM10MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
168#define TM10MD_SRC_TM9CASCADE 0x03 /* - cascade with timer 9 */
169#define TM10MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
170#define TM10MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
171#define TM10MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
172#define TM10MD_SRC_TM10IO 0x07 /* - TM10IO pin input */
173#define TM10MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
174#define TM10MD_COUNT_ENABLE 0x80 /* timer count enable */
175
176#define TM11MD __SYSREG(0xd400308e, u8) /* timer 11 mode register */
177#define TM11MD_SRC 0x07 /* timer source */
178#define TM11MD_SRC_IOCLK 0x00 /* - IOCLK */
179#define TM11MD_SRC_IOCLK_8 0x01 /* - 1/8 IOCLK */
180#define TM11MD_SRC_IOCLK_32 0x02 /* - 1/32 IOCLK */
181#define TM11MD_SRC_TM7CASCADE 0x03 /* - cascade with timer 7 */
182#define TM11MD_SRC_TM0UFLOW 0x04 /* - timer 0 underflow */
183#define TM11MD_SRC_TM1UFLOW 0x05 /* - timer 1 underflow */
184#define TM11MD_SRC_TM2UFLOW 0x06 /* - timer 2 underflow */
185#define TM11MD_SRC_TM11IO 0x07 /* - TM11IO pin input */
186#define TM11MD_INIT_COUNTER 0x40 /* initialize TMnBC = TMnBR */
187#define TM11MD_COUNT_ENABLE 0x80 /* timer count enable */
188
189#define TM4BR __SYSREG(0xd4003090, u16) /* timer 4 base register */
190#define TM5BR __SYSREG(0xd4003092, u16) /* timer 5 base register */
191#define TM7BR __SYSREG(0xd4003096, u16) /* timer 7 base register */
192#define TM8BR __SYSREG(0xd4003098, u16) /* timer 8 base register */
193#define TM9BR __SYSREG(0xd400309a, u16) /* timer 9 base register */
194#define TM10BR __SYSREG(0xd400309c, u16) /* timer 10 base register */
195#define TM11BR __SYSREG(0xd400309e, u16) /* timer 11 base register */
196#define TM45BR __SYSREG(0xd4003090, u32) /* timer 4:5 base register */
197
198#define TM4BC __SYSREG(0xd40030a0, u16) /* timer 4 binary counter */
199#define TM5BC __SYSREG(0xd40030a2, u16) /* timer 5 binary counter */
200#define TM45BC __SYSREG(0xd40030a0, u32) /* timer 4:5 binary counter */
201
202#define TM7BC __SYSREG(0xd40030a6, u16) /* timer 7 binary counter */
203#define TM8BC __SYSREG(0xd40030a8, u16) /* timer 8 binary counter */
204#define TM9BC __SYSREG(0xd40030aa, u16) /* timer 9 binary counter */
205#define TM10BC __SYSREG(0xd40030ac, u16) /* timer 10 binary counter */
206#define TM11BC __SYSREG(0xd40030ae, u16) /* timer 11 binary counter */
207
208#define TM4IRQ 6 /* timer 4 IRQ */
209#define TM5IRQ 7 /* timer 5 IRQ */
210#define TM7IRQ 11 /* timer 7 IRQ */
211#define TM8IRQ 12 /* timer 8 IRQ */
212#define TM9IRQ 13 /* timer 9 IRQ */
213#define TM10IRQ 14 /* timer 10 IRQ */
214#define TM11IRQ 15 /* timer 11 IRQ */
215
216#define TM4ICR GxICR(TM4IRQ) /* timer 4 uflow intr ctrl reg */
217#define TM5ICR GxICR(TM5IRQ) /* timer 5 uflow intr ctrl reg */
218#define TM7ICR GxICR(TM7IRQ) /* timer 7 uflow intr ctrl reg */
219#define TM8ICR GxICR(TM8IRQ) /* timer 8 uflow intr ctrl reg */
220#define TM9ICR GxICR(TM9IRQ) /* timer 9 uflow intr ctrl reg */
221#define TM10ICR GxICR(TM10IRQ) /* timer 10 uflow intr ctrl reg */
222#define TM11ICR GxICR(TM11IRQ) /* timer 11 uflow intr ctrl reg */
223
224/* 16-bit timer 6 */
225#define TM6MD __SYSREG(0xd4003084, u16) /* timer6 mode register */
226#define TM6MD_SRC 0x0007 /* timer source */
227#define TM6MD_SRC_IOCLK 0x0000 /* - IOCLK */
228#define TM6MD_SRC_IOCLK_8 0x0001 /* - 1/8 IOCLK */
229#define TM6MD_SRC_IOCLK_32 0x0002 /* - 1/32 IOCLK */
230#define TM6MD_SRC_TM0UFLOW 0x0004 /* - timer 0 underflow */
231#define TM6MD_SRC_TM1UFLOW 0x0005 /* - timer 1 underflow */
232#define TM6MD_SRC_TM6IOB_BOTH 0x0006 /* - TM6IOB pin input (both edges) */
233#define TM6MD_SRC_TM6IOB_SINGLE 0x0007 /* - TM6IOB pin input (single edge) */
234#define TM6MD_CLR_ENABLE 0x0010 /* clear count enable */
235#define TM6MD_ONESHOT_ENABLE 0x0040 /* oneshot count */
236#define TM6MD_TRIG_ENABLE 0x0080 /* TM6IOB pin trigger enable */
237#define TM6MD_PWM 0x3800 /* PWM output mode */
238#define TM6MD_PWM_DIS 0x0000 /* - disabled */
239#define TM6MD_PWM_10BIT 0x1000 /* - 10 bits mode */
240#define TM6MD_PWM_11BIT 0x1800 /* - 11 bits mode */
241#define TM6MD_PWM_12BIT 0x3000 /* - 12 bits mode */
242#define TM6MD_PWM_14BIT 0x3800 /* - 14 bits mode */
243#define TM6MD_INIT_COUNTER 0x4000 /* initialize TMnBC to zero */
244#define TM6MD_COUNT_ENABLE 0x8000 /* timer count enable */
245
246#define TM6MDA __SYSREG(0xd40030b4, u8) /* timer6 cmp/cap A mode reg */
247#define TM6MDA_OUT 0x07 /* output select */
248#define TM6MDA_OUT_SETA_RESETB 0x00 /* - set at match A, reset at match B */
249#define TM6MDA_OUT_SETA_RESETOV 0x01 /* - set at match A, reset at overflow */
250#define TM6MDA_OUT_SETA 0x02 /* - set at match A */
251#define TM6MDA_OUT_RESETA 0x03 /* - reset at match A */
252#define TM6MDA_OUT_TOGGLE 0x04 /* - toggle on match A */
253#define TM6MDA_MODE 0xc0 /* compare A register mode */
254#define TM6MDA_MODE_CMP_SINGLE 0x00 /* - compare, single buffer mode */
255#define TM6MDA_MODE_CMP_DOUBLE 0x40 /* - compare, double buffer mode */
256#define TM6MDA_MODE_CAP_S_EDGE 0x80 /* - capture, single edge mode */
257#define TM6MDA_MODE_CAP_D_EDGE 0xc0 /* - capture, double edge mode */
258#define TM6MDA_EDGE 0x20 /* compare A edge select */
259#define TM6MDA_EDGE_FALLING 0x00 /* capture on falling edge */
260#define TM6MDA_EDGE_RISING 0x20 /* capture on rising edge */
261#define TM6MDA_CAPTURE_ENABLE 0x10 /* capture enable */
262
263#define TM6MDB __SYSREG(0xd40030b5, u8) /* timer6 cmp/cap B mode reg */
264#define TM6MDB_OUT 0x07 /* output select */
265#define TM6MDB_OUT_SETB_RESETA 0x00 /* - set at match B, reset at match A */
266#define TM6MDB_OUT_SETB_RESETOV 0x01 /* - set at match B */
267#define TM6MDB_OUT_RESETB 0x03 /* - reset at match B */
268#define TM6MDB_OUT_TOGGLE 0x04 /* - toggle on match B */
269#define TM6MDB_MODE 0xc0 /* compare B register mode */
270#define TM6MDB_MODE_CMP_SINGLE 0x00 /* - compare, single buffer mode */
271#define TM6MDB_MODE_CMP_DOUBLE 0x40 /* - compare, double buffer mode */
272#define TM6MDB_MODE_CAP_S_EDGE 0x80 /* - capture, single edge mode */
273#define TM6MDB_MODE_CAP_D_EDGE 0xc0 /* - capture, double edge mode */
274#define TM6MDB_EDGE 0x20 /* compare B edge select */
275#define TM6MDB_EDGE_FALLING 0x00 /* capture on falling edge */
276#define TM6MDB_EDGE_RISING 0x20 /* capture on rising edge */
277#define TM6MDB_CAPTURE_ENABLE 0x10 /* capture enable */
278
279#define TM6CA __SYSREG(0xd40030c4, u16) /* timer6 cmp/capture reg A */
280#define TM6CB __SYSREG(0xd40030d4, u16) /* timer6 cmp/capture reg B */
281#define TM6BC __SYSREG(0xd40030a4, u16) /* timer6 binary counter */
282
283#define TM6IRQ 6 /* timer 6 IRQ */
284#define TM6AIRQ 9 /* timer 6A IRQ */
285#define TM6BIRQ 10 /* timer 6B IRQ */
286
287#define TM6ICR GxICR(TM6IRQ) /* timer 6 uflow intr ctrl reg */
288#define TM6AICR GxICR(TM6AIRQ) /* timer 6A intr control reg */
289#define TM6BICR GxICR(TM6BIRQ) /* timer 6B intr control reg */
290
291#endif /* __KERNEL__ */
292
293#endif /* _ASM_TIMER_REGS_H */
diff --git a/arch/mn10300/include/asm/timex.h b/arch/mn10300/include/asm/timex.h
new file mode 100644
index 000000000000..8d031f9e117d
--- /dev/null
+++ b/arch/mn10300/include/asm/timex.h
@@ -0,0 +1,33 @@
1/* MN10300 Architecture time management specifications
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_TIMEX_H
12#define _ASM_TIMEX_H
13
14#include <asm/hardirq.h>
15#include <unit/timex.h>
16
17#define TICK_SIZE (tick_nsec / 1000)
18
19#define CLOCK_TICK_RATE 1193180 /* Underlying HZ - this should probably be set
20 * to something appropriate, but what? */
21
22extern cycles_t cacheflush_time;
23
24#ifdef __KERNEL__
25
26static inline cycles_t get_cycles(void)
27{
28 return read_timestamp_counter();
29}
30
31#endif /* __KERNEL__ */
32
33#endif /* _ASM_TIMEX_H */
diff --git a/arch/mn10300/include/asm/tlb.h b/arch/mn10300/include/asm/tlb.h
new file mode 100644
index 000000000000..65d232b96613
--- /dev/null
+++ b/arch/mn10300/include/asm/tlb.h
@@ -0,0 +1,34 @@
1/* MN10300 TLB definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_TLB_H
13#define _ASM_TLB_H
14
15#include <asm/tlbflush.h>
16
17extern void check_pgt_cache(void);
18
19/*
20 * we don't need any special per-pte or per-vma handling...
21 */
22#define tlb_start_vma(tlb, vma) do { } while (0)
23#define tlb_end_vma(tlb, vma) do { } while (0)
24#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
25
26/*
27 * .. because we flush the whole mm when it fills up
28 */
29#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
30
31/* for now, just use the generic stuff */
32#include <asm-generic/tlb.h>
33
34#endif /* _ASM_TLB_H */
diff --git a/arch/mn10300/include/asm/tlbflush.h b/arch/mn10300/include/asm/tlbflush.h
new file mode 100644
index 000000000000..e0239865abcb
--- /dev/null
+++ b/arch/mn10300/include/asm/tlbflush.h
@@ -0,0 +1,80 @@
1/* MN10300 TLB flushing functions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_TLBFLUSH_H
12#define _ASM_TLBFLUSH_H
13
14#include <asm/processor.h>
15
16#define __flush_tlb() \
17do { \
18 int w; \
19 __asm__ __volatile__ \
20 (" mov %1,%0 \n" \
21 " or %2,%0 \n" \
22 " mov %0,%1 \n" \
23 : "=d"(w) \
24 : "m"(MMUCTR), "i"(MMUCTR_IIV|MMUCTR_DIV) \
25 : "memory" \
26 ); \
27} while (0)
28
29#define __flush_tlb_all() __flush_tlb()
30#define __flush_tlb_one(addr) __flush_tlb()
31
32
33/*
34 * TLB flushing:
35 *
36 * - flush_tlb() flushes the current mm struct TLBs
37 * - flush_tlb_all() flushes all processes TLBs
38 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
39 * - flush_tlb_page(vma, vmaddr) flushes one page
40 * - flush_tlb_range(mm, start, end) flushes a range of pages
41 * - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
42 */
43#define flush_tlb_all() \
44do { \
45 preempt_disable(); \
46 __flush_tlb_all(); \
47 preempt_enable(); \
48} while (0)
49
50#define flush_tlb_mm(mm) \
51do { \
52 preempt_disable(); \
53 __flush_tlb_all(); \
54 preempt_enable(); \
55} while (0)
56
57#define flush_tlb_range(vma, start, end) \
58do { \
59 unsigned long __s __attribute__((unused)) = (start); \
60 unsigned long __e __attribute__((unused)) = (end); \
61 preempt_disable(); \
62 __flush_tlb_all(); \
63 preempt_enable(); \
64} while (0)
65
66
67#define __flush_tlb_global() flush_tlb_all()
68#define flush_tlb() flush_tlb_all()
69#define flush_tlb_kernel_range(start, end) \
70do { \
71 unsigned long __s __attribute__((unused)) = (start); \
72 unsigned long __e __attribute__((unused)) = (end); \
73 flush_tlb_all(); \
74} while (0)
75
76extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr);
77
78#define flush_tlb_pgtables(mm, start, end) do {} while (0)
79
80#endif /* _ASM_TLBFLUSH_H */
diff --git a/arch/mn10300/include/asm/topology.h b/arch/mn10300/include/asm/topology.h
new file mode 100644
index 000000000000..5428f333a02c
--- /dev/null
+++ b/arch/mn10300/include/asm/topology.h
@@ -0,0 +1 @@
#include <asm-generic/topology.h>
diff --git a/arch/mn10300/include/asm/types.h b/arch/mn10300/include/asm/types.h
new file mode 100644
index 000000000000..7b9f01042fd4
--- /dev/null
+++ b/arch/mn10300/include/asm/types.h
@@ -0,0 +1,38 @@
1/* MN10300 Basic type definitions
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_TYPES_H
12#define _ASM_TYPES_H
13
14#include <asm-generic/int-ll64.h>
15
16#ifndef __ASSEMBLY__
17
18typedef unsigned short umode_t;
19
20#endif /* __ASSEMBLY__ */
21
22/*
23 * These aren't exported outside the kernel to avoid name space clashes
24 */
25#ifdef __KERNEL__
26
27#define BITS_PER_LONG 32
28
29#ifndef __ASSEMBLY__
30
31/* Dma addresses are 32-bits wide. */
32typedef u32 dma_addr_t;
33
34#endif /* __ASSEMBLY__ */
35
36#endif /* __KERNEL__ */
37
38#endif /* _ASM_TYPES_H */
diff --git a/arch/mn10300/include/asm/uaccess.h b/arch/mn10300/include/asm/uaccess.h
new file mode 100644
index 000000000000..8a3a4dd55763
--- /dev/null
+++ b/arch/mn10300/include/asm/uaccess.h
@@ -0,0 +1,490 @@
1/* MN10300 userspace access functions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_UACCESS_H
12#define _ASM_UACCESS_H
13
14/*
15 * User space memory access functions
16 */
17#include <linux/sched.h>
18#include <asm/page.h>
19#include <asm/pgtable.h>
20#include <asm/errno.h>
21
22#define VERIFY_READ 0
23#define VERIFY_WRITE 1
24
25/*
26 * The fs value determines whether argument validity checking should be
27 * performed or not. If get_fs() == USER_DS, checking is performed, with
28 * get_fs() == KERNEL_DS, checking is bypassed.
29 *
30 * For historical reasons, these macros are grossly misnamed.
31 */
32
33#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) })
34
35#define KERNEL_XDS MAKE_MM_SEG(0xBFFFFFFF)
36#define KERNEL_DS MAKE_MM_SEG(0x9FFFFFFF)
37#define USER_DS MAKE_MM_SEG(TASK_SIZE)
38
39#define get_ds() (KERNEL_DS)
40#define get_fs() (current_thread_info()->addr_limit)
41#define set_fs(x) (current_thread_info()->addr_limit = (x))
42#define __kernel_ds_p() (current_thread_info()->addr_limit.seg == 0x9FFFFFFF)
43
44#define segment_eq(a, b) ((a).seg == (b).seg)
45
46#define __addr_ok(addr) \
47 ((unsigned long)(addr) < (current_thread_info()->addr_limit.seg))
48
49/*
50 * check that a range of addresses falls within the current address limit
51 */
52static inline int ___range_ok(unsigned long addr, unsigned int size)
53{
54 int flag = 1, tmp;
55
56 asm(" add %3,%1 \n" /* set C-flag if addr + size > 4Gb */
57 " bcs 0f \n"
58 " cmp %4,%1 \n" /* jump if addr+size>limit (error) */
59 " bhi 0f \n"
60 " clr %0 \n" /* mark okay */
61 "0: \n"
62 : "=r"(flag), "=&r"(tmp)
63 : "1"(addr), "ir"(size),
64 "r"(current_thread_info()->addr_limit.seg), "0"(flag)
65 : "cc"
66 );
67
68 return flag;
69}
70
71#define __range_ok(addr, size) ___range_ok((unsigned long)(addr), (u32)(size))
72
73#define access_ok(type, addr, size) (__range_ok((addr), (size)) == 0)
74#define __access_ok(addr, size) (__range_ok((addr), (size)) == 0)
75
76static inline int verify_area(int type, const void *addr, unsigned long size)
77{
78 return access_ok(type, addr, size) ? 0 : -EFAULT;
79}
80
81
82/*
83 * The exception table consists of pairs of addresses: the first is the
84 * address of an instruction that is allowed to fault, and the second is
85 * the address at which the program should continue. No registers are
86 * modified, so it is entirely up to the continuation code to figure out
87 * what to do.
88 *
89 * All the routines below use bits of fixup code that are out of line
90 * with the main instruction path. This means when everything is well,
91 * we don't even have to jump over them. Further, they do not intrude
92 * on our cache or tlb entries.
93 */
94
95struct exception_table_entry
96{
97 unsigned long insn, fixup;
98};
99
100/* Returns 0 if exception not found and fixup otherwise. */
101extern int fixup_exception(struct pt_regs *regs);
102
103#define put_user(x, ptr) __put_user_check((x), (ptr), sizeof(*(ptr)))
104#define get_user(x, ptr) __get_user_check((x), (ptr), sizeof(*(ptr)))
105
106/*
107 * The "__xxx" versions do not do address space checking, useful when
108 * doing multiple accesses to the same area (the user has to do the
109 * checks by hand with "access_ok()")
110 */
111#define __put_user(x, ptr) __put_user_nocheck((x), (ptr), sizeof(*(ptr)))
112#define __get_user(x, ptr) __get_user_nocheck((x), (ptr), sizeof(*(ptr)))
113
114/*
115 * The "xxx_ret" versions return constant specified in third argument, if
116 * something bad happens. These macros can be optimized for the
117 * case of just returning from the function xxx_ret is used.
118 */
119
120#define put_user_ret(x, ptr, ret) \
121 ({ if (put_user((x), (ptr))) return (ret); })
122#define get_user_ret(x, ptr, ret) \
123 ({ if (get_user((x), (ptr))) return (ret); })
124#define __put_user_ret(x, ptr, ret) \
125 ({ if (__put_user((x), (ptr))) return (ret); })
126#define __get_user_ret(x, ptr, ret) \
127 ({ if (__get_user((x), (ptr))) return (ret); })
128
129struct __large_struct { unsigned long buf[100]; };
130#define __m(x) (*(struct __large_struct *)(x))
131
132#define __get_user_nocheck(x, ptr, size) \
133({ \
134 __typeof(*(ptr)) __gu_val; \
135 unsigned long __gu_addr; \
136 int __gu_err; \
137 __gu_addr = (unsigned long) (ptr); \
138 switch (size) { \
139 case 1: __get_user_asm("bu"); break; \
140 case 2: __get_user_asm("hu"); break; \
141 case 4: __get_user_asm("" ); break; \
142 default: __get_user_unknown(); break; \
143 } \
144 x = (__typeof__(*(ptr))) __gu_val; \
145 __gu_err; \
146})
147
148#define __get_user_check(x, ptr, size) \
149({ \
150 __typeof__(*(ptr)) __gu_val; \
151 unsigned long __gu_addr; \
152 int __gu_err; \
153 __gu_addr = (unsigned long) (ptr); \
154 if (likely(__access_ok(__gu_addr,size))) { \
155 switch (size) { \
156 case 1: __get_user_asm("bu"); break; \
157 case 2: __get_user_asm("hu"); break; \
158 case 4: __get_user_asm("" ); break; \
159 default: __get_user_unknown(); break; \
160 } \
161 } \
162 else { \
163 __gu_err = -EFAULT; \
164 __gu_val = 0; \
165 } \
166 x = (__typeof__(*(ptr))) __gu_val; \
167 __gu_err; \
168})
169
170#define __get_user_asm(INSN) \
171({ \
172 asm volatile( \
173 "1:\n" \
174 " mov"INSN" %2,%1\n" \
175 " mov 0,%0\n" \
176 "2:\n" \
177 " .section .fixup,\"ax\"\n" \
178 "3:\n\t" \
179 " mov %3,%0\n" \
180 " jmp 2b\n" \
181 " .previous\n" \
182 " .section __ex_table,\"a\"\n" \
183 " .balign 4\n" \
184 " .long 1b, 3b\n" \
185 " .previous" \
186 : "=&r" (__gu_err), "=&r" (__gu_val) \
187 : "m" (__m(__gu_addr)), "i" (-EFAULT)); \
188})
189
190extern int __get_user_unknown(void);
191
192#define __put_user_nocheck(x, ptr, size) \
193({ \
194 union { \
195 __typeof__(*(ptr)) val; \
196 u32 bits[2]; \
197 } __pu_val; \
198 unsigned long __pu_addr; \
199 int __pu_err; \
200 __pu_val.val = (x); \
201 __pu_addr = (unsigned long) (ptr); \
202 switch (size) { \
203 case 1: __put_user_asm("bu"); break; \
204 case 2: __put_user_asm("hu"); break; \
205 case 4: __put_user_asm("" ); break; \
206 case 8: __put_user_asm8(); break; \
207 default: __pu_err = __put_user_unknown(); break; \
208 } \
209 __pu_err; \
210})
211
212#define __put_user_check(x, ptr, size) \
213({ \
214 union { \
215 __typeof__(*(ptr)) val; \
216 u32 bits[2]; \
217 } __pu_val; \
218 unsigned long __pu_addr; \
219 int __pu_err; \
220 __pu_val.val = (x); \
221 __pu_addr = (unsigned long) (ptr); \
222 if (likely(__access_ok(__pu_addr, size))) { \
223 switch (size) { \
224 case 1: __put_user_asm("bu"); break; \
225 case 2: __put_user_asm("hu"); break; \
226 case 4: __put_user_asm("" ); break; \
227 case 8: __put_user_asm8(); break; \
228 default: __pu_err = __put_user_unknown(); break; \
229 } \
230 } \
231 else { \
232 __pu_err = -EFAULT; \
233 } \
234 __pu_err; \
235})
236
237#define __put_user_asm(INSN) \
238({ \
239 asm volatile( \
240 "1:\n" \
241 " mov"INSN" %1,%2\n" \
242 " mov 0,%0\n" \
243 "2:\n" \
244 " .section .fixup,\"ax\"\n" \
245 "3:\n" \
246 " mov %3,%0\n" \
247 " jmp 2b\n" \
248 " .previous\n" \
249 " .section __ex_table,\"a\"\n" \
250 " .balign 4\n" \
251 " .long 1b, 3b\n" \
252 " .previous" \
253 : "=&r" (__pu_err) \
254 : "r" (__pu_val.val), "m" (__m(__pu_addr)), \
255 "i" (-EFAULT) \
256 ); \
257})
258
259#define __put_user_asm8() \
260({ \
261 asm volatile( \
262 "1: mov %1,%3 \n" \
263 "2: mov %2,%4 \n" \
264 " mov 0,%0 \n" \
265 "3: \n" \
266 " .section .fixup,\"ax\" \n" \
267 "4: \n" \
268 " mov %5,%0 \n" \
269 " jmp 3b \n" \
270 " .previous \n" \
271 " .section __ex_table,\"a\"\n" \
272 " .balign 4 \n" \
273 " .long 1b, 4b \n" \
274 " .long 2b, 4b \n" \
275 " .previous \n" \
276 : "=&r" (__pu_err) \
277 : "r" (__pu_val.bits[0]), "r" (__pu_val.bits[1]), \
278 "m" (__m(__pu_addr)), "m" (__m(__pu_addr+4)), \
279 "i" (-EFAULT) \
280 ); \
281})
282
283extern int __put_user_unknown(void);
284
285
286/*
287 * Copy To/From Userspace
288 */
289/* Generic arbitrary sized copy. */
290#define __copy_user(to, from, size) \
291do { \
292 if (size) { \
293 void *__to = to; \
294 const void *__from = from; \
295 int w; \
296 asm volatile( \
297 "0: movbu (%0),%3;\n" \
298 "1: movbu %3,(%1);\n" \
299 " inc %0;\n" \
300 " inc %1;\n" \
301 " add -1,%2;\n" \
302 " bne 0b;\n" \
303 "2:\n" \
304 " .section .fixup,\"ax\"\n" \
305 "3: jmp 2b\n" \
306 " .previous\n" \
307 " .section __ex_table,\"a\"\n" \
308 " .balign 4\n" \
309 " .long 0b,3b\n" \
310 " .long 1b,3b\n" \
311 " .previous\n" \
312 : "=a"(__from), "=a"(__to), "=r"(size), "=&r"(w)\
313 : "0"(__from), "1"(__to), "2"(size) \
314 : "memory"); \
315 } \
316} while (0)
317
318#define __copy_user_zeroing(to, from, size) \
319do { \
320 if (size) { \
321 void *__to = to; \
322 const void *__from = from; \
323 int w; \
324 asm volatile( \
325 "0: movbu (%0),%3;\n" \
326 "1: movbu %3,(%1);\n" \
327 " inc %0;\n" \
328 " inc %1;\n" \
329 " add -1,%2;\n" \
330 " bne 0b;\n" \
331 "2:\n" \
332 " .section .fixup,\"ax\"\n" \
333 "3:\n" \
334 " mov %2,%0\n" \
335 " clr %3\n" \
336 "4: movbu %3,(%1);\n" \
337 " inc %1;\n" \
338 " add -1,%2;\n" \
339 " bne 4b;\n" \
340 " mov %0,%2\n" \
341 " jmp 2b\n" \
342 " .previous\n" \
343 " .section __ex_table,\"a\"\n" \
344 " .balign 4\n" \
345 " .long 0b,3b\n" \
346 " .long 1b,3b\n" \
347 " .previous\n" \
348 : "=a"(__from), "=a"(__to), "=r"(size), "=&r"(w)\
349 : "0"(__from), "1"(__to), "2"(size) \
350 : "memory"); \
351 } \
352} while (0)
353
354/* We let the __ versions of copy_from/to_user inline, because they're often
355 * used in fast paths and have only a small space overhead.
356 */
357static inline
358unsigned long __generic_copy_from_user_nocheck(void *to, const void *from,
359 unsigned long n)
360{
361 __copy_user_zeroing(to, from, n);
362 return n;
363}
364
365static inline
366unsigned long __generic_copy_to_user_nocheck(void *to, const void *from,
367 unsigned long n)
368{
369 __copy_user(to, from, n);
370 return n;
371}
372
373
374#if 0
375#error don't use - these macros don't increment to & from pointers
376/* Optimize just a little bit when we know the size of the move. */
377#define __constant_copy_user(to, from, size) \
378do { \
379 asm volatile( \
380 " mov %0,a0;\n" \
381 "0: movbu (%1),d3;\n" \
382 "1: movbu d3,(%2);\n" \
383 " add -1,a0;\n" \
384 " bne 0b;\n" \
385 "2:;" \
386 ".section .fixup,\"ax\"\n" \
387 "3: jmp 2b\n" \
388 ".previous\n" \
389 ".section __ex_table,\"a\"\n" \
390 " .balign 4\n" \
391 " .long 0b,3b\n" \
392 " .long 1b,3b\n" \
393 ".previous" \
394 : \
395 : "d"(size), "d"(to), "d"(from) \
396 : "d3", "a0"); \
397} while (0)
398
399/* Optimize just a little bit when we know the size of the move. */
400#define __constant_copy_user_zeroing(to, from, size) \
401do { \
402 asm volatile( \
403 " mov %0,a0;\n" \
404 "0: movbu (%1),d3;\n" \
405 "1: movbu d3,(%2);\n" \
406 " add -1,a0;\n" \
407 " bne 0b;\n" \
408 "2:;" \
409 ".section .fixup,\"ax\"\n" \
410 "3: jmp 2b\n" \
411 ".previous\n" \
412 ".section __ex_table,\"a\"\n" \
413 " .balign 4\n" \
414 " .long 0b,3b\n" \
415 " .long 1b,3b\n" \
416 ".previous" \
417 : \
418 : "d"(size), "d"(to), "d"(from) \
419 : "d3", "a0"); \
420} while (0)
421
422static inline
423unsigned long __constant_copy_to_user(void *to, const void *from,
424 unsigned long n)
425{
426 if (access_ok(VERIFY_WRITE, to, n))
427 __constant_copy_user(to, from, n);
428 return n;
429}
430
431static inline
432unsigned long __constant_copy_from_user(void *to, const void *from,
433 unsigned long n)
434{
435 if (access_ok(VERIFY_READ, from, n))
436 __constant_copy_user_zeroing(to, from, n);
437 return n;
438}
439
440static inline
441unsigned long __constant_copy_to_user_nocheck(void *to, const void *from,
442 unsigned long n)
443{
444 __constant_copy_user(to, from, n);
445 return n;
446}
447
448static inline
449unsigned long __constant_copy_from_user_nocheck(void *to, const void *from,
450 unsigned long n)
451{
452 __constant_copy_user_zeroing(to, from, n);
453 return n;
454}
455#endif
456
457extern unsigned long __generic_copy_to_user(void __user *, const void *,
458 unsigned long);
459extern unsigned long __generic_copy_from_user(void *, const void __user *,
460 unsigned long);
461
462#define __copy_to_user_inatomic(to, from, n) \
463 __generic_copy_to_user_nocheck((to), (from), (n))
464#define __copy_from_user_inatomic(to, from, n) \
465 __generic_copy_from_user_nocheck((to), (from), (n))
466
467#define __copy_to_user(to, from, n) \
468({ \
469 might_sleep(); \
470 __copy_to_user_inatomic((to), (from), (n)); \
471})
472
473#define __copy_from_user(to, from, n) \
474({ \
475 might_sleep(); \
476 __copy_from_user_inatomic((to), (from), (n)); \
477})
478
479
480#define copy_to_user(to, from, n) __generic_copy_to_user((to), (from), (n))
481#define copy_from_user(to, from, n) __generic_copy_from_user((to), (from), (n))
482
483extern long strncpy_from_user(char *dst, const char __user *src, long count);
484extern long __strncpy_from_user(char *dst, const char __user *src, long count);
485extern long strnlen_user(const char __user *str, long n);
486#define strlen_user(str) strnlen_user(str, ~0UL >> 1)
487extern unsigned long clear_user(void __user *mem, unsigned long len);
488extern unsigned long __clear_user(void __user *mem, unsigned long len);
489
490#endif /* _ASM_UACCESS_H */
diff --git a/arch/mn10300/include/asm/ucontext.h b/arch/mn10300/include/asm/ucontext.h
new file mode 100644
index 000000000000..fcab5c1d8e18
--- /dev/null
+++ b/arch/mn10300/include/asm/ucontext.h
@@ -0,0 +1,22 @@
1/* MN10300 User context
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_UCONTEXT_H
12#define _ASM_UCONTEXT_H
13
14struct ucontext {
15 unsigned long uc_flags;
16 struct ucontext *uc_link;
17 stack_t uc_stack;
18 struct sigcontext uc_mcontext;
19 sigset_t uc_sigmask; /* mask last for extensibility */
20};
21
22#endif /* _ASM_UCONTEXT_H */
diff --git a/arch/mn10300/include/asm/unaligned.h b/arch/mn10300/include/asm/unaligned.h
new file mode 100644
index 000000000000..0df671318ae4
--- /dev/null
+++ b/arch/mn10300/include/asm/unaligned.h
@@ -0,0 +1,20 @@
1/* MN10300 Unaligned memory access handling
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_MN10300_UNALIGNED_H
12#define _ASM_MN10300_UNALIGNED_H
13
14#include <linux/unaligned/access_ok.h>
15#include <linux/unaligned/generic.h>
16
17#define get_unaligned __get_unaligned_le
18#define put_unaligned __put_unaligned_le
19
20#endif /* _ASM_MN10300_UNALIGNED_H */
diff --git a/arch/mn10300/include/asm/unistd.h b/arch/mn10300/include/asm/unistd.h
new file mode 100644
index 000000000000..fef5b434dadc
--- /dev/null
+++ b/arch/mn10300/include/asm/unistd.h
@@ -0,0 +1,392 @@
1/* MN10300 System call number list
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_UNISTD_H
12#define _ASM_UNISTD_H
13
14#define __NR_restart_syscall 0
15#define __NR_exit 1
16#define __NR_fork 2
17#define __NR_read 3
18#define __NR_write 4
19#define __NR_open 5
20#define __NR_close 6
21#define __NR_waitpid 7
22#define __NR_creat 8
23#define __NR_link 9
24#define __NR_unlink 10
25#define __NR_execve 11
26#define __NR_chdir 12
27#define __NR_time 13
28#define __NR_mknod 14
29#define __NR_chmod 15
30#define __NR_lchown 16
31#define __NR_break 17
32#define __NR_oldstat 18
33#define __NR_lseek 19
34#define __NR_getpid 20
35#define __NR_mount 21
36#define __NR_umount 22
37#define __NR_setuid 23
38#define __NR_getuid 24
39#define __NR_stime 25
40#define __NR_ptrace 26
41#define __NR_alarm 27
42#define __NR_oldfstat 28
43#define __NR_pause 29
44#define __NR_utime 30
45#define __NR_stty 31
46#define __NR_gtty 32
47#define __NR_access 33
48#define __NR_nice 34
49#define __NR_ftime 35
50#define __NR_sync 36
51#define __NR_kill 37
52#define __NR_rename 38
53#define __NR_mkdir 39
54#define __NR_rmdir 40
55#define __NR_dup 41
56#define __NR_pipe 42
57#define __NR_times 43
58#define __NR_prof 44
59#define __NR_brk 45
60#define __NR_setgid 46
61#define __NR_getgid 47
62#define __NR_signal 48
63#define __NR_geteuid 49
64#define __NR_getegid 50
65#define __NR_acct 51
66#define __NR_umount2 52
67#define __NR_lock 53
68#define __NR_ioctl 54
69#define __NR_fcntl 55
70#define __NR_mpx 56
71#define __NR_setpgid 57
72#define __NR_ulimit 58
73#define __NR_oldolduname 59
74#define __NR_umask 60
75#define __NR_chroot 61
76#define __NR_ustat 62
77#define __NR_dup2 63
78#define __NR_getppid 64
79#define __NR_getpgrp 65
80#define __NR_setsid 66
81#define __NR_sigaction 67
82#define __NR_sgetmask 68
83#define __NR_ssetmask 69
84#define __NR_setreuid 70
85#define __NR_setregid 71
86#define __NR_sigsuspend 72
87#define __NR_sigpending 73
88#define __NR_sethostname 74
89#define __NR_setrlimit 75
90#define __NR_getrlimit 76 /* Back compatible 2Gig limited rlimit */
91#define __NR_getrusage 77
92#define __NR_gettimeofday 78
93#define __NR_settimeofday 79
94#define __NR_getgroups 80
95#define __NR_setgroups 81
96#define __NR_select 82
97#define __NR_symlink 83
98#define __NR_oldlstat 84
99#define __NR_readlink 85
100#define __NR_uselib 86
101#define __NR_swapon 87
102#define __NR_reboot 88
103#define __NR_readdir 89
104#define __NR_mmap 90
105#define __NR_munmap 91
106#define __NR_truncate 92
107#define __NR_ftruncate 93
108#define __NR_fchmod 94
109#define __NR_fchown 95
110#define __NR_getpriority 96
111#define __NR_setpriority 97
112#define __NR_profil 98
113#define __NR_statfs 99
114#define __NR_fstatfs 100
115#define __NR_ioperm 101
116#define __NR_socketcall 102
117#define __NR_syslog 103
118#define __NR_setitimer 104
119#define __NR_getitimer 105
120#define __NR_stat 106
121#define __NR_lstat 107
122#define __NR_fstat 108
123#define __NR_olduname 109
124#define __NR_iopl 110
125#define __NR_vhangup 111
126#define __NR_idle 112
127#define __NR_vm86old 113
128#define __NR_wait4 114
129#define __NR_swapoff 115
130#define __NR_sysinfo 116
131#define __NR_ipc 117
132#define __NR_fsync 118
133#define __NR_sigreturn 119
134#define __NR_clone 120
135#define __NR_setdomainname 121
136#define __NR_uname 122
137#define __NR_modify_ldt 123
138#define __NR_adjtimex 124
139#define __NR_mprotect 125
140#define __NR_sigprocmask 126
141#define __NR_create_module 127
142#define __NR_init_module 128
143#define __NR_delete_module 129
144#define __NR_get_kernel_syms 130
145#define __NR_quotactl 131
146#define __NR_getpgid 132
147#define __NR_fchdir 133
148#define __NR_bdflush 134
149#define __NR_sysfs 135
150#define __NR_personality 136
151#define __NR_afs_syscall 137 /* Syscall for Andrew File System */
152#define __NR_setfsuid 138
153#define __NR_setfsgid 139
154#define __NR__llseek 140
155#define __NR_getdents 141
156#define __NR__newselect 142
157#define __NR_flock 143
158#define __NR_msync 144
159#define __NR_readv 145
160#define __NR_writev 146
161#define __NR_getsid 147
162#define __NR_fdatasync 148
163#define __NR__sysctl 149
164#define __NR_mlock 150
165#define __NR_munlock 151
166#define __NR_mlockall 152
167#define __NR_munlockall 153
168#define __NR_sched_setparam 154
169#define __NR_sched_getparam 155
170#define __NR_sched_setscheduler 156
171#define __NR_sched_getscheduler 157
172#define __NR_sched_yield 158
173#define __NR_sched_get_priority_max 159
174#define __NR_sched_get_priority_min 160
175#define __NR_sched_rr_get_interval 161
176#define __NR_nanosleep 162
177#define __NR_mremap 163
178#define __NR_setresuid 164
179#define __NR_getresuid 165
180#define __NR_vm86 166
181#define __NR_query_module 167
182#define __NR_poll 168
183#define __NR_nfsservctl 169
184#define __NR_setresgid 170
185#define __NR_getresgid 171
186#define __NR_prctl 172
187#define __NR_rt_sigreturn 173
188#define __NR_rt_sigaction 174
189#define __NR_rt_sigprocmask 175
190#define __NR_rt_sigpending 176
191#define __NR_rt_sigtimedwait 177
192#define __NR_rt_sigqueueinfo 178
193#define __NR_rt_sigsuspend 179
194#define __NR_pread64 180
195#define __NR_pwrite64 181
196#define __NR_chown 182
197#define __NR_getcwd 183
198#define __NR_capget 184
199#define __NR_capset 185
200#define __NR_sigaltstack 186
201#define __NR_sendfile 187
202#define __NR_getpmsg 188 /* some people actually want streams */
203#define __NR_putpmsg 189 /* some people actually want streams */
204#define __NR_vfork 190
205#define __NR_ugetrlimit 191 /* SuS compliant getrlimit */
206#define __NR_mmap2 192
207#define __NR_truncate64 193
208#define __NR_ftruncate64 194
209#define __NR_stat64 195
210#define __NR_lstat64 196
211#define __NR_fstat64 197
212#define __NR_lchown32 198
213#define __NR_getuid32 199
214#define __NR_getgid32 200
215#define __NR_geteuid32 201
216#define __NR_getegid32 202
217#define __NR_setreuid32 203
218#define __NR_setregid32 204
219#define __NR_getgroups32 205
220#define __NR_setgroups32 206
221#define __NR_fchown32 207
222#define __NR_setresuid32 208
223#define __NR_getresuid32 209
224#define __NR_setresgid32 210
225#define __NR_getresgid32 211
226#define __NR_chown32 212
227#define __NR_setuid32 213
228#define __NR_setgid32 214
229#define __NR_setfsuid32 215
230#define __NR_setfsgid32 216
231#define __NR_pivot_root 217
232#define __NR_mincore 218
233#define __NR_madvise 219
234#define __NR_madvise1 219 /* delete when C lib stub is removed */
235#define __NR_getdents64 220
236#define __NR_fcntl64 221
237/* 223 is unused */
238#define __NR_gettid 224
239#define __NR_readahead 225
240#define __NR_setxattr 226
241#define __NR_lsetxattr 227
242#define __NR_fsetxattr 228
243#define __NR_getxattr 229
244#define __NR_lgetxattr 230
245#define __NR_fgetxattr 231
246#define __NR_listxattr 232
247#define __NR_llistxattr 233
248#define __NR_flistxattr 234
249#define __NR_removexattr 235
250#define __NR_lremovexattr 236
251#define __NR_fremovexattr 237
252#define __NR_tkill 238
253#define __NR_sendfile64 239
254#define __NR_futex 240
255#define __NR_sched_setaffinity 241
256#define __NR_sched_getaffinity 242
257#define __NR_set_thread_area 243
258#define __NR_get_thread_area 244
259#define __NR_io_setup 245
260#define __NR_io_destroy 246
261#define __NR_io_getevents 247
262#define __NR_io_submit 248
263#define __NR_io_cancel 249
264#define __NR_fadvise64 250
265
266#define __NR_exit_group 252
267#define __NR_lookup_dcookie 253
268#define __NR_epoll_create 254
269#define __NR_epoll_ctl 255
270#define __NR_epoll_wait 256
271#define __NR_remap_file_pages 257
272#define __NR_set_tid_address 258
273#define __NR_timer_create 259
274#define __NR_timer_settime (__NR_timer_create+1)
275#define __NR_timer_gettime (__NR_timer_create+2)
276#define __NR_timer_getoverrun (__NR_timer_create+3)
277#define __NR_timer_delete (__NR_timer_create+4)
278#define __NR_clock_settime (__NR_timer_create+5)
279#define __NR_clock_gettime (__NR_timer_create+6)
280#define __NR_clock_getres (__NR_timer_create+7)
281#define __NR_clock_nanosleep (__NR_timer_create+8)
282#define __NR_statfs64 268
283#define __NR_fstatfs64 269
284#define __NR_tgkill 270
285#define __NR_utimes 271
286#define __NR_fadvise64_64 272
287#define __NR_vserver 273
288#define __NR_mbind 274
289#define __NR_get_mempolicy 275
290#define __NR_set_mempolicy 276
291#define __NR_mq_open 277
292#define __NR_mq_unlink (__NR_mq_open+1)
293#define __NR_mq_timedsend (__NR_mq_open+2)
294#define __NR_mq_timedreceive (__NR_mq_open+3)
295#define __NR_mq_notify (__NR_mq_open+4)
296#define __NR_mq_getsetattr (__NR_mq_open+5)
297#define __NR_kexec_load 283
298#define __NR_waitid 284
299#define __NR_add_key 286
300#define __NR_request_key 287
301#define __NR_keyctl 288
302#define __NR_cacheflush 289
303#define __NR_ioprio_set 290
304#define __NR_ioprio_get 291
305#define __NR_inotify_init 292
306#define __NR_inotify_add_watch 293
307#define __NR_inotify_rm_watch 294
308#define __NR_migrate_pages 295
309#define __NR_openat 296
310#define __NR_mkdirat 297
311#define __NR_mknodat 298
312#define __NR_fchownat 299
313#define __NR_futimesat 300
314#define __NR_fstatat64 301
315#define __NR_unlinkat 302
316#define __NR_renameat 303
317#define __NR_linkat 304
318#define __NR_symlinkat 305
319#define __NR_readlinkat 306
320#define __NR_fchmodat 307
321#define __NR_faccessat 308
322#define __NR_pselect6 309
323#define __NR_ppoll 310
324#define __NR_unshare 311
325#define __NR_set_robust_list 312
326#define __NR_get_robust_list 313
327#define __NR_splice 314
328#define __NR_sync_file_range 315
329#define __NR_tee 316
330#define __NR_vmsplice 317
331#define __NR_move_pages 318
332#define __NR_getcpu 319
333#define __NR_epoll_pwait 320
334#define __NR_utimensat 321
335#define __NR_signalfd 322
336#define __NR_timerfd_create 323
337#define __NR_eventfd 324
338#define __NR_fallocate 325
339#define __NR_timerfd_settime 326
340#define __NR_timerfd_gettime 327
341#define __NR_signalfd4 328
342#define __NR_eventfd2 329
343#define __NR_epoll_create1 330
344#define __NR_dup3 331
345#define __NR_pipe2 332
346#define __NR_inotify_init1 333
347#define __NR_preadv 334
348#define __NR_pwritev 335
349
350#ifdef __KERNEL__
351
352#define NR_syscalls 326
353
354/*
355 * specify the deprecated syscalls we want to support on this arch
356 */
357#define __ARCH_WANT_IPC_PARSE_VERSION
358#define __ARCH_WANT_OLD_READDIR
359#define __ARCH_WANT_OLD_STAT
360#define __ARCH_WANT_STAT64
361#define __ARCH_WANT_SYS_ALARM
362#define __ARCH_WANT_SYS_GETHOSTNAME
363#define __ARCH_WANT_SYS_PAUSE
364#define __ARCH_WANT_SYS_SGETMASK
365#define __ARCH_WANT_SYS_SIGNAL
366#define __ARCH_WANT_SYS_TIME
367#define __ARCH_WANT_SYS_UTIME
368#define __ARCH_WANT_SYS_WAITPID
369#define __ARCH_WANT_SYS_SOCKETCALL
370#define __ARCH_WANT_SYS_FADVISE64
371#define __ARCH_WANT_SYS_GETPGRP
372#define __ARCH_WANT_SYS_LLSEEK
373#define __ARCH_WANT_SYS_NICE
374#define __ARCH_WANT_SYS_OLD_GETRLIMIT
375#define __ARCH_WANT_SYS_OLDUMOUNT
376#define __ARCH_WANT_SYS_SIGPENDING
377#define __ARCH_WANT_SYS_SIGPROCMASK
378#define __ARCH_WANT_SYS_RT_SIGACTION
379#define __ARCH_WANT_SYS_RT_SIGSUSPEND
380
381/*
382 * "Conditional" syscalls
383 *
384 * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
385 * but it doesn't work on all toolchains, so we just do it by hand
386 */
387#ifndef cond_syscall
388#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall");
389#endif
390
391#endif /* __KERNEL__ */
392#endif /* _ASM_UNISTD_H */
diff --git a/arch/mn10300/include/asm/user.h b/arch/mn10300/include/asm/user.h
new file mode 100644
index 000000000000..e1193908b78c
--- /dev/null
+++ b/arch/mn10300/include/asm/user.h
@@ -0,0 +1,53 @@
1/* MN10300 User process data
2 *
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _ASM_USER_H
12#define _ASM_USER_H
13
14#include <asm/page.h>
15#include <linux/ptrace.h>
16
17#ifndef __ASSEMBLY__
18/*
19 * When the kernel dumps core, it starts by dumping the user struct - this will
20 * be used by gdb to figure out where the data and stack segments are within
21 * the file, and what virtual addresses to use.
22 */
23struct user {
24 /* We start with the registers, to mimic the way that "memory" is
25 * returned from the ptrace(3,...) function.
26 */
27 struct pt_regs regs; /* Where the registers are actually stored */
28
29 /* The rest of this junk is to help gdb figure out what goes where */
30 unsigned long int u_tsize; /* Text segment size (pages). */
31 unsigned long int u_dsize; /* Data segment size (pages). */
32 unsigned long int u_ssize; /* Stack segment size (pages). */
33 unsigned long start_code; /* Starting virtual address of text. */
34 unsigned long start_stack; /* Starting virtual address of stack area.
35 This is actually the bottom of the stack,
36 the top of the stack is always found in the
37 esp register. */
38 long int signal; /* Signal that caused the core dump. */
39 int reserved; /* No longer used */
40 struct user_pt_regs *u_ar0; /* Used by gdb to help find the values for */
41
42 /* the registers */
43 unsigned long magic; /* To uniquely identify a core file */
44 char u_comm[32]; /* User command that was responsible */
45};
46#endif
47
48#define NBPG PAGE_SIZE
49#define UPAGES 1
50#define HOST_TEXT_START_ADDR +(u.start_code)
51#define HOST_STACK_END_ADDR +(u.start_stack + u.u_ssize * NBPG)
52
53#endif /* _ASM_USER_H */
diff --git a/arch/mn10300/include/asm/vga.h b/arch/mn10300/include/asm/vga.h
new file mode 100644
index 000000000000..0163e50a3459
--- /dev/null
+++ b/arch/mn10300/include/asm/vga.h
@@ -0,0 +1,17 @@
1/* MN10300 VGA register definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_VGA_H
13#define _ASM_VGA_H
14
15
16
17#endif /* _ASM_VGA_H */
diff --git a/arch/mn10300/include/asm/xor.h b/arch/mn10300/include/asm/xor.h
new file mode 100644
index 000000000000..c82eb12a5b18
--- /dev/null
+++ b/arch/mn10300/include/asm/xor.h
@@ -0,0 +1 @@
#include <asm-generic/xor.h>
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-23 08:13:20 -0400