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-rw-r--r--arch/mips/Kconfig1
-rw-r--r--arch/mips/alchemy/common/dbdma.c11
-rw-r--r--arch/mips/ar7/platform.c2
-rw-r--r--arch/mips/ar7/prom.c15
-rw-r--r--arch/mips/bcm63xx/boards/board_bcm963xx.c33
-rw-r--r--arch/mips/bcm63xx/prom.c3
-rw-r--r--arch/mips/boot/.gitignore1
-rw-r--r--arch/mips/boot/Makefile2
-rw-r--r--arch/mips/boot/compressed/Makefile18
-rw-r--r--arch/mips/boot/compressed/decompress.c14
-rw-r--r--arch/mips/boot/compressed/ld.script195
-rw-r--r--arch/mips/cavium-octeon/csrc-octeon.c32
-rw-r--r--arch/mips/cobalt/setup.c24
-rw-r--r--arch/mips/configs/ip27_defconfig917
-rw-r--r--arch/mips/include/asm/cpu-features.h7
-rw-r--r--arch/mips/include/asm/cpu-info.h3
-rw-r--r--arch/mips/include/asm/irq.h1
-rw-r--r--arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h1
-rw-r--r--arch/mips/include/asm/mach-ip27/topology.h4
-rw-r--r--arch/mips/include/asm/mach-powertv/asic_reg_map.h90
-rw-r--r--arch/mips/include/asm/mach-powertv/asic_regs.h135
-rw-r--r--arch/mips/include/asm/mipsregs.h12
-rw-r--r--arch/mips/include/asm/pgtable-64.h4
-rw-r--r--arch/mips/kernel/cevt-r4k.c2
-rw-r--r--arch/mips/kernel/cpu-probe.c11
-rw-r--r--arch/mips/kernel/traps.c7
-rw-r--r--arch/mips/mipssim/sim_setup.c4
-rw-r--r--arch/mips/mm/c-octeon.c4
-rw-r--r--arch/mips/mm/cache.c2
-rw-r--r--arch/mips/mm/init.c2
-rw-r--r--arch/mips/mm/tlbex.c8
-rw-r--r--arch/mips/mti-malta/malta-init.c1
-rw-r--r--arch/mips/powertv/Makefile2
-rw-r--r--arch/mips/powertv/asic/asic-calliope.c131
-rw-r--r--arch/mips/powertv/asic/asic-cronus.c131
-rw-r--r--arch/mips/powertv/asic/asic-zeus.c131
-rw-r--r--arch/mips/powertv/asic/asic_devices.c46
-rw-r--r--arch/mips/powertv/cmdline.c52
-rw-r--r--arch/mips/powertv/init.c15
-rw-r--r--arch/mips/powertv/init.h2
-rw-r--r--arch/mips/powertv/memory.c5
-rw-r--r--arch/mips/powertv/powertv_setup.c21
-rw-r--r--arch/mips/powertv/reset.c18
-rw-r--r--arch/mips/powertv/time.c1
-rw-r--r--arch/mips/sgi-ip27/ip27-memory.c2
-rw-r--r--arch/mips/sni/rm200.c2
-rw-r--r--arch/mips/txx9/generic/setup.c21
-rw-r--r--arch/mips/vr41xx/common/init.c6
48 files changed, 1292 insertions, 860 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 9541171f1220..8b5d174685f0 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1311,6 +1311,7 @@ config SYS_SUPPORTS_ZBOOT
1311 select HAVE_KERNEL_GZIP 1311 select HAVE_KERNEL_GZIP
1312 select HAVE_KERNEL_BZIP2 1312 select HAVE_KERNEL_BZIP2
1313 select HAVE_KERNEL_LZMA 1313 select HAVE_KERNEL_LZMA
1314 select HAVE_KERNEL_LZO
1314 1315
1315config SYS_SUPPORTS_ZBOOT_UART16550 1316config SYS_SUPPORTS_ZBOOT_UART16550
1316 bool 1317 bool
diff --git a/arch/mips/alchemy/common/dbdma.c b/arch/mips/alchemy/common/dbdma.c
index 19c1c82849ff..f9201ca2295b 100644
--- a/arch/mips/alchemy/common/dbdma.c
+++ b/arch/mips/alchemy/common/dbdma.c
@@ -412,8 +412,11 @@ u32 au1xxx_dbdma_ring_alloc(u32 chanid, int entries)
412 if (desc_base == 0) 412 if (desc_base == 0)
413 return 0; 413 return 0;
414 414
415 ctp->cdb_membase = desc_base;
415 desc_base = ALIGN_ADDR(desc_base, sizeof(au1x_ddma_desc_t)); 416 desc_base = ALIGN_ADDR(desc_base, sizeof(au1x_ddma_desc_t));
416 } 417 } else
418 ctp->cdb_membase = desc_base;
419
417 dp = (au1x_ddma_desc_t *)desc_base; 420 dp = (au1x_ddma_desc_t *)desc_base;
418 421
419 /* Keep track of the base descriptor. */ 422 /* Keep track of the base descriptor. */
@@ -613,7 +616,7 @@ u32 _au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes, u32 flags)
613 dma_cache_wback_inv((unsigned long)buf, nbytes); 616 dma_cache_wback_inv((unsigned long)buf, nbytes);
614 dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */ 617 dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
615 au_sync(); 618 au_sync();
616 dma_cache_wback_inv((unsigned long)dp, sizeof(dp)); 619 dma_cache_wback_inv((unsigned long)dp, sizeof(*dp));
617 ctp->chan_ptr->ddma_dbell = 0; 620 ctp->chan_ptr->ddma_dbell = 0;
618 621
619 /* Get next descriptor pointer. */ 622 /* Get next descriptor pointer. */
@@ -676,7 +679,7 @@ _au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes, u32 flags)
676 dma_cache_inv((unsigned long)buf, nbytes); 679 dma_cache_inv((unsigned long)buf, nbytes);
677 dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */ 680 dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
678 au_sync(); 681 au_sync();
679 dma_cache_wback_inv((unsigned long)dp, sizeof(dp)); 682 dma_cache_wback_inv((unsigned long)dp, sizeof(*dp));
680 ctp->chan_ptr->ddma_dbell = 0; 683 ctp->chan_ptr->ddma_dbell = 0;
681 684
682 /* Get next descriptor pointer. */ 685 /* Get next descriptor pointer. */
@@ -831,7 +834,7 @@ void au1xxx_dbdma_chan_free(u32 chanid)
831 834
832 au1xxx_dbdma_stop(chanid); 835 au1xxx_dbdma_stop(chanid);
833 836
834 kfree((void *)ctp->chan_desc_base); 837 kfree((void *)ctp->cdb_membase);
835 838
836 stp->dev_flags &= ~DEV_FLAGS_INUSE; 839 stp->dev_flags &= ~DEV_FLAGS_INUSE;
837 dtp->dev_flags &= ~DEV_FLAGS_INUSE; 840 dtp->dev_flags &= ~DEV_FLAGS_INUSE;
diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c
index 85169c08d8dc..f70a10a8cc96 100644
--- a/arch/mips/ar7/platform.c
+++ b/arch/mips/ar7/platform.c
@@ -202,7 +202,7 @@ static struct resource usb_res[] = {
202 .name = "mem", 202 .name = "mem",
203 .flags = IORESOURCE_MEM, 203 .flags = IORESOURCE_MEM,
204 .start = 0x03400000, 204 .start = 0x03400000,
205 .end = 0x034001fff, 205 .end = 0x03401fff,
206 }, 206 },
207}; 207};
208 208
diff --git a/arch/mips/ar7/prom.c b/arch/mips/ar7/prom.c
index 5ad6f1db6567..c1fdd3682812 100644
--- a/arch/mips/ar7/prom.c
+++ b/arch/mips/ar7/prom.c
@@ -219,14 +219,6 @@ static void __init console_config(void)
219 if (strstr(prom_getcmdline(), "console=")) 219 if (strstr(prom_getcmdline(), "console="))
220 return; 220 return;
221 221
222#ifdef CONFIG_KGDB
223 if (!strstr(prom_getcmdline(), "nokgdb")) {
224 strcat(prom_getcmdline(), " console=kgdb");
225 kgdb_enabled = 1;
226 return;
227 }
228#endif
229
230 s = prom_getenv("modetty0"); 222 s = prom_getenv("modetty0");
231 if (s) { 223 if (s) {
232 baud = simple_strtoul(s, &p, 10); 224 baud = simple_strtoul(s, &p, 10);
@@ -280,13 +272,6 @@ static inline void serial_out(int offset, int value)
280 writel(value, (void *)PORT(offset)); 272 writel(value, (void *)PORT(offset));
281} 273}
282 274
283char prom_getchar(void)
284{
285 while (!(serial_in(UART_LSR) & UART_LSR_DR))
286 ;
287 return serial_in(UART_RX);
288}
289
290int prom_putchar(char c) 275int prom_putchar(char c)
291{ 276{
292 while ((serial_in(UART_LSR) & UART_LSR_TEMT) == 0) 277 while ((serial_in(UART_LSR) & UART_LSR_TEMT) == 0)
diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c b/arch/mips/bcm63xx/boards/board_bcm963xx.c
index 05a35cf5963d..1fe412c43171 100644
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -346,27 +346,26 @@ static struct board_info __initdata board_96348gw = {
346}; 346};
347 347
348static struct board_info __initdata board_FAST2404 = { 348static struct board_info __initdata board_FAST2404 = {
349 .name = "F@ST2404", 349 .name = "F@ST2404",
350 .expected_cpu_id = 0x6348, 350 .expected_cpu_id = 0x6348,
351
352 .has_enet0 = 1,
353 .has_enet1 = 1,
354 .has_pci = 1,
355 351
356 .enet0 = { 352 .has_enet0 = 1,
357 .has_phy = 1, 353 .has_enet1 = 1,
358 .use_internal_phy = 1, 354 .has_pci = 1,
359 },
360 355
361 .enet1 = { 356 .enet0 = {
362 .force_speed_100 = 1, 357 .has_phy = 1,
363 .force_duplex_full = 1, 358 .use_internal_phy = 1,
364 }, 359 },
365 360
361 .enet1 = {
362 .force_speed_100 = 1,
363 .force_duplex_full = 1,
364 },
366 365
367 .has_ohci0 = 1, 366 .has_ohci0 = 1,
368 .has_pccard = 1, 367 .has_pccard = 1,
369 .has_ehci0 = 1, 368 .has_ehci0 = 1,
370}; 369};
371 370
372static struct board_info __initdata board_DV201AMR = { 371static struct board_info __initdata board_DV201AMR = {
diff --git a/arch/mips/bcm63xx/prom.c b/arch/mips/bcm63xx/prom.c
index fb284fbc5853..be252efa0757 100644
--- a/arch/mips/bcm63xx/prom.c
+++ b/arch/mips/bcm63xx/prom.c
@@ -40,9 +40,6 @@ void __init prom_init(void)
40 reg &= ~mask; 40 reg &= ~mask;
41 bcm_perf_writel(reg, PERF_CKCTL_REG); 41 bcm_perf_writel(reg, PERF_CKCTL_REG);
42 42
43 /* assign command line from kernel config */
44 strcpy(arcs_cmdline, CONFIG_CMDLINE);
45
46 /* register gpiochip */ 43 /* register gpiochip */
47 bcm63xx_gpio_init(); 44 bcm63xx_gpio_init();
48 45
diff --git a/arch/mips/boot/.gitignore b/arch/mips/boot/.gitignore
index ba63401c6e10..4667a5f9280b 100644
--- a/arch/mips/boot/.gitignore
+++ b/arch/mips/boot/.gitignore
@@ -1,4 +1,5 @@
1mkboot 1mkboot
2elf2ecoff 2elf2ecoff
3vmlinux.*
3zImage 4zImage
4zImage.tmp 5zImage.tmp
diff --git a/arch/mips/boot/Makefile b/arch/mips/boot/Makefile
index 094bc84765a3..e39a08edcaaa 100644
--- a/arch/mips/boot/Makefile
+++ b/arch/mips/boot/Makefile
@@ -28,7 +28,7 @@ VMLINUX = vmlinux
28all: vmlinux.ecoff vmlinux.srec 28all: vmlinux.ecoff vmlinux.srec
29 29
30vmlinux.ecoff: $(obj)/elf2ecoff $(VMLINUX) 30vmlinux.ecoff: $(obj)/elf2ecoff $(VMLINUX)
31 $(obj)/elf2ecoff $(VMLINUX) vmlinux.ecoff $(E2EFLAGS) 31 $(obj)/elf2ecoff $(VMLINUX) $(obj)/vmlinux.ecoff $(E2EFLAGS)
32 32
33$(obj)/elf2ecoff: $(obj)/elf2ecoff.c 33$(obj)/elf2ecoff: $(obj)/elf2ecoff.c
34 $(HOSTCC) -o $@ $^ 34 $(HOSTCC) -o $@ $^
diff --git a/arch/mips/boot/compressed/Makefile b/arch/mips/boot/compressed/Makefile
index e27f40bbd4e5..9df903d714d7 100644
--- a/arch/mips/boot/compressed/Makefile
+++ b/arch/mips/boot/compressed/Makefile
@@ -14,8 +14,11 @@
14 14
15# compressed kernel load addr: VMLINUZ_LOAD_ADDRESS > VMLINUX_LOAD_ADDRESS + VMLINUX_SIZE 15# compressed kernel load addr: VMLINUZ_LOAD_ADDRESS > VMLINUX_LOAD_ADDRESS + VMLINUX_SIZE
16VMLINUX_SIZE := $(shell wc -c $(objtree)/$(KBUILD_IMAGE) 2>/dev/null | cut -d' ' -f1) 16VMLINUX_SIZE := $(shell wc -c $(objtree)/$(KBUILD_IMAGE) 2>/dev/null | cut -d' ' -f1)
17VMLINUX_SIZE := $(shell [ -n "$(VMLINUX_SIZE)" ] && echo $$(($(VMLINUX_SIZE) + (65536 - $(VMLINUX_SIZE) % 65536)))) 17VMLINUX_SIZE := $(shell [ -n "$(VMLINUX_SIZE)" ] && echo -n $$(($(VMLINUX_SIZE) + (65536 - $(VMLINUX_SIZE) % 65536))))
18VMLINUZ_LOAD_ADDRESS := 0x$(shell [ -n "$(VMLINUX_SIZE)" ] && printf %x $$(($(VMLINUX_LOAD_ADDRESS) + $(VMLINUX_SIZE)))) 18# VMLINUZ_LOAD_ADDRESS = concat "high32 of VMLINUX_LOAD_ADDRESS" and "(low32 of VMLINUX_LOAD_ADDRESS) + VMLINUX_SIZE"
19HIGH32 := $(shell A=$(VMLINUX_LOAD_ADDRESS); [ $${\#A} -gt 10 ] && expr substr "$(VMLINUX_LOAD_ADDRESS)" 3 $$(($${\#A} - 10)))
20LOW32 := $(shell [ -n "$(HIGH32)" ] && A=11 || A=3; expr substr "$(VMLINUX_LOAD_ADDRESS)" $${A} 8)
21VMLINUZ_LOAD_ADDRESS := 0x$(shell [ -n "$(VMLINUX_SIZE)" -a -n "$(LOW32)" ] && printf "$(HIGH32)%08x" $$(($(VMLINUX_SIZE) + 0x$(LOW32))))
19 22
20# set the default size of the mallocing area for decompressing 23# set the default size of the mallocing area for decompressing
21BOOT_HEAP_SIZE := 0x400000 24BOOT_HEAP_SIZE := 0x400000
@@ -41,9 +44,11 @@ $(obj)/vmlinux.bin: $(KBUILD_IMAGE)
41suffix_$(CONFIG_KERNEL_GZIP) = gz 44suffix_$(CONFIG_KERNEL_GZIP) = gz
42suffix_$(CONFIG_KERNEL_BZIP2) = bz2 45suffix_$(CONFIG_KERNEL_BZIP2) = bz2
43suffix_$(CONFIG_KERNEL_LZMA) = lzma 46suffix_$(CONFIG_KERNEL_LZMA) = lzma
47suffix_$(CONFIG_KERNEL_LZO) = lzo
44tool_$(CONFIG_KERNEL_GZIP) = gzip 48tool_$(CONFIG_KERNEL_GZIP) = gzip
45tool_$(CONFIG_KERNEL_BZIP2) = bzip2 49tool_$(CONFIG_KERNEL_BZIP2) = bzip2
46tool_$(CONFIG_KERNEL_LZMA) = lzma 50tool_$(CONFIG_KERNEL_LZMA) = lzma
51tool_$(CONFIG_KERNEL_LZO) = lzo
47$(obj)/vmlinux.$(suffix_y): $(obj)/vmlinux.bin 52$(obj)/vmlinux.$(suffix_y): $(obj)/vmlinux.bin
48 $(call if_changed,$(tool_y)) 53 $(call if_changed,$(tool_y))
49 54
@@ -56,7 +61,7 @@ $(obj)/piggy.o: $(obj)/vmlinux.$(suffix_y) $(obj)/dummy.o
56LDFLAGS_vmlinuz := $(LDFLAGS) -Ttext $(VMLINUZ_LOAD_ADDRESS) -T 61LDFLAGS_vmlinuz := $(LDFLAGS) -Ttext $(VMLINUZ_LOAD_ADDRESS) -T
57vmlinuz: $(src)/ld.script $(obj-y) $(obj)/piggy.o 62vmlinuz: $(src)/ld.script $(obj-y) $(obj)/piggy.o
58 $(call if_changed,ld) 63 $(call if_changed,ld)
59 $(Q)$(OBJCOPY) $(OBJCOPYFLAGS) -R .comment -R .stab -R .stabstr -R .initrd -R .sysmap $@ 64 $(Q)$(OBJCOPY) $(OBJCOPYFLAGS) $@
60 65
61# 66#
62# Some DECstations need all possible sections of an ECOFF executable 67# Some DECstations need all possible sections of an ECOFF executable
@@ -84,14 +89,11 @@ vmlinuz.ecoff: $(obj)/../elf2ecoff $(VMLINUZ)
84$(obj)/../elf2ecoff: $(src)/../elf2ecoff.c 89$(obj)/../elf2ecoff: $(src)/../elf2ecoff.c
85 $(Q)$(HOSTCC) -o $@ $^ 90 $(Q)$(HOSTCC) -o $@ $^
86 91
87drop-sections = .reginfo .mdebug .comment .note .pdr .options .MIPS.options 92OBJCOPYFLAGS_vmlinuz.bin := $(OBJCOPYFLAGS) -O binary
88strip-flags = $(addprefix --remove-section=,$(drop-sections))
89
90OBJCOPYFLAGS_vmlinuz.bin := $(OBJCOPYFLAGS) -O binary $(strip-flags)
91vmlinuz.bin: vmlinuz 93vmlinuz.bin: vmlinuz
92 $(call if_changed,objcopy) 94 $(call if_changed,objcopy)
93 95
94OBJCOPYFLAGS_vmlinuz.srec := $(OBJCOPYFLAGS) -S -O srec $(strip-flags) 96OBJCOPYFLAGS_vmlinuz.srec := $(OBJCOPYFLAGS) -S -O srec
95vmlinuz.srec: vmlinuz 97vmlinuz.srec: vmlinuz
96 $(call if_changed,objcopy) 98 $(call if_changed,objcopy)
97 99
diff --git a/arch/mips/boot/compressed/decompress.c b/arch/mips/boot/compressed/decompress.c
index 67330c2f7318..55d02b3a6712 100644
--- a/arch/mips/boot/compressed/decompress.c
+++ b/arch/mips/boot/compressed/decompress.c
@@ -28,8 +28,6 @@ char *zimage_start;
28 28
29/* The linker tells us where the image is. */ 29/* The linker tells us where the image is. */
30extern unsigned char __image_begin, __image_end; 30extern unsigned char __image_begin, __image_end;
31extern unsigned char __ramdisk_begin, __ramdisk_end;
32unsigned long initrd_size;
33 31
34/* debug interfaces */ 32/* debug interfaces */
35extern void puts(const char *s); 33extern void puts(const char *s);
@@ -79,6 +77,10 @@ void *memset(void *s, int c, size_t n)
79#include "../../../../lib/decompress_unlzma.c" 77#include "../../../../lib/decompress_unlzma.c"
80#endif 78#endif
81 79
80#ifdef CONFIG_KERNEL_LZO
81#include "../../../../lib/decompress_unlzo.c"
82#endif
83
82void decompress_kernel(unsigned long boot_heap_start) 84void decompress_kernel(unsigned long boot_heap_start)
83{ 85{
84 int zimage_size; 86 int zimage_size;
@@ -102,14 +104,6 @@ void decompress_kernel(unsigned long boot_heap_start)
102 puthex((unsigned long)(zimage_size + zimage_start)); 104 puthex((unsigned long)(zimage_size + zimage_start));
103 puts("\n"); 105 puts("\n");
104 106
105 if (initrd_size) {
106 puts("initrd at: ");
107 puthex((unsigned long)(&__ramdisk_begin));
108 puts(" ");
109 puthex((unsigned long)(&__ramdisk_end));
110 puts("\n");
111 }
112
113 /* this area are prepared for mallocing when decompressing */ 107 /* this area are prepared for mallocing when decompressing */
114 free_mem_ptr = boot_heap_start; 108 free_mem_ptr = boot_heap_start;
115 free_mem_end_ptr = boot_heap_start + BOOT_HEAP_SIZE; 109 free_mem_end_ptr = boot_heap_start + BOOT_HEAP_SIZE;
diff --git a/arch/mips/boot/compressed/ld.script b/arch/mips/boot/compressed/ld.script
index 29e9f4c0d5d8..613a35b02f50 100644
--- a/arch/mips/boot/compressed/ld.script
+++ b/arch/mips/boot/compressed/ld.script
@@ -1,150 +1,67 @@
1/*
2 * ld.script for compressed kernel support of MIPS
3 *
4 * Copyright (C) 2009 Lemote Inc.
5 * Author: Wu Zhangjin <wuzj@lemote.com>
6 */
7
1OUTPUT_ARCH(mips) 8OUTPUT_ARCH(mips)
2ENTRY(start) 9ENTRY(start)
3SECTIONS 10SECTIONS
4{ 11{
5 /* Read-only sections, merged into text segment: */ 12 /* . = VMLINUZ_LOAD_ADDRESS */
6 .init : { *(.init) } =0 13 /* read-only */
7 .text : 14 _text = .; /* Text and read-only data */
8 { 15 .text : {
9 _ftext = . ; 16 _ftext = . ;
10 *(.text) 17 *(.text)
11 *(.rodata) 18 *(.rodata)
12 *(.rodata1) 19 } = 0
13 /* .gnu.warning sections are handled specially by elf32.em. */ 20 _etext = .; /* End of text section */
14 *(.gnu.warning)
15 } =0
16 .kstrtab : { *(.kstrtab) }
17
18 . = ALIGN(16); /* Exception table */
19 __start___ex_table = .;
20 __ex_table : { *(__ex_table) }
21 __stop___ex_table = .;
22
23 __start___dbe_table = .; /* Exception table for data bus errors */
24 __dbe_table : { *(__dbe_table) }
25 __stop___dbe_table = .;
26
27 __start___ksymtab = .; /* Kernel symbol table */
28 __ksymtab : { *(__ksymtab) }
29 __stop___ksymtab = .;
30
31 _etext = .;
32
33 . = ALIGN(8192);
34 .data.init_task : { *(.data.init_task) }
35
36 /* Startup code */
37 . = ALIGN(4096);
38 __init_begin = .;
39 .text.init : { *(.text.init) }
40 .data.init : { *(.data.init) }
41 . = ALIGN(16);
42 __setup_start = .;
43 .setup.init : { *(.setup.init) }
44 __setup_end = .;
45 __initcall_start = .;
46 .initcall.init : { *(.initcall.init) }
47 __initcall_end = .;
48 . = ALIGN(4096); /* Align double page for init_task_union */
49 __init_end = .;
50
51 . = ALIGN(4096);
52 .data.page_aligned : { *(.data.idt) }
53
54 . = ALIGN(32);
55 .data.cacheline_aligned : { *(.data.cacheline_aligned) }
56 21
57 .fini : { *(.fini) } =0 22 /* writable */
58 .reginfo : { *(.reginfo) } 23 .data : { /* Data */
59 /* Adjust the address for the data segment. We want to adjust up to 24 _fdata = . ;
60 the same address within the page on the next page up. It would 25 *(.data)
61 be more correct to do this: 26 /* Put the compressed image here, so bss is on the end. */
62 . = .; 27 __image_begin = .;
63 The current expression does not correctly handle the case of a 28 *(.image)
64 text segment ending precisely at the end of a page; it causes the 29 __image_end = .;
65 data segment to skip a page. The above expression does not have 30 CONSTRUCTORS
66 this problem, but it will currently (2/95) cause BFD to allocate 31 }
67 a single segment, combining both text and data, for this case. 32 .sdata : { *(.sdata) }
68 This will prevent the text segment from being shared among 33 . = ALIGN(4);
69 multiple executions of the program; I think that is more 34 _edata = .; /* End of data section */
70 important than losing a page of the virtual address space (note
71 that no actual memory is lost; the page which is skipped can not
72 be referenced). */
73 . = .;
74 .data :
75 {
76 _fdata = . ;
77 *(.data)
78 35
79 /* Put the compressed image here, so bss is on the end. */ 36 /* BSS */
80 __image_begin = .; 37 __bss_start = .;
81 *(.image) 38 _fbss = .;
82 __image_end = .; 39 .sbss : { *(.sbss) *(.scommon) }
83 /* Align the initial ramdisk image (INITRD) on page boundaries. */ 40 .bss : {
84 . = ALIGN(4096); 41 *(.dynbss)
85 __ramdisk_begin = .; 42 *(.bss)
86 *(.initrd) 43 *(COMMON)
87 __ramdisk_end = .; 44 }
88 . = ALIGN(4096); 45 . = ALIGN(4);
46 _end = . ;
89 47
90 CONSTRUCTORS 48 /* These are needed for ELF backends which have not yet been converted
91 } 49 * to the new style linker. */
92 .data1 : { *(.data1) }
93 _gp = . + 0x8000;
94 .lit8 : { *(.lit8) }
95 .lit4 : { *(.lit4) }
96 .ctors : { *(.ctors) }
97 .dtors : { *(.dtors) }
98 .got : { *(.got.plt) *(.got) }
99 .dynamic : { *(.dynamic) }
100 /* We want the small data sections together, so single-instruction offsets
101 can access them all, and initialized data all before uninitialized, so
102 we can shorten the on-disk segment size. */
103 .sdata : { *(.sdata) }
104 . = ALIGN(4);
105 _edata = .;
106 PROVIDE (edata = .);
107 50
108 __bss_start = .; 51 .stab 0 : { *(.stab) }
109 _fbss = .; 52 .stabstr 0 : { *(.stabstr) }
110 .sbss : { *(.sbss) *(.scommon) }
111 .bss :
112 {
113 *(.dynbss)
114 *(.bss)
115 *(COMMON)
116 . = ALIGN(4);
117 _end = . ;
118 PROVIDE (end = .);
119 }
120 53
121 /* Sections to be discarded */ 54 /* These must appear regardless of . */
122 /DISCARD/ : 55 .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) }
123 { 56 .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) }
124 *(.text.exit)
125 *(.data.exit)
126 *(.exitcall.exit)
127 }
128 57
129 /* This is the MIPS specific mdebug section. */ 58 /* Sections to be discarded */
130 .mdebug : { *(.mdebug) } 59 /DISCARD/ : {
131 /* These are needed for ELF backends which have not yet been 60 *(.MIPS.options)
132 converted to the new style linker. */ 61 *(.options)
133 .stab 0 : { *(.stab) } 62 *(.pdr)
134 .stabstr 0 : { *(.stabstr) } 63 *(.reginfo)
135 /* DWARF debug sections. 64 *(.comment)
136 Symbols in the .debug DWARF section are relative to the beginning of the 65 *(.note)
137 section so we begin .debug at 0. It's not clear yet what needs to happen 66 }
138 for the others. */
139 .debug 0 : { *(.debug) }
140 .debug_srcinfo 0 : { *(.debug_srcinfo) }
141 .debug_aranges 0 : { *(.debug_aranges) }
142 .debug_pubnames 0 : { *(.debug_pubnames) }
143 .debug_sfnames 0 : { *(.debug_sfnames) }
144 .line 0 : { *(.line) }
145 /* These must appear regardless of . */
146 .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) }
147 .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) }
148 .comment : { *(.comment) }
149 .note : { *(.note) }
150} 67}
diff --git a/arch/mips/cavium-octeon/csrc-octeon.c b/arch/mips/cavium-octeon/csrc-octeon.c
index 96110f217dcd..0bf4bbe04ae2 100644
--- a/arch/mips/cavium-octeon/csrc-octeon.c
+++ b/arch/mips/cavium-octeon/csrc-octeon.c
@@ -50,6 +50,38 @@ static struct clocksource clocksource_mips = {
50 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 50 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
51}; 51};
52 52
53unsigned long long notrace sched_clock(void)
54{
55 /* 64-bit arithmatic can overflow, so use 128-bit. */
56#if (__GNUC__ < 4) || ((__GNUC__ == 4) && (__GNUC_MINOR__ <= 3))
57 u64 t1, t2, t3;
58 unsigned long long rv;
59 u64 mult = clocksource_mips.mult;
60 u64 shift = clocksource_mips.shift;
61 u64 cnt = read_c0_cvmcount();
62
63 asm (
64 "dmultu\t%[cnt],%[mult]\n\t"
65 "nor\t%[t1],$0,%[shift]\n\t"
66 "mfhi\t%[t2]\n\t"
67 "mflo\t%[t3]\n\t"
68 "dsll\t%[t2],%[t2],1\n\t"
69 "dsrlv\t%[rv],%[t3],%[shift]\n\t"
70 "dsllv\t%[t1],%[t2],%[t1]\n\t"
71 "or\t%[rv],%[t1],%[rv]\n\t"
72 : [rv] "=&r" (rv), [t1] "=&r" (t1), [t2] "=&r" (t2), [t3] "=&r" (t3)
73 : [cnt] "r" (cnt), [mult] "r" (mult), [shift] "r" (shift)
74 : "hi", "lo");
75 return rv;
76#else
77 /* GCC > 4.3 do it the easy way. */
78 unsigned int __attribute__((mode(TI))) t;
79 t = read_c0_cvmcount();
80 t = t * clocksource_mips.mult;
81 return (unsigned long long)(t >> clocksource_mips.shift);
82#endif
83}
84
53void __init plat_time_init(void) 85void __init plat_time_init(void)
54{ 86{
55 clocksource_mips.rating = 300; 87 clocksource_mips.rating = 300;
diff --git a/arch/mips/cobalt/setup.c b/arch/mips/cobalt/setup.c
index b51644227241..ec3b2c417f7c 100644
--- a/arch/mips/cobalt/setup.c
+++ b/arch/mips/cobalt/setup.c
@@ -97,26 +97,18 @@ void __init plat_mem_setup(void)
97 97
98void __init prom_init(void) 98void __init prom_init(void)
99{ 99{
100 int narg, indx, posn, nchr;
101 unsigned long memsz; 100 unsigned long memsz;
101 int argc, i;
102 char **argv; 102 char **argv;
103 103
104 memsz = fw_arg0 & 0x7fff0000; 104 memsz = fw_arg0 & 0x7fff0000;
105 narg = fw_arg0 & 0x0000ffff; 105 argc = fw_arg0 & 0x0000ffff;
106 106 argv = (char **)fw_arg1;
107 if (narg) { 107
108 arcs_cmdline[0] = '\0'; 108 for (i = 1; i < argc; i++) {
109 argv = (char **) fw_arg1; 109 strlcat(arcs_cmdline, argv[i], COMMAND_LINE_SIZE);
110 posn = 0; 110 if (i < (argc - 1))
111 for (indx = 1; indx < narg; ++indx) { 111 strlcat(arcs_cmdline, " ", COMMAND_LINE_SIZE);
112 nchr = strlen(argv[indx]);
113 if (posn + 1 + nchr + 1 > sizeof(arcs_cmdline))
114 break;
115 if (posn)
116 arcs_cmdline[posn++] = ' ';
117 strcpy(arcs_cmdline + posn, argv[indx]);
118 posn += nchr;
119 }
120 } 112 }
121 113
122 add_memory_region(0x0, memsz, BOOT_MEM_RAM); 114 add_memory_region(0x0, memsz, BOOT_MEM_RAM);
diff --git a/arch/mips/configs/ip27_defconfig b/arch/mips/configs/ip27_defconfig
index ed84b4cb3c8d..84b6503f10b9 100644
--- a/arch/mips/configs/ip27_defconfig
+++ b/arch/mips/configs/ip27_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.23-rc2 3# Linux kernel version: 2.6.33-rc6
4# Tue Aug 7 13:04:24 2007 4# Wed Feb 3 18:12:31 2010
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7 7
@@ -9,20 +9,28 @@ CONFIG_MIPS=y
9# Machine selection 9# Machine selection
10# 10#
11# CONFIG_MACH_ALCHEMY is not set 11# CONFIG_MACH_ALCHEMY is not set
12# CONFIG_AR7 is not set
13# CONFIG_BCM47XX is not set
14# CONFIG_BCM63XX is not set
12# CONFIG_MIPS_COBALT is not set 15# CONFIG_MIPS_COBALT is not set
13# CONFIG_MACH_DECSTATION is not set 16# CONFIG_MACH_DECSTATION is not set
14# CONFIG_MACH_JAZZ is not set 17# CONFIG_MACH_JAZZ is not set
15# CONFIG_LEMOTE_FULONG is not set 18# CONFIG_LASAT is not set
19# CONFIG_MACH_LOONGSON is not set
16# CONFIG_MIPS_MALTA is not set 20# CONFIG_MIPS_MALTA is not set
17# CONFIG_MIPS_SIM is not set 21# CONFIG_MIPS_SIM is not set
18# CONFIG_MARKEINS is not set 22# CONFIG_NEC_MARKEINS is not set
19# CONFIG_MACH_VR41XX is not set 23# CONFIG_MACH_VR41XX is not set
24# CONFIG_NXP_STB220 is not set
25# CONFIG_NXP_STB225 is not set
20# CONFIG_PNX8550_JBS is not set 26# CONFIG_PNX8550_JBS is not set
21# CONFIG_PNX8550_STB810 is not set 27# CONFIG_PNX8550_STB810 is not set
22# CONFIG_PMC_MSP is not set 28# CONFIG_PMC_MSP is not set
23# CONFIG_PMC_YOSEMITE is not set 29# CONFIG_PMC_YOSEMITE is not set
30# CONFIG_POWERTV is not set
24# CONFIG_SGI_IP22 is not set 31# CONFIG_SGI_IP22 is not set
25CONFIG_SGI_IP27=y 32CONFIG_SGI_IP27=y
33# CONFIG_SGI_IP28 is not set
26# CONFIG_SGI_IP32 is not set 34# CONFIG_SGI_IP32 is not set
27# CONFIG_SIBYTE_CRHINE is not set 35# CONFIG_SIBYTE_CRHINE is not set
28# CONFIG_SIBYTE_CARMEL is not set 36# CONFIG_SIBYTE_CARMEL is not set
@@ -33,32 +41,39 @@ CONFIG_SGI_IP27=y
33# CONFIG_SIBYTE_SENTOSA is not set 41# CONFIG_SIBYTE_SENTOSA is not set
34# CONFIG_SIBYTE_BIGSUR is not set 42# CONFIG_SIBYTE_BIGSUR is not set
35# CONFIG_SNI_RM is not set 43# CONFIG_SNI_RM is not set
36# CONFIG_TOSHIBA_JMR3927 is not set 44# CONFIG_MACH_TX39XX is not set
37# CONFIG_TOSHIBA_RBTX4927 is not set 45# CONFIG_MACH_TX49XX is not set
38# CONFIG_TOSHIBA_RBTX4938 is not set 46# CONFIG_MIKROTIK_RB532 is not set
39# CONFIG_WR_PPMC is not set 47# CONFIG_WR_PPMC is not set
48# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
49# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
50# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
40CONFIG_SGI_SN_M_MODE=y 51CONFIG_SGI_SN_M_MODE=y
41# CONFIG_SGI_SN_N_MODE is not set 52# CONFIG_SGI_SN_N_MODE is not set
42# CONFIG_MAPPED_KERNEL is not set 53# CONFIG_MAPPED_KERNEL is not set
43# CONFIG_REPLICATE_KTEXT is not set 54# CONFIG_REPLICATE_KTEXT is not set
44# CONFIG_REPLICATE_EXHANDLERS is not set 55# CONFIG_REPLICATE_EXHANDLERS is not set
56CONFIG_LOONGSON_UART_BASE=y
45CONFIG_RWSEM_GENERIC_SPINLOCK=y 57CONFIG_RWSEM_GENERIC_SPINLOCK=y
46# CONFIG_ARCH_HAS_ILOG2_U32 is not set 58# CONFIG_ARCH_HAS_ILOG2_U32 is not set
47# CONFIG_ARCH_HAS_ILOG2_U64 is not set 59# CONFIG_ARCH_HAS_ILOG2_U64 is not set
60CONFIG_ARCH_SUPPORTS_OPROFILE=y
48CONFIG_GENERIC_FIND_NEXT_BIT=y 61CONFIG_GENERIC_FIND_NEXT_BIT=y
49CONFIG_GENERIC_HWEIGHT=y 62CONFIG_GENERIC_HWEIGHT=y
50CONFIG_GENERIC_CALIBRATE_DELAY=y 63CONFIG_GENERIC_CALIBRATE_DELAY=y
64CONFIG_GENERIC_CLOCKEVENTS=y
51CONFIG_GENERIC_TIME=y 65CONFIG_GENERIC_TIME=y
52CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y 66CONFIG_GENERIC_CMOS_UPDATE=y
67CONFIG_SCHED_OMIT_FRAME_POINTER=y
53CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 68CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
54CONFIG_ARC=y 69CONFIG_ARC=y
55CONFIG_DMA_COHERENT=y 70CONFIG_DMA_COHERENT=y
56CONFIG_EARLY_PRINTK=y
57CONFIG_SYS_HAS_EARLY_PRINTK=y 71CONFIG_SYS_HAS_EARLY_PRINTK=y
58# CONFIG_NO_IOPORT is not set 72# CONFIG_NO_IOPORT is not set
59CONFIG_CPU_BIG_ENDIAN=y 73CONFIG_CPU_BIG_ENDIAN=y
60# CONFIG_CPU_LITTLE_ENDIAN is not set 74# CONFIG_CPU_LITTLE_ENDIAN is not set
61CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y 75CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
76CONFIG_DEFAULT_SGI_PARTITION=y
62CONFIG_MIPS_L1_CACHE_SHIFT=7 77CONFIG_MIPS_L1_CACHE_SHIFT=7
63CONFIG_ARC64=y 78CONFIG_ARC64=y
64CONFIG_BOOT_ELF64=y 79CONFIG_BOOT_ELF64=y
@@ -66,7 +81,8 @@ CONFIG_BOOT_ELF64=y
66# 81#
67# CPU selection 82# CPU selection
68# 83#
69# CONFIG_CPU_LOONGSON2 is not set 84# CONFIG_CPU_LOONGSON2E is not set
85# CONFIG_CPU_LOONGSON2F is not set
70# CONFIG_CPU_MIPS32_R1 is not set 86# CONFIG_CPU_MIPS32_R1 is not set
71# CONFIG_CPU_MIPS32_R2 is not set 87# CONFIG_CPU_MIPS32_R2 is not set
72# CONFIG_CPU_MIPS64_R1 is not set 88# CONFIG_CPU_MIPS64_R1 is not set
@@ -79,6 +95,7 @@ CONFIG_BOOT_ELF64=y
79# CONFIG_CPU_TX49XX is not set 95# CONFIG_CPU_TX49XX is not set
80# CONFIG_CPU_R5000 is not set 96# CONFIG_CPU_R5000 is not set
81# CONFIG_CPU_R5432 is not set 97# CONFIG_CPU_R5432 is not set
98# CONFIG_CPU_R5500 is not set
82# CONFIG_CPU_R6000 is not set 99# CONFIG_CPU_R6000 is not set
83# CONFIG_CPU_NEVADA is not set 100# CONFIG_CPU_NEVADA is not set
84# CONFIG_CPU_R8000 is not set 101# CONFIG_CPU_R8000 is not set
@@ -86,6 +103,7 @@ CONFIG_CPU_R10000=y
86# CONFIG_CPU_RM7000 is not set 103# CONFIG_CPU_RM7000 is not set
87# CONFIG_CPU_RM9000 is not set 104# CONFIG_CPU_RM9000 is not set
88# CONFIG_CPU_SB1 is not set 105# CONFIG_CPU_SB1 is not set
106# CONFIG_CPU_CAVIUM_OCTEON is not set
89CONFIG_SYS_HAS_CPU_R10000=y 107CONFIG_SYS_HAS_CPU_R10000=y
90CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y 108CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
91CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y 109CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
@@ -99,6 +117,7 @@ CONFIG_64BIT=y
99CONFIG_PAGE_SIZE_4KB=y 117CONFIG_PAGE_SIZE_4KB=y
100# CONFIG_PAGE_SIZE_8KB is not set 118# CONFIG_PAGE_SIZE_8KB is not set
101# CONFIG_PAGE_SIZE_16KB is not set 119# CONFIG_PAGE_SIZE_16KB is not set
120# CONFIG_PAGE_SIZE_32KB is not set
102# CONFIG_PAGE_SIZE_64KB is not set 121# CONFIG_PAGE_SIZE_64KB is not set
103CONFIG_CPU_HAS_PREFETCH=y 122CONFIG_CPU_HAS_PREFETCH=y
104CONFIG_MIPS_MT_DISABLED=y 123CONFIG_MIPS_MT_DISABLED=y
@@ -110,6 +129,7 @@ CONFIG_GENERIC_IRQ_PROBE=y
110CONFIG_IRQ_PER_CPU=y 129CONFIG_IRQ_PER_CPU=y
111CONFIG_CPU_SUPPORTS_HIGHMEM=y 130CONFIG_CPU_SUPPORTS_HIGHMEM=y
112CONFIG_ARCH_DISCONTIGMEM_ENABLE=y 131CONFIG_ARCH_DISCONTIGMEM_ENABLE=y
132CONFIG_ARCH_POPULATES_NODE_MAP=y
113CONFIG_NUMA=y 133CONFIG_NUMA=y
114CONFIG_SYS_SUPPORTS_NUMA=y 134CONFIG_SYS_SUPPORTS_NUMA=y
115CONFIG_NODES_SHIFT=6 135CONFIG_NODES_SHIFT=6
@@ -120,16 +140,22 @@ CONFIG_DISCONTIGMEM_MANUAL=y
120CONFIG_DISCONTIGMEM=y 140CONFIG_DISCONTIGMEM=y
121CONFIG_FLAT_NODE_MEM_MAP=y 141CONFIG_FLAT_NODE_MEM_MAP=y
122CONFIG_NEED_MULTIPLE_NODES=y 142CONFIG_NEED_MULTIPLE_NODES=y
123# CONFIG_SPARSEMEM_STATIC is not set 143CONFIG_PAGEFLAGS_EXTENDED=y
124CONFIG_SPLIT_PTLOCK_CPUS=4 144CONFIG_SPLIT_PTLOCK_CPUS=4
125CONFIG_MIGRATION=y 145CONFIG_MIGRATION=y
126CONFIG_RESOURCES_64BIT=y 146CONFIG_PHYS_ADDR_T_64BIT=y
127CONFIG_ZONE_DMA_FLAG=0 147CONFIG_ZONE_DMA_FLAG=0
128CONFIG_VIRT_TO_BUS=y 148CONFIG_VIRT_TO_BUS=y
149# CONFIG_KSM is not set
150CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
129CONFIG_SMP=y 151CONFIG_SMP=y
130CONFIG_SYS_SUPPORTS_SMP=y 152CONFIG_SYS_SUPPORTS_SMP=y
131CONFIG_NR_CPUS_DEFAULT_64=y 153CONFIG_NR_CPUS_DEFAULT_64=y
132CONFIG_NR_CPUS=64 154CONFIG_NR_CPUS=64
155CONFIG_TICK_ONESHOT=y
156CONFIG_NO_HZ=y
157CONFIG_HIGH_RES_TIMERS=y
158CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
133# CONFIG_HZ_48 is not set 159# CONFIG_HZ_48 is not set
134# CONFIG_HZ_100 is not set 160# CONFIG_HZ_100 is not set
135# CONFIG_HZ_128 is not set 161# CONFIG_HZ_128 is not set
@@ -142,13 +168,13 @@ CONFIG_HZ=1000
142CONFIG_PREEMPT_NONE=y 168CONFIG_PREEMPT_NONE=y
143# CONFIG_PREEMPT_VOLUNTARY is not set 169# CONFIG_PREEMPT_VOLUNTARY is not set
144# CONFIG_PREEMPT is not set 170# CONFIG_PREEMPT is not set
145CONFIG_PREEMPT_BKL=y
146# CONFIG_MIPS_INSANE_LARGE is not set 171# CONFIG_MIPS_INSANE_LARGE is not set
147# CONFIG_KEXEC is not set 172# CONFIG_KEXEC is not set
148CONFIG_SECCOMP=y 173CONFIG_SECCOMP=y
149CONFIG_LOCKDEP_SUPPORT=y 174CONFIG_LOCKDEP_SUPPORT=y
150CONFIG_STACKTRACE_SUPPORT=y 175CONFIG_STACKTRACE_SUPPORT=y
151CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 176CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
177CONFIG_CONSTRUCTORS=y
152 178
153# 179#
154# General setup 180# General setup
@@ -162,20 +188,41 @@ CONFIG_SWAP=y
162CONFIG_SYSVIPC=y 188CONFIG_SYSVIPC=y
163CONFIG_SYSVIPC_SYSCTL=y 189CONFIG_SYSVIPC_SYSCTL=y
164CONFIG_POSIX_MQUEUE=y 190CONFIG_POSIX_MQUEUE=y
191CONFIG_POSIX_MQUEUE_SYSCTL=y
165# CONFIG_BSD_PROCESS_ACCT is not set 192# CONFIG_BSD_PROCESS_ACCT is not set
166# CONFIG_TASKSTATS is not set 193# CONFIG_TASKSTATS is not set
167# CONFIG_USER_NS is not set
168# CONFIG_AUDIT is not set 194# CONFIG_AUDIT is not set
195
196#
197# RCU Subsystem
198#
199CONFIG_TREE_RCU=y
200# CONFIG_TREE_PREEMPT_RCU is not set
201# CONFIG_TINY_RCU is not set
202# CONFIG_RCU_TRACE is not set
203CONFIG_RCU_FANOUT=64
204# CONFIG_RCU_FANOUT_EXACT is not set
205# CONFIG_TREE_RCU_TRACE is not set
169CONFIG_IKCONFIG=y 206CONFIG_IKCONFIG=y
170CONFIG_IKCONFIG_PROC=y 207CONFIG_IKCONFIG_PROC=y
171CONFIG_LOG_BUF_SHIFT=15 208CONFIG_LOG_BUF_SHIFT=15
209# CONFIG_GROUP_SCHED is not set
172CONFIG_CGROUPS=y 210CONFIG_CGROUPS=y
211# CONFIG_CGROUP_DEBUG is not set
212# CONFIG_CGROUP_NS is not set
213# CONFIG_CGROUP_FREEZER is not set
214# CONFIG_CGROUP_DEVICE is not set
173CONFIG_CPUSETS=y 215CONFIG_CPUSETS=y
174CONFIG_SYSFS_DEPRECATED=y 216CONFIG_PROC_PID_CPUSET=y
217# CONFIG_CGROUP_CPUACCT is not set
218# CONFIG_RESOURCE_COUNTERS is not set
219# CONFIG_SYSFS_DEPRECATED_V2 is not set
175CONFIG_RELAY=y 220CONFIG_RELAY=y
221# CONFIG_NAMESPACES is not set
176# CONFIG_BLK_DEV_INITRD is not set 222# CONFIG_BLK_DEV_INITRD is not set
177# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 223# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
178CONFIG_SYSCTL=y 224CONFIG_SYSCTL=y
225CONFIG_ANON_INODES=y
179CONFIG_EMBEDDED=y 226CONFIG_EMBEDDED=y
180CONFIG_SYSCTL_SYSCALL=y 227CONFIG_SYSCTL_SYSCALL=y
181CONFIG_KALLSYMS=y 228CONFIG_KALLSYMS=y
@@ -184,44 +231,92 @@ CONFIG_HOTPLUG=y
184CONFIG_PRINTK=y 231CONFIG_PRINTK=y
185CONFIG_BUG=y 232CONFIG_BUG=y
186CONFIG_ELF_CORE=y 233CONFIG_ELF_CORE=y
234# CONFIG_PCSPKR_PLATFORM is not set
187CONFIG_BASE_FULL=y 235CONFIG_BASE_FULL=y
188CONFIG_FUTEX=y 236CONFIG_FUTEX=y
189CONFIG_ANON_INODES=y
190CONFIG_EPOLL=y 237CONFIG_EPOLL=y
191CONFIG_SIGNALFD=y 238CONFIG_SIGNALFD=y
192CONFIG_TIMERFD=y 239CONFIG_TIMERFD=y
193CONFIG_EVENTFD=y 240CONFIG_EVENTFD=y
194CONFIG_SHMEM=y 241CONFIG_SHMEM=y
242CONFIG_AIO=y
243
244#
245# Kernel Performance Events And Counters
246#
195CONFIG_VM_EVENT_COUNTERS=y 247CONFIG_VM_EVENT_COUNTERS=y
248CONFIG_PCI_QUIRKS=y
249CONFIG_COMPAT_BRK=y
196CONFIG_SLAB=y 250CONFIG_SLAB=y
197# CONFIG_SLUB is not set 251# CONFIG_SLUB is not set
198# CONFIG_SLOB is not set 252# CONFIG_SLOB is not set
253# CONFIG_PROFILING is not set
254CONFIG_HAVE_OPROFILE=y
255CONFIG_HAVE_SYSCALL_WRAPPERS=y
256CONFIG_USE_GENERIC_SMP_HELPERS=y
257
258#
259# GCOV-based kernel profiling
260#
261CONFIG_SLOW_WORK=y
262CONFIG_HAVE_GENERIC_DMA_COHERENT=y
263CONFIG_SLABINFO=y
199CONFIG_RT_MUTEXES=y 264CONFIG_RT_MUTEXES=y
200# CONFIG_TINY_SHMEM is not set
201CONFIG_BASE_SMALL=0 265CONFIG_BASE_SMALL=0
202CONFIG_MODULES=y 266CONFIG_MODULES=y
267# CONFIG_MODULE_FORCE_LOAD is not set
203CONFIG_MODULE_UNLOAD=y 268CONFIG_MODULE_UNLOAD=y
204# CONFIG_MODULE_FORCE_UNLOAD is not set 269# CONFIG_MODULE_FORCE_UNLOAD is not set
205# CONFIG_MODVERSIONS is not set 270# CONFIG_MODVERSIONS is not set
206CONFIG_MODULE_SRCVERSION_ALL=y 271CONFIG_MODULE_SRCVERSION_ALL=y
207CONFIG_KMOD=y
208CONFIG_STOP_MACHINE=y 272CONFIG_STOP_MACHINE=y
209CONFIG_BLOCK=y 273CONFIG_BLOCK=y
210# CONFIG_BLK_DEV_IO_TRACE is not set
211# CONFIG_BLK_DEV_BSG is not set 274# CONFIG_BLK_DEV_BSG is not set
275# CONFIG_BLK_DEV_INTEGRITY is not set
276# CONFIG_BLK_CGROUP is not set
277CONFIG_BLOCK_COMPAT=y
212 278
213# 279#
214# IO Schedulers 280# IO Schedulers
215# 281#
216CONFIG_IOSCHED_NOOP=y 282CONFIG_IOSCHED_NOOP=y
217CONFIG_IOSCHED_AS=y
218CONFIG_IOSCHED_DEADLINE=y 283CONFIG_IOSCHED_DEADLINE=y
219CONFIG_IOSCHED_CFQ=y 284CONFIG_IOSCHED_CFQ=y
220CONFIG_DEFAULT_AS=y 285# CONFIG_CFQ_GROUP_IOSCHED is not set
221# CONFIG_DEFAULT_DEADLINE is not set 286# CONFIG_DEFAULT_DEADLINE is not set
222# CONFIG_DEFAULT_CFQ is not set 287CONFIG_DEFAULT_CFQ=y
223# CONFIG_DEFAULT_NOOP is not set 288# CONFIG_DEFAULT_NOOP is not set
224CONFIG_DEFAULT_IOSCHED="anticipatory" 289CONFIG_DEFAULT_IOSCHED="cfq"
290# CONFIG_INLINE_SPIN_TRYLOCK is not set
291# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
292# CONFIG_INLINE_SPIN_LOCK is not set
293# CONFIG_INLINE_SPIN_LOCK_BH is not set
294# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
295# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
296CONFIG_INLINE_SPIN_UNLOCK=y
297# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
298CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
299# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
300# CONFIG_INLINE_READ_TRYLOCK is not set
301# CONFIG_INLINE_READ_LOCK is not set
302# CONFIG_INLINE_READ_LOCK_BH is not set
303# CONFIG_INLINE_READ_LOCK_IRQ is not set
304# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
305CONFIG_INLINE_READ_UNLOCK=y
306# CONFIG_INLINE_READ_UNLOCK_BH is not set
307CONFIG_INLINE_READ_UNLOCK_IRQ=y
308# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
309# CONFIG_INLINE_WRITE_TRYLOCK is not set
310# CONFIG_INLINE_WRITE_LOCK is not set
311# CONFIG_INLINE_WRITE_LOCK_BH is not set
312# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
313# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
314CONFIG_INLINE_WRITE_UNLOCK=y
315# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
316CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
317# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
318CONFIG_MUTEX_SPIN_ON_OWNER=y
319# CONFIG_FREEZER is not set
225 320
226# 321#
227# Bus options (PCI, PCMCIA, EISA, ISA, TC) 322# Bus options (PCI, PCMCIA, EISA, ISA, TC)
@@ -230,11 +325,10 @@ CONFIG_HW_HAS_PCI=y
230CONFIG_PCI=y 325CONFIG_PCI=y
231CONFIG_PCI_DOMAINS=y 326CONFIG_PCI_DOMAINS=y
232# CONFIG_ARCH_SUPPORTS_MSI is not set 327# CONFIG_ARCH_SUPPORTS_MSI is not set
328# CONFIG_PCI_LEGACY is not set
329# CONFIG_PCI_STUB is not set
330# CONFIG_PCI_IOV is not set
233CONFIG_MMU=y 331CONFIG_MMU=y
234
235#
236# PCCARD (PCMCIA/CardBus) support
237#
238# CONFIG_PCCARD is not set 332# CONFIG_PCCARD is not set
239# CONFIG_HOTPLUG_PCI is not set 333# CONFIG_HOTPLUG_PCI is not set
240 334
@@ -242,8 +336,9 @@ CONFIG_MMU=y
242# Executable file formats 336# Executable file formats
243# 337#
244CONFIG_BINFMT_ELF=y 338CONFIG_BINFMT_ELF=y
339CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
340# CONFIG_HAVE_AOUT is not set
245# CONFIG_BINFMT_MISC is not set 341# CONFIG_BINFMT_MISC is not set
246# CONFIG_BUILD_ELF64 is not set
247CONFIG_MIPS32_COMPAT=y 342CONFIG_MIPS32_COMPAT=y
248CONFIG_COMPAT=y 343CONFIG_COMPAT=y
249CONFIG_SYSVIPC_COMPAT=y 344CONFIG_SYSVIPC_COMPAT=y
@@ -255,13 +350,10 @@ CONFIG_BINFMT_ELF32=y
255# Power management options 350# Power management options
256# 351#
257CONFIG_PM=y 352CONFIG_PM=y
258# CONFIG_PM_LEGACY is not set
259# CONFIG_PM_DEBUG is not set 353# CONFIG_PM_DEBUG is not set
260 354# CONFIG_PM_RUNTIME is not set
261#
262# Networking
263#
264CONFIG_NET=y 355CONFIG_NET=y
356CONFIG_COMPAT_NETLINK_MESSAGES=y
265 357
266# 358#
267# Networking options 359# Networking options
@@ -273,6 +365,8 @@ CONFIG_XFRM=y
273CONFIG_XFRM_USER=m 365CONFIG_XFRM_USER=m
274# CONFIG_XFRM_SUB_POLICY is not set 366# CONFIG_XFRM_SUB_POLICY is not set
275CONFIG_XFRM_MIGRATE=y 367CONFIG_XFRM_MIGRATE=y
368CONFIG_XFRM_STATISTICS=y
369CONFIG_XFRM_IPCOMP=m
276CONFIG_NET_KEY=y 370CONFIG_NET_KEY=y
277CONFIG_NET_KEY_MIGRATE=y 371CONFIG_NET_KEY_MIGRATE=y
278CONFIG_INET=y 372CONFIG_INET=y
@@ -292,19 +386,40 @@ CONFIG_IP_PNP=y
292# CONFIG_INET_ESP is not set 386# CONFIG_INET_ESP is not set
293# CONFIG_INET_IPCOMP is not set 387# CONFIG_INET_IPCOMP is not set
294# CONFIG_INET_XFRM_TUNNEL is not set 388# CONFIG_INET_XFRM_TUNNEL is not set
295# CONFIG_INET_TUNNEL is not set 389CONFIG_INET_TUNNEL=m
296CONFIG_INET_XFRM_MODE_TRANSPORT=m 390CONFIG_INET_XFRM_MODE_TRANSPORT=m
297CONFIG_INET_XFRM_MODE_TUNNEL=m 391CONFIG_INET_XFRM_MODE_TUNNEL=m
298CONFIG_INET_XFRM_MODE_BEET=m 392CONFIG_INET_XFRM_MODE_BEET=m
393CONFIG_INET_LRO=y
299CONFIG_INET_DIAG=y 394CONFIG_INET_DIAG=y
300CONFIG_INET_TCP_DIAG=y 395CONFIG_INET_TCP_DIAG=y
301# CONFIG_TCP_CONG_ADVANCED is not set 396# CONFIG_TCP_CONG_ADVANCED is not set
302CONFIG_TCP_CONG_CUBIC=y 397CONFIG_TCP_CONG_CUBIC=y
303CONFIG_DEFAULT_TCP_CONG="cubic" 398CONFIG_DEFAULT_TCP_CONG="cubic"
304CONFIG_TCP_MD5SIG=y 399CONFIG_TCP_MD5SIG=y
305# CONFIG_IPV6 is not set 400CONFIG_IPV6=y
306# CONFIG_INET6_XFRM_TUNNEL is not set 401CONFIG_IPV6_PRIVACY=y
307# CONFIG_INET6_TUNNEL is not set 402CONFIG_IPV6_ROUTER_PREF=y
403CONFIG_IPV6_ROUTE_INFO=y
404CONFIG_IPV6_OPTIMISTIC_DAD=y
405CONFIG_INET6_AH=m
406CONFIG_INET6_ESP=m
407CONFIG_INET6_IPCOMP=m
408CONFIG_IPV6_MIP6=m
409CONFIG_INET6_XFRM_TUNNEL=m
410CONFIG_INET6_TUNNEL=m
411CONFIG_INET6_XFRM_MODE_TRANSPORT=m
412CONFIG_INET6_XFRM_MODE_TUNNEL=m
413CONFIG_INET6_XFRM_MODE_BEET=m
414CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
415CONFIG_IPV6_SIT=m
416CONFIG_IPV6_SIT_6RD=y
417CONFIG_IPV6_NDISC_NODETYPE=y
418CONFIG_IPV6_TUNNEL=m
419CONFIG_IPV6_MULTIPLE_TABLES=y
420CONFIG_IPV6_SUBTREES=y
421CONFIG_IPV6_MROUTE=y
422CONFIG_IPV6_PIMSM_V2=y
308CONFIG_NETWORK_SECMARK=y 423CONFIG_NETWORK_SECMARK=y
309# CONFIG_NETFILTER is not set 424# CONFIG_NETFILTER is not set
310# CONFIG_IP_DCCP is not set 425# CONFIG_IP_DCCP is not set
@@ -314,9 +429,11 @@ CONFIG_IP_SCTP=m
314# CONFIG_SCTP_HMAC_NONE is not set 429# CONFIG_SCTP_HMAC_NONE is not set
315# CONFIG_SCTP_HMAC_SHA1 is not set 430# CONFIG_SCTP_HMAC_SHA1 is not set
316CONFIG_SCTP_HMAC_MD5=y 431CONFIG_SCTP_HMAC_MD5=y
432# CONFIG_RDS is not set
317# CONFIG_TIPC is not set 433# CONFIG_TIPC is not set
318# CONFIG_ATM is not set 434# CONFIG_ATM is not set
319# CONFIG_BRIDGE is not set 435# CONFIG_BRIDGE is not set
436# CONFIG_NET_DSA is not set
320# CONFIG_VLAN_8021Q is not set 437# CONFIG_VLAN_8021Q is not set
321# CONFIG_DECNET is not set 438# CONFIG_DECNET is not set
322# CONFIG_LLC2 is not set 439# CONFIG_LLC2 is not set
@@ -326,12 +443,9 @@ CONFIG_SCTP_HMAC_MD5=y
326# CONFIG_LAPB is not set 443# CONFIG_LAPB is not set
327# CONFIG_ECONET is not set 444# CONFIG_ECONET is not set
328# CONFIG_WAN_ROUTER is not set 445# CONFIG_WAN_ROUTER is not set
329 446# CONFIG_PHONET is not set
330# 447# CONFIG_IEEE802154 is not set
331# QoS and/or fair queueing
332#
333CONFIG_NET_SCHED=y 448CONFIG_NET_SCHED=y
334CONFIG_NET_SCH_FIFO=y
335 449
336# 450#
337# Queueing/Scheduling 451# Queueing/Scheduling
@@ -340,7 +454,7 @@ CONFIG_NET_SCH_CBQ=m
340CONFIG_NET_SCH_HTB=m 454CONFIG_NET_SCH_HTB=m
341CONFIG_NET_SCH_HFSC=m 455CONFIG_NET_SCH_HFSC=m
342CONFIG_NET_SCH_PRIO=m 456CONFIG_NET_SCH_PRIO=m
343CONFIG_NET_SCH_RR=m 457CONFIG_NET_SCH_MULTIQ=y
344CONFIG_NET_SCH_RED=m 458CONFIG_NET_SCH_RED=m
345CONFIG_NET_SCH_SFQ=m 459CONFIG_NET_SCH_SFQ=m
346CONFIG_NET_SCH_TEQL=m 460CONFIG_NET_SCH_TEQL=m
@@ -348,6 +462,7 @@ CONFIG_NET_SCH_TBF=m
348CONFIG_NET_SCH_GRED=m 462CONFIG_NET_SCH_GRED=m
349CONFIG_NET_SCH_DSMARK=m 463CONFIG_NET_SCH_DSMARK=m
350CONFIG_NET_SCH_NETEM=m 464CONFIG_NET_SCH_NETEM=m
465# CONFIG_NET_SCH_DRR is not set
351CONFIG_NET_SCH_INGRESS=m 466CONFIG_NET_SCH_INGRESS=m
352 467
353# 468#
@@ -364,41 +479,63 @@ CONFIG_NET_CLS_U32=m
364CONFIG_CLS_U32_MARK=y 479CONFIG_CLS_U32_MARK=y
365CONFIG_NET_CLS_RSVP=m 480CONFIG_NET_CLS_RSVP=m
366CONFIG_NET_CLS_RSVP6=m 481CONFIG_NET_CLS_RSVP6=m
482CONFIG_NET_CLS_FLOW=m
483CONFIG_NET_CLS_CGROUP=y
367# CONFIG_NET_EMATCH is not set 484# CONFIG_NET_EMATCH is not set
368CONFIG_NET_CLS_ACT=y 485CONFIG_NET_CLS_ACT=y
369CONFIG_NET_ACT_POLICE=y 486CONFIG_NET_ACT_POLICE=y
370CONFIG_NET_ACT_GACT=m 487CONFIG_NET_ACT_GACT=m
371CONFIG_GACT_PROB=y 488CONFIG_GACT_PROB=y
372CONFIG_NET_ACT_MIRRED=m 489CONFIG_NET_ACT_MIRRED=m
490CONFIG_NET_ACT_NAT=m
373CONFIG_NET_ACT_PEDIT=m 491CONFIG_NET_ACT_PEDIT=m
374# CONFIG_NET_ACT_SIMP is not set 492# CONFIG_NET_ACT_SIMP is not set
375CONFIG_NET_CLS_POLICE=y 493CONFIG_NET_ACT_SKBEDIT=m
376# CONFIG_NET_CLS_IND is not set 494# CONFIG_NET_CLS_IND is not set
495CONFIG_NET_SCH_FIFO=y
496# CONFIG_DCB is not set
377 497
378# 498#
379# Network testing 499# Network testing
380# 500#
381# CONFIG_NET_PKTGEN is not set 501# CONFIG_NET_PKTGEN is not set
382# CONFIG_HAMRADIO is not set 502# CONFIG_HAMRADIO is not set
503# CONFIG_CAN is not set
383# CONFIG_IRDA is not set 504# CONFIG_IRDA is not set
384# CONFIG_BT is not set 505# CONFIG_BT is not set
385# CONFIG_AF_RXRPC is not set 506# CONFIG_AF_RXRPC is not set
386 507CONFIG_FIB_RULES=y
387# 508CONFIG_WIRELESS=y
388# Wireless
389#
390CONFIG_CFG80211=m
391CONFIG_WIRELESS_EXT=y 509CONFIG_WIRELESS_EXT=y
510CONFIG_WEXT_CORE=y
511CONFIG_WEXT_PROC=y
512CONFIG_WEXT_SPY=y
513CONFIG_WEXT_PRIV=y
514CONFIG_CFG80211=m
515# CONFIG_NL80211_TESTMODE is not set
516# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
517# CONFIG_CFG80211_REG_DEBUG is not set
518CONFIG_CFG80211_DEFAULT_PS=y
519# CONFIG_WIRELESS_OLD_REGULATORY is not set
520CONFIG_CFG80211_WEXT=y
521CONFIG_WIRELESS_EXT_SYSFS=y
522CONFIG_LIB80211=m
523CONFIG_LIB80211_CRYPT_WEP=m
524CONFIG_LIB80211_CRYPT_CCMP=m
525CONFIG_LIB80211_CRYPT_TKIP=m
526# CONFIG_LIB80211_DEBUG is not set
392CONFIG_MAC80211=m 527CONFIG_MAC80211=m
393# CONFIG_MAC80211_DEBUG is not set 528CONFIG_MAC80211_RC_PID=y
394CONFIG_IEEE80211=m 529CONFIG_MAC80211_RC_MINSTREL=y
395# CONFIG_IEEE80211_DEBUG is not set 530# CONFIG_MAC80211_RC_DEFAULT_PID is not set
396CONFIG_IEEE80211_CRYPT_WEP=m 531CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
397CONFIG_IEEE80211_CRYPT_CCMP=m 532CONFIG_MAC80211_RC_DEFAULT="minstrel"
398CONFIG_IEEE80211_CRYPT_TKIP=m 533# CONFIG_MAC80211_MESH is not set
399CONFIG_IEEE80211_SOFTMAC=m 534CONFIG_MAC80211_LEDS=y
400# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set 535# CONFIG_MAC80211_DEBUG_MENU is not set
536# CONFIG_WIMAX is not set
401CONFIG_RFKILL=m 537CONFIG_RFKILL=m
538CONFIG_RFKILL_LEDS=y
402# CONFIG_NET_9P is not set 539# CONFIG_NET_9P is not set
403 540
404# 541#
@@ -408,9 +545,13 @@ CONFIG_RFKILL=m
408# 545#
409# Generic Driver Options 546# Generic Driver Options
410# 547#
548CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
549# CONFIG_DEVTMPFS is not set
411CONFIG_STANDALONE=y 550CONFIG_STANDALONE=y
412CONFIG_PREVENT_FIRMWARE_BUILD=y 551CONFIG_PREVENT_FIRMWARE_BUILD=y
413CONFIG_FW_LOADER=y 552CONFIG_FW_LOADER=y
553CONFIG_FIRMWARE_IN_KERNEL=y
554CONFIG_EXTRA_FIRMWARE=""
414# CONFIG_SYS_HYPERVISOR is not set 555# CONFIG_SYS_HYPERVISOR is not set
415CONFIG_CONNECTOR=m 556CONFIG_CONNECTOR=m
416# CONFIG_MTD is not set 557# CONFIG_MTD is not set
@@ -423,14 +564,19 @@ CONFIG_BLK_DEV=y
423# CONFIG_BLK_DEV_COW_COMMON is not set 564# CONFIG_BLK_DEV_COW_COMMON is not set
424CONFIG_BLK_DEV_LOOP=y 565CONFIG_BLK_DEV_LOOP=y
425CONFIG_BLK_DEV_CRYPTOLOOP=m 566CONFIG_BLK_DEV_CRYPTOLOOP=m
567# CONFIG_BLK_DEV_DRBD is not set
426# CONFIG_BLK_DEV_NBD is not set 568# CONFIG_BLK_DEV_NBD is not set
569CONFIG_BLK_DEV_OSD=m
427# CONFIG_BLK_DEV_SX8 is not set 570# CONFIG_BLK_DEV_SX8 is not set
428# CONFIG_BLK_DEV_RAM is not set 571# CONFIG_BLK_DEV_RAM is not set
429CONFIG_CDROM_PKTCDVD=m 572CONFIG_CDROM_PKTCDVD=m
430CONFIG_CDROM_PKTCDVD_BUFFERS=8 573CONFIG_CDROM_PKTCDVD_BUFFERS=8
431# CONFIG_CDROM_PKTCDVD_WCACHE is not set 574# CONFIG_CDROM_PKTCDVD_WCACHE is not set
432CONFIG_ATA_OVER_ETH=m 575CONFIG_ATA_OVER_ETH=m
576# CONFIG_BLK_DEV_HD is not set
433# CONFIG_MISC_DEVICES is not set 577# CONFIG_MISC_DEVICES is not set
578CONFIG_EEPROM_93CX6=m
579CONFIG_HAVE_IDE=y
434# CONFIG_IDE is not set 580# CONFIG_IDE is not set
435 581
436# 582#
@@ -453,10 +599,6 @@ CONFIG_BLK_DEV_SR=m
453CONFIG_BLK_DEV_SR_VENDOR=y 599CONFIG_BLK_DEV_SR_VENDOR=y
454CONFIG_CHR_DEV_SG=m 600CONFIG_CHR_DEV_SG=m
455CONFIG_CHR_DEV_SCH=m 601CONFIG_CHR_DEV_SCH=m
456
457#
458# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
459#
460# CONFIG_SCSI_MULTI_LUN is not set 602# CONFIG_SCSI_MULTI_LUN is not set
461CONFIG_SCSI_CONSTANTS=y 603CONFIG_SCSI_CONSTANTS=y
462CONFIG_SCSI_LOGGING=y 604CONFIG_SCSI_LOGGING=y
@@ -471,11 +613,18 @@ CONFIG_SCSI_FC_ATTRS=y
471CONFIG_SCSI_ISCSI_ATTRS=m 613CONFIG_SCSI_ISCSI_ATTRS=m
472CONFIG_SCSI_SAS_ATTRS=m 614CONFIG_SCSI_SAS_ATTRS=m
473CONFIG_SCSI_SAS_LIBSAS=m 615CONFIG_SCSI_SAS_LIBSAS=m
616CONFIG_SCSI_SAS_HOST_SMP=y
474# CONFIG_SCSI_SAS_LIBSAS_DEBUG is not set 617# CONFIG_SCSI_SAS_LIBSAS_DEBUG is not set
618# CONFIG_SCSI_SRP_ATTRS is not set
475CONFIG_SCSI_LOWLEVEL=y 619CONFIG_SCSI_LOWLEVEL=y
476# CONFIG_ISCSI_TCP is not set 620# CONFIG_ISCSI_TCP is not set
621CONFIG_SCSI_CXGB3_ISCSI=m
622CONFIG_SCSI_BNX2_ISCSI=m
623CONFIG_BE2ISCSI=m
477# CONFIG_BLK_DEV_3W_XXXX_RAID is not set 624# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
625CONFIG_SCSI_HPSA=m
478# CONFIG_SCSI_3W_9XXX is not set 626# CONFIG_SCSI_3W_9XXX is not set
627CONFIG_SCSI_3W_SAS=m
479# CONFIG_SCSI_ACARD is not set 628# CONFIG_SCSI_ACARD is not set
480# CONFIG_SCSI_AACRAID is not set 629# CONFIG_SCSI_AACRAID is not set
481# CONFIG_SCSI_AIC7XXX is not set 630# CONFIG_SCSI_AIC7XXX is not set
@@ -483,11 +632,21 @@ CONFIG_SCSI_LOWLEVEL=y
483# CONFIG_SCSI_AIC79XX is not set 632# CONFIG_SCSI_AIC79XX is not set
484CONFIG_SCSI_AIC94XX=m 633CONFIG_SCSI_AIC94XX=m
485# CONFIG_AIC94XX_DEBUG is not set 634# CONFIG_AIC94XX_DEBUG is not set
635CONFIG_SCSI_MVSAS=m
636# CONFIG_SCSI_MVSAS_DEBUG is not set
637CONFIG_SCSI_DPT_I2O=m
638# CONFIG_SCSI_ADVANSYS is not set
486# CONFIG_SCSI_ARCMSR is not set 639# CONFIG_SCSI_ARCMSR is not set
487# CONFIG_MEGARAID_NEWGEN is not set 640# CONFIG_MEGARAID_NEWGEN is not set
488# CONFIG_MEGARAID_LEGACY is not set 641# CONFIG_MEGARAID_LEGACY is not set
489# CONFIG_MEGARAID_SAS is not set 642# CONFIG_MEGARAID_SAS is not set
643CONFIG_SCSI_MPT2SAS=m
644CONFIG_SCSI_MPT2SAS_MAX_SGE=128
645# CONFIG_SCSI_MPT2SAS_LOGGING is not set
490# CONFIG_SCSI_HPTIOP is not set 646# CONFIG_SCSI_HPTIOP is not set
647CONFIG_LIBFC=m
648# CONFIG_LIBFCOE is not set
649# CONFIG_FCOE is not set
491# CONFIG_SCSI_DMX3191D is not set 650# CONFIG_SCSI_DMX3191D is not set
492# CONFIG_SCSI_FUTURE_DOMAIN is not set 651# CONFIG_SCSI_FUTURE_DOMAIN is not set
493# CONFIG_SCSI_IPS is not set 652# CONFIG_SCSI_IPS is not set
@@ -502,16 +661,31 @@ CONFIG_SCSI_QLOGIC_1280=y
502# CONFIG_SCSI_DC395x is not set 661# CONFIG_SCSI_DC395x is not set
503# CONFIG_SCSI_DC390T is not set 662# CONFIG_SCSI_DC390T is not set
504# CONFIG_SCSI_DEBUG is not set 663# CONFIG_SCSI_DEBUG is not set
664CONFIG_SCSI_PMCRAID=m
665# CONFIG_SCSI_PM8001 is not set
505# CONFIG_SCSI_SRP is not set 666# CONFIG_SCSI_SRP is not set
667CONFIG_SCSI_BFA_FC=m
668CONFIG_SCSI_DH=m
669CONFIG_SCSI_DH_RDAC=m
670CONFIG_SCSI_DH_HP_SW=m
671CONFIG_SCSI_DH_EMC=m
672CONFIG_SCSI_DH_ALUA=m
673CONFIG_SCSI_OSD_INITIATOR=m
674CONFIG_SCSI_OSD_ULD=m
675CONFIG_SCSI_OSD_DPRINT_SENSE=1
676# CONFIG_SCSI_OSD_DEBUG is not set
506# CONFIG_ATA is not set 677# CONFIG_ATA is not set
507CONFIG_MD=y 678CONFIG_MD=y
508CONFIG_BLK_DEV_MD=y 679CONFIG_BLK_DEV_MD=y
680CONFIG_MD_AUTODETECT=y
509CONFIG_MD_LINEAR=m 681CONFIG_MD_LINEAR=m
510CONFIG_MD_RAID0=y 682CONFIG_MD_RAID0=y
511CONFIG_MD_RAID1=y 683CONFIG_MD_RAID1=y
512CONFIG_MD_RAID10=m 684CONFIG_MD_RAID10=m
513CONFIG_MD_RAID456=y 685CONFIG_MD_RAID456=y
514CONFIG_MD_RAID5_RESHAPE=y 686# CONFIG_MULTICORE_RAID456 is not set
687CONFIG_MD_RAID6_PQ=y
688# CONFIG_ASYNC_RAID6_TEST is not set
515CONFIG_MD_MULTIPATH=m 689CONFIG_MD_MULTIPATH=m
516CONFIG_MD_FAULTY=m 690CONFIG_MD_FAULTY=m
517CONFIG_BLK_DEV_DM=m 691CONFIG_BLK_DEV_DM=m
@@ -519,36 +693,39 @@ CONFIG_BLK_DEV_DM=m
519CONFIG_DM_CRYPT=m 693CONFIG_DM_CRYPT=m
520CONFIG_DM_SNAPSHOT=m 694CONFIG_DM_SNAPSHOT=m
521CONFIG_DM_MIRROR=m 695CONFIG_DM_MIRROR=m
696CONFIG_DM_LOG_USERSPACE=m
522CONFIG_DM_ZERO=m 697CONFIG_DM_ZERO=m
523CONFIG_DM_MULTIPATH=m 698CONFIG_DM_MULTIPATH=m
524CONFIG_DM_MULTIPATH_EMC=m 699CONFIG_DM_MULTIPATH_QL=m
525CONFIG_DM_MULTIPATH_RDAC=m 700CONFIG_DM_MULTIPATH_ST=m
526# CONFIG_DM_DELAY is not set 701# CONFIG_DM_DELAY is not set
702CONFIG_DM_UEVENT=y
703# CONFIG_FUSION is not set
527 704
528# 705#
529# Fusion MPT device support 706# IEEE 1394 (FireWire) support
530# 707#
531# CONFIG_FUSION is not set
532# CONFIG_FUSION_SPI is not set
533# CONFIG_FUSION_FC is not set
534# CONFIG_FUSION_SAS is not set
535 708
536# 709#
537# IEEE 1394 (FireWire) support 710# You can enable one or both FireWire driver stacks.
711#
712
713#
714# The newer stack is recommended.
538# 715#
539# CONFIG_FIREWIRE is not set 716# CONFIG_FIREWIRE is not set
540# CONFIG_IEEE1394 is not set 717# CONFIG_IEEE1394 is not set
541# CONFIG_I2O is not set 718# CONFIG_I2O is not set
542CONFIG_NETDEVICES=y 719CONFIG_NETDEVICES=y
543CONFIG_NETDEVICES_MULTIQUEUE=y
544CONFIG_IFB=m 720CONFIG_IFB=m
545# CONFIG_DUMMY is not set 721# CONFIG_DUMMY is not set
546# CONFIG_BONDING is not set 722# CONFIG_BONDING is not set
547CONFIG_MACVLAN=m 723CONFIG_MACVLAN=m
548# CONFIG_EQUALIZER is not set 724# CONFIG_EQUALIZER is not set
549# CONFIG_TUN is not set 725# CONFIG_TUN is not set
726CONFIG_VETH=m
550# CONFIG_ARCNET is not set 727# CONFIG_ARCNET is not set
551CONFIG_PHYLIB=m 728CONFIG_PHYLIB=y
552 729
553# 730#
554# MII PHY device drivers 731# MII PHY device drivers
@@ -562,23 +739,51 @@ CONFIG_VITESSE_PHY=m
562CONFIG_SMSC_PHY=m 739CONFIG_SMSC_PHY=m
563# CONFIG_BROADCOM_PHY is not set 740# CONFIG_BROADCOM_PHY is not set
564CONFIG_ICPLUS_PHY=m 741CONFIG_ICPLUS_PHY=m
742CONFIG_REALTEK_PHY=m
743CONFIG_NATIONAL_PHY=m
744CONFIG_STE10XP=m
745CONFIG_LSI_ET1011C_PHY=m
565# CONFIG_FIXED_PHY is not set 746# CONFIG_FIXED_PHY is not set
747CONFIG_MDIO_BITBANG=m
566CONFIG_NET_ETHERNET=y 748CONFIG_NET_ETHERNET=y
567CONFIG_MII=y 749CONFIG_MII=y
568CONFIG_AX88796=m 750CONFIG_AX88796=m
751CONFIG_AX88796_93CX6=y
569CONFIG_SGI_IOC3_ETH=y 752CONFIG_SGI_IOC3_ETH=y
570# CONFIG_HAPPYMEAL is not set 753# CONFIG_HAPPYMEAL is not set
571# CONFIG_SUNGEM is not set 754# CONFIG_SUNGEM is not set
572# CONFIG_CASSINI is not set 755# CONFIG_CASSINI is not set
573# CONFIG_NET_VENDOR_3COM is not set 756# CONFIG_NET_VENDOR_3COM is not set
757CONFIG_SMC91X=m
574# CONFIG_DM9000 is not set 758# CONFIG_DM9000 is not set
759CONFIG_ETHOC=m
760CONFIG_SMSC911X=m
761CONFIG_DNET=m
575# CONFIG_NET_TULIP is not set 762# CONFIG_NET_TULIP is not set
576# CONFIG_HP100 is not set 763# CONFIG_HP100 is not set
764# CONFIG_IBM_NEW_EMAC_ZMII is not set
765# CONFIG_IBM_NEW_EMAC_RGMII is not set
766# CONFIG_IBM_NEW_EMAC_TAH is not set
767# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
768# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
769# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
770# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
577# CONFIG_NET_PCI is not set 771# CONFIG_NET_PCI is not set
772CONFIG_B44=m
773CONFIG_B44_PCI_AUTOSELECT=y
774CONFIG_B44_PCICORE_AUTOSELECT=y
775CONFIG_B44_PCI=y
776CONFIG_KS8842=m
777CONFIG_KS8851_MLL=m
778CONFIG_ATL2=m
578CONFIG_NETDEV_1000=y 779CONFIG_NETDEV_1000=y
579# CONFIG_ACENIC is not set 780# CONFIG_ACENIC is not set
580# CONFIG_DL2K is not set 781# CONFIG_DL2K is not set
581# CONFIG_E1000 is not set 782# CONFIG_E1000 is not set
783CONFIG_E1000E=m
784CONFIG_IP1000=m
785CONFIG_IGB=m
786CONFIG_IGBVF=m
582# CONFIG_NS83820 is not set 787# CONFIG_NS83820 is not set
583# CONFIG_HAMACHI is not set 788# CONFIG_HAMACHI is not set
584# CONFIG_YELLOWFIN is not set 789# CONFIG_YELLOWFIN is not set
@@ -588,24 +793,75 @@ CONFIG_NETDEV_1000=y
588# CONFIG_SKY2 is not set 793# CONFIG_SKY2 is not set
589CONFIG_VIA_VELOCITY=m 794CONFIG_VIA_VELOCITY=m
590# CONFIG_TIGON3 is not set 795# CONFIG_TIGON3 is not set
591# CONFIG_BNX2 is not set 796CONFIG_BNX2=m
797CONFIG_CNIC=m
592CONFIG_QLA3XXX=m 798CONFIG_QLA3XXX=m
593# CONFIG_ATL1 is not set 799# CONFIG_ATL1 is not set
800CONFIG_ATL1E=m
801CONFIG_ATL1C=m
802CONFIG_JME=m
594CONFIG_NETDEV_10000=y 803CONFIG_NETDEV_10000=y
804CONFIG_MDIO=m
595# CONFIG_CHELSIO_T1 is not set 805# CONFIG_CHELSIO_T1 is not set
806CONFIG_CHELSIO_T3_DEPENDS=y
596CONFIG_CHELSIO_T3=m 807CONFIG_CHELSIO_T3=m
808CONFIG_ENIC=m
809CONFIG_IXGBE=m
597# CONFIG_IXGB is not set 810# CONFIG_IXGB is not set
598# CONFIG_S2IO is not set 811# CONFIG_S2IO is not set
812CONFIG_VXGE=m
813# CONFIG_VXGE_DEBUG_TRACE_ALL is not set
599# CONFIG_MYRI10GE is not set 814# CONFIG_MYRI10GE is not set
600CONFIG_NETXEN_NIC=m 815CONFIG_NETXEN_NIC=m
601# CONFIG_MLX4_CORE is not set 816CONFIG_NIU=m
817CONFIG_MLX4_EN=m
818CONFIG_MLX4_CORE=m
819# CONFIG_MLX4_DEBUG is not set
820CONFIG_TEHUTI=m
821CONFIG_BNX2X=m
822CONFIG_QLGE=m
823CONFIG_SFC=m
824CONFIG_BE2NET=m
602# CONFIG_TR is not set 825# CONFIG_TR is not set
603 826CONFIG_WLAN=y
604# 827CONFIG_LIBERTAS_THINFIRM=m
605# Wireless LAN 828CONFIG_ATMEL=m
606# 829CONFIG_PCI_ATMEL=m
607# CONFIG_WLAN_PRE80211 is not set 830CONFIG_PRISM54=m
608CONFIG_WLAN_80211=y 831CONFIG_RTL8180=m
832CONFIG_ADM8211=m
833# CONFIG_MAC80211_HWSIM is not set
834CONFIG_MWL8K=m
835CONFIG_ATH_COMMON=m
836# CONFIG_ATH_DEBUG is not set
837CONFIG_ATH5K=m
838# CONFIG_ATH5K_DEBUG is not set
839CONFIG_ATH9K_HW=m
840CONFIG_ATH9K_COMMON=m
841CONFIG_ATH9K=m
842CONFIG_B43=m
843CONFIG_B43_PCI_AUTOSELECT=y
844CONFIG_B43_PCICORE_AUTOSELECT=y
845CONFIG_B43_PHY_LP=y
846CONFIG_B43_LEDS=y
847CONFIG_B43_HWRNG=y
848# CONFIG_B43_DEBUG is not set
849CONFIG_B43LEGACY=m
850CONFIG_B43LEGACY_PCI_AUTOSELECT=y
851CONFIG_B43LEGACY_PCICORE_AUTOSELECT=y
852CONFIG_B43LEGACY_LEDS=y
853CONFIG_B43LEGACY_HWRNG=y
854# CONFIG_B43LEGACY_DEBUG is not set
855CONFIG_B43LEGACY_DMA=y
856CONFIG_B43LEGACY_PIO=y
857CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y
858# CONFIG_B43LEGACY_DMA_MODE is not set
859# CONFIG_B43LEGACY_PIO_MODE is not set
860CONFIG_HOSTAP=m
861CONFIG_HOSTAP_FIRMWARE=y
862CONFIG_HOSTAP_FIRMWARE_NVRAM=y
863CONFIG_HOSTAP_PLX=m
864CONFIG_HOSTAP_PCI=m
609CONFIG_IPW2100=m 865CONFIG_IPW2100=m
610CONFIG_IPW2100_MONITOR=y 866CONFIG_IPW2100_MONITOR=y
611CONFIG_IPW2100_DEBUG=y 867CONFIG_IPW2100_DEBUG=y
@@ -615,38 +871,57 @@ CONFIG_IPW2200_RADIOTAP=y
615CONFIG_IPW2200_PROMISCUOUS=y 871CONFIG_IPW2200_PROMISCUOUS=y
616CONFIG_IPW2200_QOS=y 872CONFIG_IPW2200_QOS=y
617CONFIG_IPW2200_DEBUG=y 873CONFIG_IPW2200_DEBUG=y
874CONFIG_LIBIPW=m
875# CONFIG_LIBIPW_DEBUG is not set
876CONFIG_IWLWIFI=m
877CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT=y
878# CONFIG_IWLWIFI_DEBUG is not set
879CONFIG_IWLAGN=m
880CONFIG_IWL4965=y
881CONFIG_IWL5000=y
882CONFIG_IWL3945=m
883CONFIG_IWL3945_SPECTRUM_MEASUREMENT=y
618CONFIG_LIBERTAS=m 884CONFIG_LIBERTAS=m
619# CONFIG_LIBERTAS_DEBUG is not set 885# CONFIG_LIBERTAS_DEBUG is not set
620CONFIG_HERMES=m 886CONFIG_HERMES=m
887# CONFIG_HERMES_CACHE_FW_ON_INIT is not set
621CONFIG_PLX_HERMES=m 888CONFIG_PLX_HERMES=m
622CONFIG_TMD_HERMES=m 889CONFIG_TMD_HERMES=m
623CONFIG_NORTEL_HERMES=m 890CONFIG_NORTEL_HERMES=m
624CONFIG_PCI_HERMES=m 891CONFIG_PCI_HERMES=m
625CONFIG_ATMEL=m 892CONFIG_P54_COMMON=m
626CONFIG_PCI_ATMEL=m 893CONFIG_P54_PCI=m
627CONFIG_PRISM54=m 894CONFIG_P54_LEDS=y
628CONFIG_HOSTAP=m 895CONFIG_RT2X00=m
629CONFIG_HOSTAP_FIRMWARE=y 896CONFIG_RT2400PCI=m
630CONFIG_HOSTAP_FIRMWARE_NVRAM=y 897CONFIG_RT2500PCI=m
631CONFIG_HOSTAP_PLX=m 898CONFIG_RT61PCI=m
632CONFIG_HOSTAP_PCI=m 899CONFIG_RT2800PCI_PCI=m
633CONFIG_BCM43XX=m 900CONFIG_RT2800PCI=m
634CONFIG_BCM43XX_DEBUG=y 901CONFIG_RT2800_LIB=m
635CONFIG_BCM43XX_DMA=y 902CONFIG_RT2X00_LIB_PCI=m
636CONFIG_BCM43XX_PIO=y 903CONFIG_RT2X00_LIB=m
637CONFIG_BCM43XX_DMA_AND_PIO_MODE=y 904CONFIG_RT2X00_LIB_HT=y
638# CONFIG_BCM43XX_DMA_MODE is not set 905CONFIG_RT2X00_LIB_FIRMWARE=y
639# CONFIG_BCM43XX_PIO_MODE is not set 906CONFIG_RT2X00_LIB_CRYPTO=y
907CONFIG_RT2X00_LIB_LEDS=y
908# CONFIG_RT2X00_DEBUG is not set
909CONFIG_WL12XX=m
910CONFIG_WL1251=m
911
912#
913# Enable WiMAX (Networking options) to see the WiMAX drivers
914#
640# CONFIG_WAN is not set 915# CONFIG_WAN is not set
641# CONFIG_FDDI is not set 916# CONFIG_FDDI is not set
642# CONFIG_HIPPI is not set 917# CONFIG_HIPPI is not set
643# CONFIG_PPP is not set 918# CONFIG_PPP is not set
644# CONFIG_SLIP is not set 919# CONFIG_SLIP is not set
645# CONFIG_NET_FC is not set 920# CONFIG_NET_FC is not set
646# CONFIG_SHAPER is not set
647# CONFIG_NETCONSOLE is not set 921# CONFIG_NETCONSOLE is not set
648# CONFIG_NETPOLL is not set 922# CONFIG_NETPOLL is not set
649# CONFIG_NET_POLL_CONTROLLER is not set 923# CONFIG_NET_POLL_CONTROLLER is not set
924# CONFIG_VMXNET3 is not set
650# CONFIG_ISDN is not set 925# CONFIG_ISDN is not set
651# CONFIG_PHONE is not set 926# CONFIG_PHONE is not set
652 927
@@ -664,13 +939,16 @@ CONFIG_SERIO_SERPORT=y
664# CONFIG_SERIO_PCIPS2 is not set 939# CONFIG_SERIO_PCIPS2 is not set
665CONFIG_SERIO_LIBPS2=m 940CONFIG_SERIO_LIBPS2=m
666CONFIG_SERIO_RAW=m 941CONFIG_SERIO_RAW=m
942CONFIG_SERIO_ALTERA_PS2=m
667# CONFIG_GAMEPORT is not set 943# CONFIG_GAMEPORT is not set
668 944
669# 945#
670# Character devices 946# Character devices
671# 947#
672# CONFIG_VT is not set 948# CONFIG_VT is not set
949CONFIG_DEVKMEM=y
673# CONFIG_SERIAL_NONSTANDARD is not set 950# CONFIG_SERIAL_NONSTANDARD is not set
951CONFIG_NOZOMI=m
674 952
675# 953#
676# Serial drivers 954# Serial drivers
@@ -693,95 +971,258 @@ CONFIG_SERIAL_CORE=y
693CONFIG_SERIAL_CORE_CONSOLE=y 971CONFIG_SERIAL_CORE_CONSOLE=y
694# CONFIG_SERIAL_JSM is not set 972# CONFIG_SERIAL_JSM is not set
695CONFIG_UNIX98_PTYS=y 973CONFIG_UNIX98_PTYS=y
974CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
696CONFIG_LEGACY_PTYS=y 975CONFIG_LEGACY_PTYS=y
697CONFIG_LEGACY_PTY_COUNT=256 976CONFIG_LEGACY_PTY_COUNT=256
698# CONFIG_IPMI_HANDLER is not set 977# CONFIG_IPMI_HANDLER is not set
699# CONFIG_WATCHDOG is not set
700CONFIG_HW_RANDOM=m 978CONFIG_HW_RANDOM=m
701# CONFIG_RTC is not set 979CONFIG_HW_RANDOM_TIMERIOMEM=m
702# CONFIG_R3964 is not set 980# CONFIG_R3964 is not set
703# CONFIG_APPLICOM is not set 981# CONFIG_APPLICOM is not set
704# CONFIG_DRM is not set
705# CONFIG_RAW_DRIVER is not set 982# CONFIG_RAW_DRIVER is not set
706# CONFIG_TCG_TPM is not set 983# CONFIG_TCG_TPM is not set
707CONFIG_DEVPORT=y 984CONFIG_DEVPORT=y
708# CONFIG_I2C is not set 985CONFIG_I2C=m
986CONFIG_I2C_BOARDINFO=y
987CONFIG_I2C_COMPAT=y
988CONFIG_I2C_CHARDEV=m
989CONFIG_I2C_HELPER_AUTO=y
990CONFIG_I2C_ALGOBIT=m
991CONFIG_I2C_ALGOPCA=m
992
993#
994# I2C Hardware Bus support
995#
996
997#
998# PC SMBus host controller drivers
999#
1000CONFIG_I2C_ALI1535=m
1001CONFIG_I2C_ALI1563=m
1002CONFIG_I2C_ALI15X3=m
1003CONFIG_I2C_AMD756=m
1004CONFIG_I2C_AMD8111=m
1005CONFIG_I2C_I801=m
1006CONFIG_I2C_ISCH=m
1007CONFIG_I2C_PIIX4=m
1008CONFIG_I2C_NFORCE2=m
1009CONFIG_I2C_SIS5595=m
1010CONFIG_I2C_SIS630=m
1011CONFIG_I2C_SIS96X=m
1012CONFIG_I2C_VIA=m
1013CONFIG_I2C_VIAPRO=m
709 1014
710# 1015#
711# SPI support 1016# I2C system bus drivers (mostly embedded / system-on-chip)
712# 1017#
1018CONFIG_I2C_OCORES=m
1019CONFIG_I2C_SIMTEC=m
1020
1021#
1022# External I2C/SMBus adapter drivers
1023#
1024CONFIG_I2C_PARPORT_LIGHT=m
1025CONFIG_I2C_TAOS_EVM=m
1026
1027#
1028# Other I2C/SMBus bus drivers
1029#
1030CONFIG_I2C_PCA_PLATFORM=m
1031CONFIG_I2C_STUB=m
1032
1033#
1034# Miscellaneous I2C Chip support
1035#
1036CONFIG_SENSORS_TSL2550=m
1037# CONFIG_I2C_DEBUG_CORE is not set
1038# CONFIG_I2C_DEBUG_ALGO is not set
1039# CONFIG_I2C_DEBUG_BUS is not set
1040# CONFIG_I2C_DEBUG_CHIP is not set
713# CONFIG_SPI is not set 1041# CONFIG_SPI is not set
714# CONFIG_SPI_MASTER is not set 1042
1043#
1044# PPS support
1045#
1046CONFIG_PPS=m
1047# CONFIG_PPS_DEBUG is not set
715# CONFIG_W1 is not set 1048# CONFIG_W1 is not set
716# CONFIG_POWER_SUPPLY is not set 1049# CONFIG_POWER_SUPPLY is not set
717# CONFIG_HWMON is not set 1050# CONFIG_HWMON is not set
1051CONFIG_THERMAL=m
1052# CONFIG_WATCHDOG is not set
1053CONFIG_SSB_POSSIBLE=y
718 1054
719# 1055#
720# Multifunction device drivers 1056# Sonics Silicon Backplane
721# 1057#
722# CONFIG_MFD_SM501 is not set 1058CONFIG_SSB=m
1059CONFIG_SSB_SPROM=y
1060CONFIG_SSB_PCIHOST_POSSIBLE=y
1061CONFIG_SSB_PCIHOST=y
1062CONFIG_SSB_B43_PCI_BRIDGE=y
1063# CONFIG_SSB_SILENT is not set
1064# CONFIG_SSB_DEBUG is not set
1065CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
1066CONFIG_SSB_DRIVER_PCICORE=y
1067# CONFIG_SSB_DRIVER_MIPS is not set
723 1068
724# 1069#
725# Multimedia devices 1070# Multifunction device drivers
726# 1071#
727# CONFIG_VIDEO_DEV is not set 1072# CONFIG_MFD_CORE is not set
728# CONFIG_DVB_CORE is not set 1073# CONFIG_MFD_SM501 is not set
729# CONFIG_DAB is not set 1074# CONFIG_HTC_PASIC3 is not set
1075# CONFIG_MFD_TMIO is not set
1076# CONFIG_MFD_WM8400 is not set
1077CONFIG_MFD_WM8350=m
1078CONFIG_MFD_WM8350_I2C=m
1079CONFIG_MFD_PCF50633=m
1080CONFIG_PCF50633_ADC=m
1081CONFIG_PCF50633_GPIO=m
1082CONFIG_AB3100_CORE=m
1083CONFIG_AB3100_OTP=m
1084# CONFIG_REGULATOR is not set
1085# CONFIG_MEDIA_SUPPORT is not set
730 1086
731# 1087#
732# Graphics support 1088# Graphics support
733# 1089#
734# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 1090# CONFIG_VGA_ARB is not set
735 1091# CONFIG_DRM is not set
736#
737# Display device support
738#
739# CONFIG_DISPLAY_SUPPORT is not set
740# CONFIG_VGASTATE is not set 1092# CONFIG_VGASTATE is not set
741# CONFIG_VIDEO_OUTPUT_CONTROL is not set 1093# CONFIG_VIDEO_OUTPUT_CONTROL is not set
742# CONFIG_FB is not set 1094# CONFIG_FB is not set
1095# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
743 1096
744# 1097#
745# Sound 1098# Display device support
746# 1099#
1100# CONFIG_DISPLAY_SUPPORT is not set
747# CONFIG_SOUND is not set 1101# CONFIG_SOUND is not set
748CONFIG_USB_SUPPORT=y 1102CONFIG_USB_SUPPORT=y
749CONFIG_USB_ARCH_HAS_HCD=y 1103CONFIG_USB_ARCH_HAS_HCD=y
750CONFIG_USB_ARCH_HAS_OHCI=y 1104CONFIG_USB_ARCH_HAS_OHCI=y
751CONFIG_USB_ARCH_HAS_EHCI=y 1105CONFIG_USB_ARCH_HAS_EHCI=y
752# CONFIG_USB is not set 1106# CONFIG_USB is not set
1107# CONFIG_USB_OTG_WHITELIST is not set
1108# CONFIG_USB_OTG_BLACKLIST_HUB is not set
753 1109
754# 1110#
755# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 1111# Enable Host or Gadget support to see Inventra options
756# 1112#
757 1113
758# 1114#
759# USB Gadget Support 1115# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
760# 1116#
761# CONFIG_USB_GADGET is not set 1117# CONFIG_USB_GADGET is not set
1118
1119#
1120# OTG and related infrastructure
1121#
1122# CONFIG_UWB is not set
762# CONFIG_MMC is not set 1123# CONFIG_MMC is not set
763# CONFIG_NEW_LEDS is not set 1124# CONFIG_MEMSTICK is not set
764# CONFIG_INFINIBAND is not set 1125CONFIG_NEW_LEDS=y
765# CONFIG_RTC_CLASS is not set 1126CONFIG_LEDS_CLASS=m
1127
1128#
1129# LED drivers
1130#
1131CONFIG_LEDS_LP3944=m
1132CONFIG_LEDS_PCA955X=m
1133CONFIG_LEDS_WM8350=m
1134CONFIG_LEDS_BD2802=m
1135
1136#
1137# LED Triggers
1138#
1139CONFIG_LEDS_TRIGGERS=y
1140CONFIG_LEDS_TRIGGER_TIMER=m
1141CONFIG_LEDS_TRIGGER_HEARTBEAT=m
1142CONFIG_LEDS_TRIGGER_BACKLIGHT=m
1143CONFIG_LEDS_TRIGGER_DEFAULT_ON=m
766 1144
767# 1145#
768# DMA Engine support 1146# iptables trigger is under Netfilter config (LED target)
769# 1147#
770# CONFIG_DMA_ENGINE is not set 1148# CONFIG_ACCESSIBILITY is not set
1149# CONFIG_INFINIBAND is not set
1150CONFIG_RTC_LIB=y
1151CONFIG_RTC_CLASS=y
1152CONFIG_RTC_HCTOSYS=y
1153CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1154# CONFIG_RTC_DEBUG is not set
771 1155
772# 1156#
773# DMA Clients 1157# RTC interfaces
774# 1158#
1159CONFIG_RTC_INTF_SYSFS=y
1160CONFIG_RTC_INTF_PROC=y
1161CONFIG_RTC_INTF_DEV=y
1162# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1163# CONFIG_RTC_DRV_TEST is not set
775 1164
776# 1165#
777# DMA Devices 1166# I2C RTC drivers
1167#
1168# CONFIG_RTC_DRV_DS1307 is not set
1169# CONFIG_RTC_DRV_DS1374 is not set
1170# CONFIG_RTC_DRV_DS1672 is not set
1171# CONFIG_RTC_DRV_MAX6900 is not set
1172# CONFIG_RTC_DRV_RS5C372 is not set
1173# CONFIG_RTC_DRV_ISL1208 is not set
1174# CONFIG_RTC_DRV_X1205 is not set
1175# CONFIG_RTC_DRV_PCF8563 is not set
1176# CONFIG_RTC_DRV_PCF8583 is not set
1177# CONFIG_RTC_DRV_M41T80 is not set
1178# CONFIG_RTC_DRV_BQ32K is not set
1179# CONFIG_RTC_DRV_S35390A is not set
1180# CONFIG_RTC_DRV_FM3130 is not set
1181# CONFIG_RTC_DRV_RX8581 is not set
1182# CONFIG_RTC_DRV_RX8025 is not set
1183
1184#
1185# SPI RTC drivers
1186#
1187
778# 1188#
1189# Platform RTC drivers
1190#
1191# CONFIG_RTC_DRV_CMOS is not set
1192# CONFIG_RTC_DRV_DS1286 is not set
1193# CONFIG_RTC_DRV_DS1511 is not set
1194# CONFIG_RTC_DRV_DS1553 is not set
1195# CONFIG_RTC_DRV_DS1742 is not set
1196# CONFIG_RTC_DRV_STK17TA8 is not set
1197# CONFIG_RTC_DRV_M48T86 is not set
1198CONFIG_RTC_DRV_M48T35=y
1199# CONFIG_RTC_DRV_M48T59 is not set
1200# CONFIG_RTC_DRV_MSM6242 is not set
1201# CONFIG_RTC_DRV_BQ4802 is not set
1202# CONFIG_RTC_DRV_RP5C01 is not set
1203# CONFIG_RTC_DRV_V3020 is not set
1204# CONFIG_RTC_DRV_WM8350 is not set
1205# CONFIG_RTC_DRV_PCF50633 is not set
1206CONFIG_RTC_DRV_AB3100=m
779 1207
780# 1208#
781# Userspace I/O 1209# on-CPU RTC drivers
782# 1210#
1211# CONFIG_DMADEVICES is not set
1212# CONFIG_AUXDISPLAY is not set
783CONFIG_UIO=y 1213CONFIG_UIO=y
784# CONFIG_UIO_CIF is not set 1214# CONFIG_UIO_CIF is not set
1215# CONFIG_UIO_PDRV is not set
1216# CONFIG_UIO_PDRV_GENIRQ is not set
1217CONFIG_UIO_SMX=m
1218CONFIG_UIO_AEC=m
1219CONFIG_UIO_SERCOS3=m
1220CONFIG_UIO_PCI_GENERIC=m
1221
1222#
1223# TI VLYNQ
1224#
1225# CONFIG_STAGING is not set
785 1226
786# 1227#
787# File systems 1228# File systems
@@ -792,36 +1233,58 @@ CONFIG_EXT2_FS_POSIX_ACL=y
792CONFIG_EXT2_FS_SECURITY=y 1233CONFIG_EXT2_FS_SECURITY=y
793# CONFIG_EXT2_FS_XIP is not set 1234# CONFIG_EXT2_FS_XIP is not set
794CONFIG_EXT3_FS=y 1235CONFIG_EXT3_FS=y
1236# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
795CONFIG_EXT3_FS_XATTR=y 1237CONFIG_EXT3_FS_XATTR=y
796CONFIG_EXT3_FS_POSIX_ACL=y 1238CONFIG_EXT3_FS_POSIX_ACL=y
797CONFIG_EXT3_FS_SECURITY=y 1239CONFIG_EXT3_FS_SECURITY=y
798# CONFIG_EXT4DEV_FS is not set 1240CONFIG_EXT4_FS=y
1241CONFIG_EXT4_FS_XATTR=y
1242CONFIG_EXT4_FS_POSIX_ACL=y
1243CONFIG_EXT4_FS_SECURITY=y
1244# CONFIG_EXT4_DEBUG is not set
799CONFIG_JBD=y 1245CONFIG_JBD=y
800CONFIG_JBD_DEBUG=y 1246CONFIG_JBD2=y
801CONFIG_FS_MBCACHE=y 1247CONFIG_FS_MBCACHE=y
802# CONFIG_REISERFS_FS is not set 1248# CONFIG_REISERFS_FS is not set
803# CONFIG_JFS_FS is not set 1249# CONFIG_JFS_FS is not set
804CONFIG_FS_POSIX_ACL=y 1250CONFIG_FS_POSIX_ACL=y
805CONFIG_XFS_FS=m 1251CONFIG_XFS_FS=m
806CONFIG_XFS_QUOTA=y 1252CONFIG_XFS_QUOTA=y
807CONFIG_XFS_SECURITY=y
808CONFIG_XFS_POSIX_ACL=y 1253CONFIG_XFS_POSIX_ACL=y
809# CONFIG_XFS_RT is not set 1254# CONFIG_XFS_RT is not set
1255# CONFIG_XFS_DEBUG is not set
810# CONFIG_GFS2_FS is not set 1256# CONFIG_GFS2_FS is not set
811# CONFIG_OCFS2_FS is not set 1257# CONFIG_OCFS2_FS is not set
812# CONFIG_MINIX_FS is not set 1258CONFIG_BTRFS_FS=m
813# CONFIG_ROMFS_FS is not set 1259CONFIG_BTRFS_FS_POSIX_ACL=y
1260# CONFIG_NILFS2_FS is not set
1261CONFIG_FILE_LOCKING=y
1262CONFIG_FSNOTIFY=y
1263CONFIG_DNOTIFY=y
814CONFIG_INOTIFY=y 1264CONFIG_INOTIFY=y
815CONFIG_INOTIFY_USER=y 1265CONFIG_INOTIFY_USER=y
816# CONFIG_QUOTA is not set 1266# CONFIG_QUOTA is not set
1267CONFIG_QUOTA_NETLINK_INTERFACE=y
817CONFIG_QUOTACTL=y 1268CONFIG_QUOTACTL=y
818CONFIG_DNOTIFY=y
819CONFIG_AUTOFS_FS=m 1269CONFIG_AUTOFS_FS=m
820# CONFIG_AUTOFS4_FS is not set 1270# CONFIG_AUTOFS4_FS is not set
821CONFIG_FUSE_FS=m 1271CONFIG_FUSE_FS=m
1272CONFIG_CUSE=m
822CONFIG_GENERIC_ACL=y 1273CONFIG_GENERIC_ACL=y
823 1274
824# 1275#
1276# Caches
1277#
1278CONFIG_FSCACHE=m
1279CONFIG_FSCACHE_STATS=y
1280# CONFIG_FSCACHE_HISTOGRAM is not set
1281# CONFIG_FSCACHE_DEBUG is not set
1282# CONFIG_FSCACHE_OBJECT_LIST is not set
1283CONFIG_CACHEFILES=m
1284# CONFIG_CACHEFILES_DEBUG is not set
1285# CONFIG_CACHEFILES_HISTOGRAM is not set
1286
1287#
825# CD-ROM/DVD Filesystems 1288# CD-ROM/DVD Filesystems
826# 1289#
827# CONFIG_ISO9660_FS is not set 1290# CONFIG_ISO9660_FS is not set
@@ -840,16 +1303,13 @@ CONFIG_GENERIC_ACL=y
840CONFIG_PROC_FS=y 1303CONFIG_PROC_FS=y
841CONFIG_PROC_KCORE=y 1304CONFIG_PROC_KCORE=y
842CONFIG_PROC_SYSCTL=y 1305CONFIG_PROC_SYSCTL=y
1306CONFIG_PROC_PAGE_MONITOR=y
843CONFIG_SYSFS=y 1307CONFIG_SYSFS=y
844CONFIG_TMPFS=y 1308CONFIG_TMPFS=y
845CONFIG_TMPFS_POSIX_ACL=y 1309CONFIG_TMPFS_POSIX_ACL=y
846# CONFIG_HUGETLB_PAGE is not set 1310# CONFIG_HUGETLB_PAGE is not set
847CONFIG_RAMFS=y
848CONFIG_CONFIGFS_FS=m 1311CONFIG_CONFIGFS_FS=m
849 1312CONFIG_MISC_FILESYSTEMS=y
850#
851# Miscellaneous filesystems
852#
853# CONFIG_ADFS_FS is not set 1313# CONFIG_ADFS_FS is not set
854# CONFIG_AFFS_FS is not set 1314# CONFIG_AFFS_FS is not set
855# CONFIG_ECRYPT_FS is not set 1315# CONFIG_ECRYPT_FS is not set
@@ -859,28 +1319,32 @@ CONFIG_CONFIGFS_FS=m
859# CONFIG_BFS_FS is not set 1319# CONFIG_BFS_FS is not set
860# CONFIG_EFS_FS is not set 1320# CONFIG_EFS_FS is not set
861# CONFIG_CRAMFS is not set 1321# CONFIG_CRAMFS is not set
1322CONFIG_SQUASHFS=m
1323# CONFIG_SQUASHFS_EMBEDDED is not set
1324CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
862# CONFIG_VXFS_FS is not set 1325# CONFIG_VXFS_FS is not set
1326# CONFIG_MINIX_FS is not set
1327CONFIG_OMFS_FS=m
863# CONFIG_HPFS_FS is not set 1328# CONFIG_HPFS_FS is not set
864# CONFIG_QNX4FS_FS is not set 1329# CONFIG_QNX4FS_FS is not set
1330# CONFIG_ROMFS_FS is not set
865# CONFIG_SYSV_FS is not set 1331# CONFIG_SYSV_FS is not set
866# CONFIG_UFS_FS is not set 1332# CONFIG_UFS_FS is not set
867 1333CONFIG_EXOFS_FS=m
868# 1334# CONFIG_EXOFS_DEBUG is not set
869# Network File Systems 1335CONFIG_NETWORK_FILESYSTEMS=y
870#
871CONFIG_NFS_FS=y 1336CONFIG_NFS_FS=y
872CONFIG_NFS_V3=y 1337CONFIG_NFS_V3=y
873# CONFIG_NFS_V3_ACL is not set 1338# CONFIG_NFS_V3_ACL is not set
874# CONFIG_NFS_V4 is not set 1339# CONFIG_NFS_V4 is not set
875# CONFIG_NFS_DIRECTIO is not set
876# CONFIG_NFSD is not set
877# CONFIG_ROOT_NFS is not set 1340# CONFIG_ROOT_NFS is not set
1341# CONFIG_NFSD is not set
878CONFIG_LOCKD=y 1342CONFIG_LOCKD=y
879CONFIG_LOCKD_V4=y 1343CONFIG_LOCKD_V4=y
1344CONFIG_EXPORTFS=m
880CONFIG_NFS_COMMON=y 1345CONFIG_NFS_COMMON=y
881CONFIG_SUNRPC=y 1346CONFIG_SUNRPC=y
882CONFIG_SUNRPC_GSS=y 1347CONFIG_SUNRPC_GSS=y
883# CONFIG_SUNRPC_BIND34 is not set
884CONFIG_RPCSEC_GSS_KRB5=y 1348CONFIG_RPCSEC_GSS_KRB5=y
885# CONFIG_RPCSEC_GSS_SPKM3 is not set 1349# CONFIG_RPCSEC_GSS_SPKM3 is not set
886# CONFIG_SMB_FS is not set 1350# CONFIG_SMB_FS is not set
@@ -910,35 +1374,37 @@ CONFIG_SGI_PARTITION=y
910# CONFIG_KARMA_PARTITION is not set 1374# CONFIG_KARMA_PARTITION is not set
911# CONFIG_EFI_PARTITION is not set 1375# CONFIG_EFI_PARTITION is not set
912# CONFIG_SYSV68_PARTITION is not set 1376# CONFIG_SYSV68_PARTITION is not set
913
914#
915# Native Language Support
916#
917# CONFIG_NLS is not set 1377# CONFIG_NLS is not set
918
919#
920# Distributed Lock Manager
921#
922CONFIG_DLM=m 1378CONFIG_DLM=m
923# CONFIG_DLM_DEBUG is not set 1379# CONFIG_DLM_DEBUG is not set
924 1380
925# 1381#
926# Profiling support
927#
928# CONFIG_PROFILING is not set
929
930#
931# Kernel hacking 1382# Kernel hacking
932# 1383#
933CONFIG_TRACE_IRQFLAGS_SUPPORT=y 1384CONFIG_TRACE_IRQFLAGS_SUPPORT=y
934# CONFIG_PRINTK_TIME is not set 1385# CONFIG_PRINTK_TIME is not set
1386CONFIG_ENABLE_WARN_DEPRECATED=y
935CONFIG_ENABLE_MUST_CHECK=y 1387CONFIG_ENABLE_MUST_CHECK=y
1388CONFIG_FRAME_WARN=2048
936# CONFIG_MAGIC_SYSRQ is not set 1389# CONFIG_MAGIC_SYSRQ is not set
1390# CONFIG_STRIP_ASM_SYMS is not set
937# CONFIG_UNUSED_SYMBOLS is not set 1391# CONFIG_UNUSED_SYMBOLS is not set
938# CONFIG_DEBUG_FS is not set 1392# CONFIG_DEBUG_FS is not set
939# CONFIG_HEADERS_CHECK is not set 1393# CONFIG_HEADERS_CHECK is not set
940# CONFIG_DEBUG_KERNEL is not set 1394# CONFIG_DEBUG_KERNEL is not set
941CONFIG_CROSSCOMPILE=y 1395# CONFIG_DEBUG_MEMORY_INIT is not set
1396# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1397# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1398CONFIG_HAVE_FUNCTION_TRACER=y
1399CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1400CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
1401CONFIG_HAVE_DYNAMIC_FTRACE=y
1402CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
1403CONFIG_TRACING_SUPPORT=y
1404# CONFIG_FTRACE is not set
1405# CONFIG_SAMPLES is not set
1406CONFIG_HAVE_ARCH_KGDB=y
1407CONFIG_EARLY_PRINTK=y
942# CONFIG_CMDLINE_BOOL is not set 1408# CONFIG_CMDLINE_BOOL is not set
943 1409
944# 1410#
@@ -947,65 +1413,140 @@ CONFIG_CROSSCOMPILE=y
947CONFIG_KEYS=y 1413CONFIG_KEYS=y
948CONFIG_KEYS_DEBUG_PROC_KEYS=y 1414CONFIG_KEYS_DEBUG_PROC_KEYS=y
949# CONFIG_SECURITY is not set 1415# CONFIG_SECURITY is not set
950CONFIG_XOR_BLOCKS=m 1416CONFIG_SECURITYFS=y
951CONFIG_ASYNC_CORE=m 1417# CONFIG_DEFAULT_SECURITY_SELINUX is not set
952CONFIG_ASYNC_MEMCPY=m 1418# CONFIG_DEFAULT_SECURITY_SMACK is not set
953CONFIG_ASYNC_XOR=m 1419# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1420CONFIG_DEFAULT_SECURITY_DAC=y
1421CONFIG_DEFAULT_SECURITY=""
1422CONFIG_XOR_BLOCKS=y
1423CONFIG_ASYNC_CORE=y
1424CONFIG_ASYNC_MEMCPY=y
1425CONFIG_ASYNC_XOR=y
1426CONFIG_ASYNC_PQ=y
1427CONFIG_ASYNC_RAID6_RECOV=y
954CONFIG_CRYPTO=y 1428CONFIG_CRYPTO=y
1429
1430#
1431# Crypto core or helper
1432#
1433CONFIG_CRYPTO_FIPS=y
955CONFIG_CRYPTO_ALGAPI=y 1434CONFIG_CRYPTO_ALGAPI=y
956CONFIG_CRYPTO_ABLKCIPHER=m 1435CONFIG_CRYPTO_ALGAPI2=y
1436CONFIG_CRYPTO_AEAD=m
1437CONFIG_CRYPTO_AEAD2=y
957CONFIG_CRYPTO_BLKCIPHER=y 1438CONFIG_CRYPTO_BLKCIPHER=y
1439CONFIG_CRYPTO_BLKCIPHER2=y
958CONFIG_CRYPTO_HASH=y 1440CONFIG_CRYPTO_HASH=y
1441CONFIG_CRYPTO_HASH2=y
1442CONFIG_CRYPTO_RNG=m
1443CONFIG_CRYPTO_RNG2=y
1444CONFIG_CRYPTO_PCOMP=y
959CONFIG_CRYPTO_MANAGER=y 1445CONFIG_CRYPTO_MANAGER=y
1446CONFIG_CRYPTO_MANAGER2=y
1447CONFIG_CRYPTO_GF128MUL=m
1448CONFIG_CRYPTO_NULL=m
1449CONFIG_CRYPTO_WORKQUEUE=y
1450CONFIG_CRYPTO_CRYPTD=m
1451CONFIG_CRYPTO_AUTHENC=m
1452# CONFIG_CRYPTO_TEST is not set
1453
1454#
1455# Authenticated Encryption with Associated Data
1456#
1457CONFIG_CRYPTO_CCM=m
1458CONFIG_CRYPTO_GCM=m
1459CONFIG_CRYPTO_SEQIV=m
1460
1461#
1462# Block modes
1463#
1464CONFIG_CRYPTO_CBC=y
1465CONFIG_CRYPTO_CTR=m
1466CONFIG_CRYPTO_CTS=m
1467CONFIG_CRYPTO_ECB=m
1468CONFIG_CRYPTO_LRW=m
1469CONFIG_CRYPTO_PCBC=m
1470CONFIG_CRYPTO_XTS=m
1471
1472#
1473# Hash modes
1474#
960CONFIG_CRYPTO_HMAC=y 1475CONFIG_CRYPTO_HMAC=y
961CONFIG_CRYPTO_XCBC=m 1476CONFIG_CRYPTO_XCBC=m
962CONFIG_CRYPTO_NULL=m 1477CONFIG_CRYPTO_VMAC=m
1478
1479#
1480# Digest
1481#
1482CONFIG_CRYPTO_CRC32C=m
1483CONFIG_CRYPTO_GHASH=m
963CONFIG_CRYPTO_MD4=m 1484CONFIG_CRYPTO_MD4=m
964CONFIG_CRYPTO_MD5=y 1485CONFIG_CRYPTO_MD5=y
1486CONFIG_CRYPTO_MICHAEL_MIC=m
1487CONFIG_CRYPTO_RMD128=m
1488CONFIG_CRYPTO_RMD160=m
1489CONFIG_CRYPTO_RMD256=m
1490CONFIG_CRYPTO_RMD320=m
965CONFIG_CRYPTO_SHA1=m 1491CONFIG_CRYPTO_SHA1=m
966CONFIG_CRYPTO_SHA256=m 1492CONFIG_CRYPTO_SHA256=m
967CONFIG_CRYPTO_SHA512=m 1493CONFIG_CRYPTO_SHA512=m
968CONFIG_CRYPTO_WP512=m
969CONFIG_CRYPTO_TGR192=m 1494CONFIG_CRYPTO_TGR192=m
970CONFIG_CRYPTO_GF128MUL=m 1495CONFIG_CRYPTO_WP512=m
971CONFIG_CRYPTO_ECB=m 1496
972CONFIG_CRYPTO_CBC=y 1497#
973CONFIG_CRYPTO_PCBC=m 1498# Ciphers
974CONFIG_CRYPTO_LRW=m 1499#
975CONFIG_CRYPTO_CRYPTD=m
976CONFIG_CRYPTO_DES=y
977CONFIG_CRYPTO_FCRYPT=m
978CONFIG_CRYPTO_BLOWFISH=m
979CONFIG_CRYPTO_TWOFISH=m
980CONFIG_CRYPTO_TWOFISH_COMMON=m
981CONFIG_CRYPTO_SERPENT=m
982CONFIG_CRYPTO_AES=m 1500CONFIG_CRYPTO_AES=m
1501CONFIG_CRYPTO_ANUBIS=m
1502CONFIG_CRYPTO_ARC4=m
1503CONFIG_CRYPTO_BLOWFISH=m
1504CONFIG_CRYPTO_CAMELLIA=m
983CONFIG_CRYPTO_CAST5=m 1505CONFIG_CRYPTO_CAST5=m
984CONFIG_CRYPTO_CAST6=m 1506CONFIG_CRYPTO_CAST6=m
985CONFIG_CRYPTO_TEA=m 1507CONFIG_CRYPTO_DES=y
986CONFIG_CRYPTO_ARC4=m 1508CONFIG_CRYPTO_FCRYPT=m
987CONFIG_CRYPTO_KHAZAD=m 1509CONFIG_CRYPTO_KHAZAD=m
988CONFIG_CRYPTO_ANUBIS=m 1510CONFIG_CRYPTO_SALSA20=m
1511CONFIG_CRYPTO_SEED=m
1512CONFIG_CRYPTO_SERPENT=m
1513CONFIG_CRYPTO_TEA=m
1514CONFIG_CRYPTO_TWOFISH=m
1515CONFIG_CRYPTO_TWOFISH_COMMON=m
1516
1517#
1518# Compression
1519#
989CONFIG_CRYPTO_DEFLATE=m 1520CONFIG_CRYPTO_DEFLATE=m
990CONFIG_CRYPTO_MICHAEL_MIC=m 1521CONFIG_CRYPTO_ZLIB=m
991CONFIG_CRYPTO_CRC32C=m 1522CONFIG_CRYPTO_LZO=m
992CONFIG_CRYPTO_CAMELLIA=m 1523
993# CONFIG_CRYPTO_TEST is not set 1524#
1525# Random Number Generation
1526#
1527CONFIG_CRYPTO_ANSI_CPRNG=m
994CONFIG_CRYPTO_HW=y 1528CONFIG_CRYPTO_HW=y
1529CONFIG_CRYPTO_DEV_HIFN_795X=m
1530# CONFIG_CRYPTO_DEV_HIFN_795X_RNG is not set
1531# CONFIG_BINARY_PRINTF is not set
995 1532
996# 1533#
997# Library routines 1534# Library routines
998# 1535#
999CONFIG_BITREVERSE=y 1536CONFIG_BITREVERSE=y
1537CONFIG_GENERIC_FIND_LAST_BIT=y
1000CONFIG_CRC_CCITT=m 1538CONFIG_CRC_CCITT=m
1001# CONFIG_CRC16 is not set 1539CONFIG_CRC16=y
1002# CONFIG_CRC_ITU_T is not set 1540CONFIG_CRC_T10DIF=m
1541CONFIG_CRC_ITU_T=m
1003CONFIG_CRC32=y 1542CONFIG_CRC32=y
1004# CONFIG_CRC7 is not set 1543CONFIG_CRC7=m
1005CONFIG_LIBCRC32C=m 1544CONFIG_LIBCRC32C=m
1006CONFIG_ZLIB_INFLATE=m 1545CONFIG_ZLIB_INFLATE=m
1007CONFIG_ZLIB_DEFLATE=m 1546CONFIG_ZLIB_DEFLATE=m
1008CONFIG_PLIST=y 1547CONFIG_LZO_COMPRESS=m
1548CONFIG_LZO_DECOMPRESS=m
1009CONFIG_HAS_IOMEM=y 1549CONFIG_HAS_IOMEM=y
1010CONFIG_HAS_IOPORT=y 1550CONFIG_HAS_IOPORT=y
1011CONFIG_HAS_DMA=y 1551CONFIG_HAS_DMA=y
1552CONFIG_NLATTR=y
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
index 1f4df647c384..272c5ef35bbb 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -191,6 +191,9 @@
191# ifndef cpu_has_64bit_addresses 191# ifndef cpu_has_64bit_addresses
192# define cpu_has_64bit_addresses 0 192# define cpu_has_64bit_addresses 0
193# endif 193# endif
194# ifndef cpu_vmbits
195# define cpu_vmbits 31
196# endif
194#endif 197#endif
195 198
196#ifdef CONFIG_64BIT 199#ifdef CONFIG_64BIT
@@ -209,6 +212,10 @@
209# ifndef cpu_has_64bit_addresses 212# ifndef cpu_has_64bit_addresses
210# define cpu_has_64bit_addresses 1 213# define cpu_has_64bit_addresses 1
211# endif 214# endif
215# ifndef cpu_vmbits
216# define cpu_vmbits cpu_data[0].vmbits
217# define __NEED_VMBITS_PROBE
218# endif
212#endif 219#endif
213 220
214#if defined(CONFIG_CPU_MIPSR2_IRQ_VI) && !defined(cpu_has_vint) 221#if defined(CONFIG_CPU_MIPSR2_IRQ_VI) && !defined(cpu_has_vint)
diff --git a/arch/mips/include/asm/cpu-info.h b/arch/mips/include/asm/cpu-info.h
index 126044308dec..b39def3f6e03 100644
--- a/arch/mips/include/asm/cpu-info.h
+++ b/arch/mips/include/asm/cpu-info.h
@@ -58,6 +58,9 @@ struct cpuinfo_mips {
58 struct cache_desc tcache; /* Tertiary/split secondary cache */ 58 struct cache_desc tcache; /* Tertiary/split secondary cache */
59 int srsets; /* Shadow register sets */ 59 int srsets; /* Shadow register sets */
60 int core; /* physical core number */ 60 int core; /* physical core number */
61#ifdef CONFIG_64BIT
62 int vmbits; /* Virtual memory size in bits */
63#endif
61#if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC) 64#if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC)
62 /* 65 /*
63 * In the MIPS MT "SMTC" model, each TC is considered 66 * In the MIPS MT "SMTC" model, each TC is considered
diff --git a/arch/mips/include/asm/irq.h b/arch/mips/include/asm/irq.h
index 06960364c96b..dea4aed6478f 100644
--- a/arch/mips/include/asm/irq.h
+++ b/arch/mips/include/asm/irq.h
@@ -135,6 +135,7 @@ extern void free_irqno(unsigned int irq);
135#define CP0_LEGACY_COMPARE_IRQ 7 135#define CP0_LEGACY_COMPARE_IRQ 7
136 136
137extern int cp0_compare_irq; 137extern int cp0_compare_irq;
138extern int cp0_compare_irq_shift;
138extern int cp0_perfcount_irq; 139extern int cp0_perfcount_irq;
139 140
140#endif /* _ASM_IRQ_H */ 141#endif /* _ASM_IRQ_H */
diff --git a/arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h b/arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h
index 06f68f43800a..d206000fbfe2 100644
--- a/arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h
+++ b/arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h
@@ -305,6 +305,7 @@ typedef struct dbdma_chan_config {
305 dbdev_tab_t *chan_dest; 305 dbdev_tab_t *chan_dest;
306 au1x_dma_chan_t *chan_ptr; 306 au1x_dma_chan_t *chan_ptr;
307 au1x_ddma_desc_t *chan_desc_base; 307 au1x_ddma_desc_t *chan_desc_base;
308 u32 cdb_membase; /* kmalloc base of above */
308 au1x_ddma_desc_t *get_ptr, *put_ptr, *cur_ptr; 309 au1x_ddma_desc_t *get_ptr, *put_ptr, *cur_ptr;
309 void *chan_callparam; 310 void *chan_callparam;
310 void (*chan_callback)(int, void *); 311 void (*chan_callback)(int, void *);
diff --git a/arch/mips/include/asm/mach-ip27/topology.h b/arch/mips/include/asm/mach-ip27/topology.h
index 09a59bcc1b07..1b1a7d1632b9 100644
--- a/arch/mips/include/asm/mach-ip27/topology.h
+++ b/arch/mips/include/asm/mach-ip27/topology.h
@@ -24,7 +24,9 @@ extern struct cpuinfo_ip27 sn_cpu_info[NR_CPUS];
24 24
25#define cpu_to_node(cpu) (sn_cpu_info[(cpu)].p_nodeid) 25#define cpu_to_node(cpu) (sn_cpu_info[(cpu)].p_nodeid)
26#define parent_node(node) (node) 26#define parent_node(node) (node)
27#define cpumask_of_node(node) (&hub_data(node)->h_cpus) 27#define cpumask_of_node(node) ((node) == -1 ? \
28 cpu_all_mask : \
29 &hub_data(node)->h_cpus)
28struct pci_bus; 30struct pci_bus;
29extern int pcibus_to_node(struct pci_bus *); 31extern int pcibus_to_node(struct pci_bus *);
30 32
diff --git a/arch/mips/include/asm/mach-powertv/asic_reg_map.h b/arch/mips/include/asm/mach-powertv/asic_reg_map.h
new file mode 100644
index 000000000000..6f26cb09828e
--- /dev/null
+++ b/arch/mips/include/asm/mach-powertv/asic_reg_map.h
@@ -0,0 +1,90 @@
1/*
2 * asic_reg_map.h
3 *
4 * A macro-enclosed list of the elements for the register_map structure for
5 * use in defining and manipulating the structure.
6 *
7 * Copyright (C) 2009 Cisco Systems, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 */
23
24REGISTER_MAP_ELEMENT(eic_slow0_strt_add)
25REGISTER_MAP_ELEMENT(eic_cfg_bits)
26REGISTER_MAP_ELEMENT(eic_ready_status)
27REGISTER_MAP_ELEMENT(chipver3)
28REGISTER_MAP_ELEMENT(chipver2)
29REGISTER_MAP_ELEMENT(chipver1)
30REGISTER_MAP_ELEMENT(chipver0)
31REGISTER_MAP_ELEMENT(uart1_intstat)
32REGISTER_MAP_ELEMENT(uart1_inten)
33REGISTER_MAP_ELEMENT(uart1_config1)
34REGISTER_MAP_ELEMENT(uart1_config2)
35REGISTER_MAP_ELEMENT(uart1_divisorhi)
36REGISTER_MAP_ELEMENT(uart1_divisorlo)
37REGISTER_MAP_ELEMENT(uart1_data)
38REGISTER_MAP_ELEMENT(uart1_status)
39REGISTER_MAP_ELEMENT(int_stat_3)
40REGISTER_MAP_ELEMENT(int_stat_2)
41REGISTER_MAP_ELEMENT(int_stat_1)
42REGISTER_MAP_ELEMENT(int_stat_0)
43REGISTER_MAP_ELEMENT(int_config)
44REGISTER_MAP_ELEMENT(int_int_scan)
45REGISTER_MAP_ELEMENT(ien_int_3)
46REGISTER_MAP_ELEMENT(ien_int_2)
47REGISTER_MAP_ELEMENT(ien_int_1)
48REGISTER_MAP_ELEMENT(ien_int_0)
49REGISTER_MAP_ELEMENT(int_level_3_3)
50REGISTER_MAP_ELEMENT(int_level_3_2)
51REGISTER_MAP_ELEMENT(int_level_3_1)
52REGISTER_MAP_ELEMENT(int_level_3_0)
53REGISTER_MAP_ELEMENT(int_level_2_3)
54REGISTER_MAP_ELEMENT(int_level_2_2)
55REGISTER_MAP_ELEMENT(int_level_2_1)
56REGISTER_MAP_ELEMENT(int_level_2_0)
57REGISTER_MAP_ELEMENT(int_level_1_3)
58REGISTER_MAP_ELEMENT(int_level_1_2)
59REGISTER_MAP_ELEMENT(int_level_1_1)
60REGISTER_MAP_ELEMENT(int_level_1_0)
61REGISTER_MAP_ELEMENT(int_level_0_3)
62REGISTER_MAP_ELEMENT(int_level_0_2)
63REGISTER_MAP_ELEMENT(int_level_0_1)
64REGISTER_MAP_ELEMENT(int_level_0_0)
65REGISTER_MAP_ELEMENT(int_docsis_en)
66REGISTER_MAP_ELEMENT(mips_pll_setup)
67REGISTER_MAP_ELEMENT(usb_fs)
68REGISTER_MAP_ELEMENT(test_bus)
69REGISTER_MAP_ELEMENT(crt_spare)
70REGISTER_MAP_ELEMENT(usb2_ohci_int_mask)
71REGISTER_MAP_ELEMENT(usb2_strap)
72REGISTER_MAP_ELEMENT(ehci_hcapbase)
73REGISTER_MAP_ELEMENT(ohci_hc_revision)
74REGISTER_MAP_ELEMENT(bcm1_bs_lmi_steer)
75REGISTER_MAP_ELEMENT(usb2_control)
76REGISTER_MAP_ELEMENT(usb2_stbus_obc)
77REGISTER_MAP_ELEMENT(usb2_stbus_mess_size)
78REGISTER_MAP_ELEMENT(usb2_stbus_chunk_size)
79REGISTER_MAP_ELEMENT(pcie_regs)
80REGISTER_MAP_ELEMENT(tim_ch)
81REGISTER_MAP_ELEMENT(tim_cl)
82REGISTER_MAP_ELEMENT(gpio_dout)
83REGISTER_MAP_ELEMENT(gpio_din)
84REGISTER_MAP_ELEMENT(gpio_dir)
85REGISTER_MAP_ELEMENT(watchdog)
86REGISTER_MAP_ELEMENT(front_panel)
87REGISTER_MAP_ELEMENT(misc_clk_ctl1)
88REGISTER_MAP_ELEMENT(misc_clk_ctl2)
89REGISTER_MAP_ELEMENT(crt_ext_ctl)
90REGISTER_MAP_ELEMENT(register_maps)
diff --git a/arch/mips/include/asm/mach-powertv/asic_regs.h b/arch/mips/include/asm/mach-powertv/asic_regs.h
index 9a65c93782f9..1e11236c6dbc 100644
--- a/arch/mips/include/asm/mach-powertv/asic_regs.h
+++ b/arch/mips/include/asm/mach-powertv/asic_regs.h
@@ -35,11 +35,12 @@ enum asic_type {
35#define CRONUS_11 0x0B4C1C21 35#define CRONUS_11 0x0B4C1C21
36#define CRONUSLITE_10 0x0B4C1C40 36#define CRONUSLITE_10 0x0B4C1C40
37 37
38#define NAND_FLASH_BASE 0x03000000 38#define NAND_FLASH_BASE 0x03000000
39#define ZEUS_IO_BASE 0x09000000
40#define CALLIOPE_IO_BASE 0x08000000 39#define CALLIOPE_IO_BASE 0x08000000
41#define CRONUS_IO_BASE 0x09000000 40#define CRONUS_IO_BASE 0x09000000
42#define ASIC_IO_SIZE 0x01000000 41#define ZEUS_IO_BASE 0x09000000
42
43#define ASIC_IO_SIZE 0x01000000
43 44
44/* Definitions for backward compatibility */ 45/* Definitions for backward compatibility */
45#define UART1_INTSTAT uart1_intstat 46#define UART1_INTSTAT uart1_intstat
@@ -52,96 +53,62 @@ enum asic_type {
52#define UART1_STATUS uart1_status 53#define UART1_STATUS uart1_status
53 54
54/* ASIC register enumeration */ 55/* ASIC register enumeration */
56union register_map_entry {
57 unsigned long phys;
58 u32 *virt;
59};
60
61#define REGISTER_MAP_ELEMENT(x) union register_map_entry x;
55struct register_map { 62struct register_map {
56 u32 eic_slow0_strt_add; 63#include <asm/mach-powertv/asic_reg_map.h>
57 u32 eic_cfg_bits;
58 u32 eic_ready_status;
59
60 u32 chipver3;
61 u32 chipver2;
62 u32 chipver1;
63 u32 chipver0;
64
65 u32 uart1_intstat;
66 u32 uart1_inten;
67 u32 uart1_config1;
68 u32 uart1_config2;
69 u32 uart1_divisorhi;
70 u32 uart1_divisorlo;
71 u32 uart1_data;
72 u32 uart1_status;
73
74 u32 int_stat_3;
75 u32 int_stat_2;
76 u32 int_stat_1;
77 u32 int_stat_0;
78 u32 int_config;
79 u32 int_int_scan;
80 u32 ien_int_3;
81 u32 ien_int_2;
82 u32 ien_int_1;
83 u32 ien_int_0;
84 u32 int_level_3_3;
85 u32 int_level_3_2;
86 u32 int_level_3_1;
87 u32 int_level_3_0;
88 u32 int_level_2_3;
89 u32 int_level_2_2;
90 u32 int_level_2_1;
91 u32 int_level_2_0;
92 u32 int_level_1_3;
93 u32 int_level_1_2;
94 u32 int_level_1_1;
95 u32 int_level_1_0;
96 u32 int_level_0_3;
97 u32 int_level_0_2;
98 u32 int_level_0_1;
99 u32 int_level_0_0;
100 u32 int_docsis_en;
101
102 u32 mips_pll_setup;
103 u32 usb_fs;
104 u32 test_bus;
105 u32 crt_spare;
106 u32 usb2_ohci_int_mask;
107 u32 usb2_strap;
108 u32 ehci_hcapbase;
109 u32 ohci_hc_revision;
110 u32 bcm1_bs_lmi_steer;
111 u32 usb2_control;
112 u32 usb2_stbus_obc;
113 u32 usb2_stbus_mess_size;
114 u32 usb2_stbus_chunk_size;
115
116 u32 pcie_regs;
117 u32 tim_ch;
118 u32 tim_cl;
119 u32 gpio_dout;
120 u32 gpio_din;
121 u32 gpio_dir;
122 u32 watchdog;
123 u32 front_panel;
124
125 u32 register_maps;
126}; 64};
65#undef REGISTER_MAP_ELEMENT
66
67/**
68 * register_map_offset_phys - add an offset to the physical address
69 * @map: Pointer to the &struct register_map
70 * @offset: Value to add
71 *
72 * Only adds the base to non-zero physical addresses
73 */
74static inline void register_map_offset_phys(struct register_map *map,
75 unsigned long offset)
76{
77#define REGISTER_MAP_ELEMENT(x) do { \
78 if (map->x.phys != 0) \
79 map->x.phys += offset; \
80 } while (false);
81
82#include <asm/mach-powertv/asic_reg_map.h>
83#undef REGISTER_MAP_ELEMENT
84}
85
86/**
87 * register_map_virtualize - Convert &register_map to virtual addresses
88 * @map: Pointer to &register_map to virtualize
89 */
90static inline void register_map_virtualize(struct register_map *map)
91{
92#define REGISTER_MAP_ELEMENT(x) do { \
93 map->x.virt = (!map->x.phys) ? NULL : \
94 UNCAC_ADDR(phys_to_virt(map->x.phys)); \
95 } while (false);
96
97#include <asm/mach-powertv/asic_reg_map.h>
98#undef REGISTER_MAP_ELEMENT
99}
127 100
128extern enum asic_type asic; 101extern struct register_map _asic_register_map;
129extern const struct register_map *register_map;
130extern unsigned long asic_phy_base; /* Physical address of ASIC */
131extern unsigned long asic_base; /* Virtual address of ASIC */
132 102
133/* 103/*
134 * Macros to interface to registers through their ioremapped address 104 * Macros to interface to registers through their ioremapped address
135 * asic_reg_offset Returns the offset of a given register from the start
136 * of the ASIC address space
137 * asic_reg_phys_addr Returns the physical address of the given register 105 * asic_reg_phys_addr Returns the physical address of the given register
138 * asic_reg_addr Returns the iomapped virtual address of the given 106 * asic_reg_addr Returns the iomapped virtual address of the given
139 * register. 107 * register.
140 */ 108 */
141#define asic_reg_offset(x) (register_map->x) 109#define asic_reg_addr(x) (_asic_register_map.x.virt)
142#define asic_reg_phys_addr(x) (asic_phy_base + asic_reg_offset(x)) 110#define asic_reg_phys_addr(x) (virt_to_phys((void *) CAC_ADDR( \
143#define asic_reg_addr(x) \ 111 (unsigned long) asic_reg_addr(x))))
144 ((unsigned int *) (asic_base + asic_reg_offset(x)))
145 112
146/* 113/*
147 * The asic_reg macro is gone. It should be replaced by either asic_read or 114 * The asic_reg macro is gone. It should be replaced by either asic_read or
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index a581d60cbcc2..f4ab3139d737 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -406,6 +406,16 @@
406#define ST0_XX 0x80000000 /* MIPS IV naming */ 406#define ST0_XX 0x80000000 /* MIPS IV naming */
407 407
408/* 408/*
409 * Bitfields and bit numbers in the coprocessor 0 IntCtl register. (MIPSR2)
410 *
411 * Refer to your MIPS R4xx0 manual, chapter 5 for explanation.
412 */
413#define INTCTLB_IPPCI 26
414#define INTCTLF_IPPCI (_ULCAST_(7) << INTCTLB_IPPCI)
415#define INTCTLB_IPTI 29
416#define INTCTLF_IPTI (_ULCAST_(7) << INTCTLB_IPTI)
417
418/*
409 * Bitfields and bit numbers in the coprocessor 0 cause register. 419 * Bitfields and bit numbers in the coprocessor 0 cause register.
410 * 420 *
411 * Refer to your MIPS R4xx0 manual, chapter 5 for explanation. 421 * Refer to your MIPS R4xx0 manual, chapter 5 for explanation.
@@ -434,6 +444,8 @@
434#define CAUSEF_IV (_ULCAST_(1) << 23) 444#define CAUSEF_IV (_ULCAST_(1) << 23)
435#define CAUSEB_CE 28 445#define CAUSEB_CE 28
436#define CAUSEF_CE (_ULCAST_(3) << 28) 446#define CAUSEF_CE (_ULCAST_(3) << 28)
447#define CAUSEB_TI 30
448#define CAUSEF_TI (_ULCAST_(1) << 30)
437#define CAUSEB_BD 31 449#define CAUSEB_BD 31
438#define CAUSEF_BD (_ULCAST_(1) << 31) 450#define CAUSEF_BD (_ULCAST_(1) << 31)
439 451
diff --git a/arch/mips/include/asm/pgtable-64.h b/arch/mips/include/asm/pgtable-64.h
index 9cd508993956..8eda30b467da 100644
--- a/arch/mips/include/asm/pgtable-64.h
+++ b/arch/mips/include/asm/pgtable-64.h
@@ -110,7 +110,9 @@
110#define VMALLOC_START MAP_BASE 110#define VMALLOC_START MAP_BASE
111#define VMALLOC_END \ 111#define VMALLOC_END \
112 (VMALLOC_START + \ 112 (VMALLOC_START + \
113 PTRS_PER_PGD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE - (1UL << 32)) 113 min(PTRS_PER_PGD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE, \
114 (1UL << cpu_vmbits)) - (1UL << 32))
115
114#if defined(CONFIG_MODULES) && defined(KBUILD_64BIT_SYM32) && \ 116#if defined(CONFIG_MODULES) && defined(KBUILD_64BIT_SYM32) && \
115 VMALLOC_START != CKSSEG 117 VMALLOC_START != CKSSEG
116/* Load modules into 32bit-compatible segment. */ 118/* Load modules into 32bit-compatible segment. */
diff --git a/arch/mips/kernel/cevt-r4k.c b/arch/mips/kernel/cevt-r4k.c
index b469ad05d520..0b2450ceb13f 100644
--- a/arch/mips/kernel/cevt-r4k.c
+++ b/arch/mips/kernel/cevt-r4k.c
@@ -97,7 +97,7 @@ void mips_event_handler(struct clock_event_device *dev)
97 */ 97 */
98static int c0_compare_int_pending(void) 98static int c0_compare_int_pending(void)
99{ 99{
100 return (read_c0_cause() >> cp0_compare_irq) & 0x100; 100 return (read_c0_cause() >> cp0_compare_irq_shift) & (1ul << CAUSEB_IP);
101} 101}
102 102
103/* 103/*
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 80e202eca056..758ad426c57f 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -284,6 +284,15 @@ static inline int __cpu_has_fpu(void)
284 return ((cpu_get_fpu_id() & 0xff00) != FPIR_IMP_NONE); 284 return ((cpu_get_fpu_id() & 0xff00) != FPIR_IMP_NONE);
285} 285}
286 286
287static inline void cpu_probe_vmbits(struct cpuinfo_mips *c)
288{
289#ifdef __NEED_VMBITS_PROBE
290 write_c0_entryhi(0x3fffffffffffe000ULL);
291 back_to_back_c0_hazard();
292 c->vmbits = fls64(read_c0_entryhi() & 0x3fffffffffffe000ULL);
293#endif
294}
295
287#define R4K_OPTS (MIPS_CPU_TLB | MIPS_CPU_4KEX | MIPS_CPU_4K_CACHE \ 296#define R4K_OPTS (MIPS_CPU_TLB | MIPS_CPU_4KEX | MIPS_CPU_4K_CACHE \
288 | MIPS_CPU_COUNTER) 297 | MIPS_CPU_COUNTER)
289 298
@@ -969,6 +978,8 @@ __cpuinit void cpu_probe(void)
969 c->srsets = ((read_c0_srsctl() >> 26) & 0x0f) + 1; 978 c->srsets = ((read_c0_srsctl() >> 26) & 0x0f) + 1;
970 else 979 else
971 c->srsets = 1; 980 c->srsets = 1;
981
982 cpu_probe_vmbits(c);
972} 983}
973 984
974__cpuinit void cpu_report(void) 985__cpuinit void cpu_report(void)
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 308e43460864..31b204b26ba0 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1403,6 +1403,7 @@ extern void flush_tlb_handlers(void);
1403 * Timer interrupt 1403 * Timer interrupt
1404 */ 1404 */
1405int cp0_compare_irq; 1405int cp0_compare_irq;
1406int cp0_compare_irq_shift;
1406 1407
1407/* 1408/*
1408 * Performance counter IRQ or -1 if shared with timer 1409 * Performance counter IRQ or -1 if shared with timer
@@ -1493,12 +1494,14 @@ void __cpuinit per_cpu_trap_init(void)
1493 * o read IntCtl.IPPCI to determine the performance counter interrupt 1494 * o read IntCtl.IPPCI to determine the performance counter interrupt
1494 */ 1495 */
1495 if (cpu_has_mips_r2) { 1496 if (cpu_has_mips_r2) {
1496 cp0_compare_irq = (read_c0_intctl() >> 29) & 7; 1497 cp0_compare_irq_shift = CAUSEB_TI - CAUSEB_IP;
1497 cp0_perfcount_irq = (read_c0_intctl() >> 26) & 7; 1498 cp0_compare_irq = (read_c0_intctl() >> INTCTLB_IPTI) & 7;
1499 cp0_perfcount_irq = (read_c0_intctl() >> INTCTLB_IPPCI) & 7;
1498 if (cp0_perfcount_irq == cp0_compare_irq) 1500 if (cp0_perfcount_irq == cp0_compare_irq)
1499 cp0_perfcount_irq = -1; 1501 cp0_perfcount_irq = -1;
1500 } else { 1502 } else {
1501 cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ; 1503 cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ;
1504 cp0_compare_irq_shift = cp0_compare_irq;
1502 cp0_perfcount_irq = -1; 1505 cp0_perfcount_irq = -1;
1503 } 1506 }
1504 1507
diff --git a/arch/mips/mipssim/sim_setup.c b/arch/mips/mipssim/sim_setup.c
index 0824f6af4777..55f22a3afe61 100644
--- a/arch/mips/mipssim/sim_setup.c
+++ b/arch/mips/mipssim/sim_setup.c
@@ -49,9 +49,6 @@ void __init plat_mem_setup(void)
49 set_io_port_base(0xbfd00000); 49 set_io_port_base(0xbfd00000);
50 50
51 serial_init(); 51 serial_init();
52
53 pr_info("Linux started...\n");
54
55} 52}
56 53
57extern struct plat_smp_ops ssmtc_smp_ops; 54extern struct plat_smp_ops ssmtc_smp_ops;
@@ -60,7 +57,6 @@ void __init prom_init(void)
60{ 57{
61 set_io_port_base(0xbfd00000); 58 set_io_port_base(0xbfd00000);
62 59
63 pr_info("\nLINUX started...\n");
64 prom_meminit(); 60 prom_meminit();
65 61
66#ifdef CONFIG_MIPS_MT_SMP 62#ifdef CONFIG_MIPS_MT_SMP
diff --git a/arch/mips/mm/c-octeon.c b/arch/mips/mm/c-octeon.c
index 94e05e5733c1..e06f1af760a7 100644
--- a/arch/mips/mm/c-octeon.c
+++ b/arch/mips/mm/c-octeon.c
@@ -174,7 +174,7 @@ static void octeon_flush_cache_page(struct vm_area_struct *vma,
174 * Probe Octeon's caches 174 * Probe Octeon's caches
175 * 175 *
176 */ 176 */
177static void __devinit probe_octeon(void) 177static void __cpuinit probe_octeon(void)
178{ 178{
179 unsigned long icache_size; 179 unsigned long icache_size;
180 unsigned long dcache_size; 180 unsigned long dcache_size;
@@ -235,7 +235,7 @@ static void __devinit probe_octeon(void)
235 * Setup the Octeon cache flush routines 235 * Setup the Octeon cache flush routines
236 * 236 *
237 */ 237 */
238void __devinit octeon_cache_init(void) 238void __cpuinit octeon_cache_init(void)
239{ 239{
240 extern unsigned long ebase; 240 extern unsigned long ebase;
241 extern char except_vec2_octeon; 241 extern char except_vec2_octeon;
diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c
index 102b2dfa542a..e716cafc346d 100644
--- a/arch/mips/mm/cache.c
+++ b/arch/mips/mm/cache.c
@@ -155,7 +155,7 @@ static inline void setup_protection_map(void)
155 protection_map[15] = PAGE_SHARED; 155 protection_map[15] = PAGE_SHARED;
156} 156}
157 157
158void __devinit cpu_cache_init(void) 158void __cpuinit cpu_cache_init(void)
159{ 159{
160 if (cpu_has_3k_cache) { 160 if (cpu_has_3k_cache) {
161 extern void __weak r3k_cache_init(void); 161 extern void __weak r3k_cache_init(void);
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
index 9e8d00389eef..1651942f7feb 100644
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -424,7 +424,7 @@ void __init mem_init(void)
424 reservedpages << (PAGE_SHIFT-10), 424 reservedpages << (PAGE_SHIFT-10),
425 datasize >> 10, 425 datasize >> 10,
426 initsize >> 10, 426 initsize >> 10,
427 (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10))); 427 totalhigh_pages << (PAGE_SHIFT-10));
428} 428}
429#endif /* !CONFIG_NEED_MULTIPLE_NODES */ 429#endif /* !CONFIG_NEED_MULTIPLE_NODES */
430 430
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 3d0baa4a842d..badcf5e8d695 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -73,9 +73,6 @@ static int __cpuinit m4kc_tlbp_war(void)
73enum label_id { 73enum label_id {
74 label_second_part = 1, 74 label_second_part = 1,
75 label_leave, 75 label_leave,
76#ifdef MODULE_START
77 label_module_alloc,
78#endif
79 label_vmalloc, 76 label_vmalloc,
80 label_vmalloc_done, 77 label_vmalloc_done,
81 label_tlbw_hazard, 78 label_tlbw_hazard,
@@ -92,9 +89,6 @@ enum label_id {
92 89
93UASM_L_LA(_second_part) 90UASM_L_LA(_second_part)
94UASM_L_LA(_leave) 91UASM_L_LA(_leave)
95#ifdef MODULE_START
96UASM_L_LA(_module_alloc)
97#endif
98UASM_L_LA(_vmalloc) 92UASM_L_LA(_vmalloc)
99UASM_L_LA(_vmalloc_done) 93UASM_L_LA(_vmalloc_done)
100UASM_L_LA(_tlbw_hazard) 94UASM_L_LA(_tlbw_hazard)
@@ -818,8 +812,6 @@ static void __cpuinit build_r4000_tlb_refill_handler(void)
818 } else { 812 } else {
819#if defined(CONFIG_HUGETLB_PAGE) 813#if defined(CONFIG_HUGETLB_PAGE)
820 const enum label_id ls = label_tlb_huge_update; 814 const enum label_id ls = label_tlb_huge_update;
821#elif defined(MODULE_START)
822 const enum label_id ls = label_module_alloc;
823#else 815#else
824 const enum label_id ls = label_vmalloc; 816 const enum label_id ls = label_vmalloc;
825#endif 817#endif
diff --git a/arch/mips/mti-malta/malta-init.c b/arch/mips/mti-malta/malta-init.c
index f1b14c8a4a1c..414f0c99b196 100644
--- a/arch/mips/mti-malta/malta-init.c
+++ b/arch/mips/mti-malta/malta-init.c
@@ -355,7 +355,6 @@ void __init prom_init(void)
355 board_nmi_handler_setup = mips_nmi_setup; 355 board_nmi_handler_setup = mips_nmi_setup;
356 board_ejtag_handler_setup = mips_ejtag_setup; 356 board_ejtag_handler_setup = mips_ejtag_setup;
357 357
358 pr_info("\nLINUX started...\n");
359 prom_init_cmdline(); 358 prom_init_cmdline();
360 prom_meminit(); 359 prom_meminit();
361#ifdef CONFIG_SERIAL_8250_CONSOLE 360#ifdef CONFIG_SERIAL_8250_CONSOLE
diff --git a/arch/mips/powertv/Makefile b/arch/mips/powertv/Makefile
index 2c516718affe..0a0d73c0564f 100644
--- a/arch/mips/powertv/Makefile
+++ b/arch/mips/powertv/Makefile
@@ -23,6 +23,6 @@
23# under Linux. 23# under Linux.
24# 24#
25 25
26obj-y += cmdline.o init.o memory.o reset.o time.o powertv_setup.o asic/ pci/ 26obj-y += init.o memory.o reset.o time.o powertv_setup.o asic/ pci/
27 27
28EXTRA_CFLAGS += -Wall -Werror 28EXTRA_CFLAGS += -Wall -Werror
diff --git a/arch/mips/powertv/asic/asic-calliope.c b/arch/mips/powertv/asic/asic-calliope.c
index 03d3884c6270..1ae6623444b2 100644
--- a/arch/mips/powertv/asic/asic-calliope.c
+++ b/arch/mips/powertv/asic/asic-calliope.c
@@ -23,76 +23,79 @@
23 * Description: Defines the platform resources for the SA settop. 23 * Description: Defines the platform resources for the SA settop.
24 */ 24 */
25 25
26#include <linux/init.h>
26#include <asm/mach-powertv/asic.h> 27#include <asm/mach-powertv/asic.h>
27 28
28const struct register_map calliope_register_map = { 29#define CALLIOPE_ADDR(x) (CALLIOPE_IO_BASE + (x))
29 .eic_slow0_strt_add = 0x800000,
30 .eic_cfg_bits = 0x800038,
31 .eic_ready_status = 0x80004c,
32 30
33 .chipver3 = 0xA00800, 31const struct register_map calliope_register_map __initdata = {
34 .chipver2 = 0xA00804, 32 .eic_slow0_strt_add = {.phys = CALLIOPE_ADDR(0x800000)},
35 .chipver1 = 0xA00808, 33 .eic_cfg_bits = {.phys = CALLIOPE_ADDR(0x800038)},
36 .chipver0 = 0xA0080c, 34 .eic_ready_status = {.phys = CALLIOPE_ADDR(0x80004c)},
35
36 .chipver3 = {.phys = CALLIOPE_ADDR(0xA00800)},
37 .chipver2 = {.phys = CALLIOPE_ADDR(0xA00804)},
38 .chipver1 = {.phys = CALLIOPE_ADDR(0xA00808)},
39 .chipver0 = {.phys = CALLIOPE_ADDR(0xA0080c)},
37 40
38 /* The registers of IRBlaster */ 41 /* The registers of IRBlaster */
39 .uart1_intstat = 0xA01800, 42 .uart1_intstat = {.phys = CALLIOPE_ADDR(0xA01800)},
40 .uart1_inten = 0xA01804, 43 .uart1_inten = {.phys = CALLIOPE_ADDR(0xA01804)},
41 .uart1_config1 = 0xA01808, 44 .uart1_config1 = {.phys = CALLIOPE_ADDR(0xA01808)},
42 .uart1_config2 = 0xA0180C, 45 .uart1_config2 = {.phys = CALLIOPE_ADDR(0xA0180C)},
43 .uart1_divisorhi = 0xA01810, 46 .uart1_divisorhi = {.phys = CALLIOPE_ADDR(0xA01810)},
44 .uart1_divisorlo = 0xA01814, 47 .uart1_divisorlo = {.phys = CALLIOPE_ADDR(0xA01814)},
45 .uart1_data = 0xA01818, 48 .uart1_data = {.phys = CALLIOPE_ADDR(0xA01818)},
46 .uart1_status = 0xA0181C, 49 .uart1_status = {.phys = CALLIOPE_ADDR(0xA0181C)},
47 50
48 .int_stat_3 = 0xA02800, 51 .int_stat_3 = {.phys = CALLIOPE_ADDR(0xA02800)},
49 .int_stat_2 = 0xA02804, 52 .int_stat_2 = {.phys = CALLIOPE_ADDR(0xA02804)},
50 .int_stat_1 = 0xA02808, 53 .int_stat_1 = {.phys = CALLIOPE_ADDR(0xA02808)},
51 .int_stat_0 = 0xA0280c, 54 .int_stat_0 = {.phys = CALLIOPE_ADDR(0xA0280c)},
52 .int_config = 0xA02810, 55 .int_config = {.phys = CALLIOPE_ADDR(0xA02810)},
53 .int_int_scan = 0xA02818, 56 .int_int_scan = {.phys = CALLIOPE_ADDR(0xA02818)},
54 .ien_int_3 = 0xA02830, 57 .ien_int_3 = {.phys = CALLIOPE_ADDR(0xA02830)},
55 .ien_int_2 = 0xA02834, 58 .ien_int_2 = {.phys = CALLIOPE_ADDR(0xA02834)},
56 .ien_int_1 = 0xA02838, 59 .ien_int_1 = {.phys = CALLIOPE_ADDR(0xA02838)},
57 .ien_int_0 = 0xA0283c, 60 .ien_int_0 = {.phys = CALLIOPE_ADDR(0xA0283c)},
58 .int_level_3_3 = 0xA02880, 61 .int_level_3_3 = {.phys = CALLIOPE_ADDR(0xA02880)},
59 .int_level_3_2 = 0xA02884, 62 .int_level_3_2 = {.phys = CALLIOPE_ADDR(0xA02884)},
60 .int_level_3_1 = 0xA02888, 63 .int_level_3_1 = {.phys = CALLIOPE_ADDR(0xA02888)},
61 .int_level_3_0 = 0xA0288c, 64 .int_level_3_0 = {.phys = CALLIOPE_ADDR(0xA0288c)},
62 .int_level_2_3 = 0xA02890, 65 .int_level_2_3 = {.phys = CALLIOPE_ADDR(0xA02890)},
63 .int_level_2_2 = 0xA02894, 66 .int_level_2_2 = {.phys = CALLIOPE_ADDR(0xA02894)},
64 .int_level_2_1 = 0xA02898, 67 .int_level_2_1 = {.phys = CALLIOPE_ADDR(0xA02898)},
65 .int_level_2_0 = 0xA0289c, 68 .int_level_2_0 = {.phys = CALLIOPE_ADDR(0xA0289c)},
66 .int_level_1_3 = 0xA028a0, 69 .int_level_1_3 = {.phys = CALLIOPE_ADDR(0xA028a0)},
67 .int_level_1_2 = 0xA028a4, 70 .int_level_1_2 = {.phys = CALLIOPE_ADDR(0xA028a4)},
68 .int_level_1_1 = 0xA028a8, 71 .int_level_1_1 = {.phys = CALLIOPE_ADDR(0xA028a8)},
69 .int_level_1_0 = 0xA028ac, 72 .int_level_1_0 = {.phys = CALLIOPE_ADDR(0xA028ac)},
70 .int_level_0_3 = 0xA028b0, 73 .int_level_0_3 = {.phys = CALLIOPE_ADDR(0xA028b0)},
71 .int_level_0_2 = 0xA028b4, 74 .int_level_0_2 = {.phys = CALLIOPE_ADDR(0xA028b4)},
72 .int_level_0_1 = 0xA028b8, 75 .int_level_0_1 = {.phys = CALLIOPE_ADDR(0xA028b8)},
73 .int_level_0_0 = 0xA028bc, 76 .int_level_0_0 = {.phys = CALLIOPE_ADDR(0xA028bc)},
74 .int_docsis_en = 0xA028F4, 77 .int_docsis_en = {.phys = CALLIOPE_ADDR(0xA028F4)},
75 78
76 .mips_pll_setup = 0x980000, 79 .mips_pll_setup = {.phys = CALLIOPE_ADDR(0x980000)},
77 .usb_fs = 0x980030, /* -default 72800028- */ 80 .usb_fs = {.phys = CALLIOPE_ADDR(0x980030)},
78 .test_bus = 0x9800CC, 81 .test_bus = {.phys = CALLIOPE_ADDR(0x9800CC)},
79 .crt_spare = 0x9800d4, 82 .crt_spare = {.phys = CALLIOPE_ADDR(0x9800d4)},
80 .usb2_ohci_int_mask = 0x9A000c, 83 .usb2_ohci_int_mask = {.phys = CALLIOPE_ADDR(0x9A000c)},
81 .usb2_strap = 0x9A0014, 84 .usb2_strap = {.phys = CALLIOPE_ADDR(0x9A0014)},
82 .ehci_hcapbase = 0x9BFE00, 85 .ehci_hcapbase = {.phys = CALLIOPE_ADDR(0x9BFE00)},
83 .ohci_hc_revision = 0x9BFC00, 86 .ohci_hc_revision = {.phys = CALLIOPE_ADDR(0x9BFC00)},
84 .bcm1_bs_lmi_steer = 0x9E0004, 87 .bcm1_bs_lmi_steer = {.phys = CALLIOPE_ADDR(0x9E0004)},
85 .usb2_control = 0x9E0054, 88 .usb2_control = {.phys = CALLIOPE_ADDR(0x9E0054)},
86 .usb2_stbus_obc = 0x9BFF00, 89 .usb2_stbus_obc = {.phys = CALLIOPE_ADDR(0x9BFF00)},
87 .usb2_stbus_mess_size = 0x9BFF04, 90 .usb2_stbus_mess_size = {.phys = CALLIOPE_ADDR(0x9BFF04)},
88 .usb2_stbus_chunk_size = 0x9BFF08, 91 .usb2_stbus_chunk_size = {.phys = CALLIOPE_ADDR(0x9BFF08)},
89 92
90 .pcie_regs = 0x000000, /* -doesn't exist- */ 93 .pcie_regs = {.phys = 0x000000}, /* -doesn't exist- */
91 .tim_ch = 0xA02C10, 94 .tim_ch = {.phys = CALLIOPE_ADDR(0xA02C10)},
92 .tim_cl = 0xA02C14, 95 .tim_cl = {.phys = CALLIOPE_ADDR(0xA02C14)},
93 .gpio_dout = 0xA02c20, 96 .gpio_dout = {.phys = CALLIOPE_ADDR(0xA02c20)},
94 .gpio_din = 0xA02c24, 97 .gpio_din = {.phys = CALLIOPE_ADDR(0xA02c24)},
95 .gpio_dir = 0xA02c2C, 98 .gpio_dir = {.phys = CALLIOPE_ADDR(0xA02c2C)},
96 .watchdog = 0xA02c30, 99 .watchdog = {.phys = CALLIOPE_ADDR(0xA02c30)},
97 .front_panel = 0x000000, /* -not used- */ 100 .front_panel = {.phys = 0x000000}, /* -not used- */
98}; 101};
diff --git a/arch/mips/powertv/asic/asic-cronus.c b/arch/mips/powertv/asic/asic-cronus.c
index 5f4589c9f83d..5bb64bfb508b 100644
--- a/arch/mips/powertv/asic/asic-cronus.c
+++ b/arch/mips/powertv/asic/asic-cronus.c
@@ -23,76 +23,79 @@
23 * Description: Defines the platform resources for the SA settop. 23 * Description: Defines the platform resources for the SA settop.
24 */ 24 */
25 25
26#include <linux/init.h>
26#include <asm/mach-powertv/asic.h> 27#include <asm/mach-powertv/asic.h>
27 28
28const struct register_map cronus_register_map = { 29#define CRONUS_ADDR(x) (CRONUS_IO_BASE + (x))
29 .eic_slow0_strt_add = 0x000000,
30 .eic_cfg_bits = 0x000038,
31 .eic_ready_status = 0x00004C,
32 30
33 .chipver3 = 0x2A0800, 31const struct register_map cronus_register_map __initdata = {
34 .chipver2 = 0x2A0804, 32 .eic_slow0_strt_add = {.phys = CRONUS_ADDR(0x000000)},
35 .chipver1 = 0x2A0808, 33 .eic_cfg_bits = {.phys = CRONUS_ADDR(0x000038)},
36 .chipver0 = 0x2A080C, 34 .eic_ready_status = {.phys = CRONUS_ADDR(0x00004C)},
35
36 .chipver3 = {.phys = CRONUS_ADDR(0x2A0800)},
37 .chipver2 = {.phys = CRONUS_ADDR(0x2A0804)},
38 .chipver1 = {.phys = CRONUS_ADDR(0x2A0808)},
39 .chipver0 = {.phys = CRONUS_ADDR(0x2A080C)},
37 40
38 /* The registers of IRBlaster */ 41 /* The registers of IRBlaster */
39 .uart1_intstat = 0x2A1800, 42 .uart1_intstat = {.phys = CRONUS_ADDR(0x2A1800)},
40 .uart1_inten = 0x2A1804, 43 .uart1_inten = {.phys = CRONUS_ADDR(0x2A1804)},
41 .uart1_config1 = 0x2A1808, 44 .uart1_config1 = {.phys = CRONUS_ADDR(0x2A1808)},
42 .uart1_config2 = 0x2A180C, 45 .uart1_config2 = {.phys = CRONUS_ADDR(0x2A180C)},
43 .uart1_divisorhi = 0x2A1810, 46 .uart1_divisorhi = {.phys = CRONUS_ADDR(0x2A1810)},
44 .uart1_divisorlo = 0x2A1814, 47 .uart1_divisorlo = {.phys = CRONUS_ADDR(0x2A1814)},
45 .uart1_data = 0x2A1818, 48 .uart1_data = {.phys = CRONUS_ADDR(0x2A1818)},
46 .uart1_status = 0x2A181C, 49 .uart1_status = {.phys = CRONUS_ADDR(0x2A181C)},
47 50
48 .int_stat_3 = 0x2A2800, 51 .int_stat_3 = {.phys = CRONUS_ADDR(0x2A2800)},
49 .int_stat_2 = 0x2A2804, 52 .int_stat_2 = {.phys = CRONUS_ADDR(0x2A2804)},
50 .int_stat_1 = 0x2A2808, 53 .int_stat_1 = {.phys = CRONUS_ADDR(0x2A2808)},
51 .int_stat_0 = 0x2A280C, 54 .int_stat_0 = {.phys = CRONUS_ADDR(0x2A280C)},
52 .int_config = 0x2A2810, 55 .int_config = {.phys = CRONUS_ADDR(0x2A2810)},
53 .int_int_scan = 0x2A2818, 56 .int_int_scan = {.phys = CRONUS_ADDR(0x2A2818)},
54 .ien_int_3 = 0x2A2830, 57 .ien_int_3 = {.phys = CRONUS_ADDR(0x2A2830)},
55 .ien_int_2 = 0x2A2834, 58 .ien_int_2 = {.phys = CRONUS_ADDR(0x2A2834)},
56 .ien_int_1 = 0x2A2838, 59 .ien_int_1 = {.phys = CRONUS_ADDR(0x2A2838)},
57 .ien_int_0 = 0x2A283C, 60 .ien_int_0 = {.phys = CRONUS_ADDR(0x2A283C)},
58 .int_level_3_3 = 0x2A2880, 61 .int_level_3_3 = {.phys = CRONUS_ADDR(0x2A2880)},
59 .int_level_3_2 = 0x2A2884, 62 .int_level_3_2 = {.phys = CRONUS_ADDR(0x2A2884)},
60 .int_level_3_1 = 0x2A2888, 63 .int_level_3_1 = {.phys = CRONUS_ADDR(0x2A2888)},
61 .int_level_3_0 = 0x2A288C, 64 .int_level_3_0 = {.phys = CRONUS_ADDR(0x2A288C)},
62 .int_level_2_3 = 0x2A2890, 65 .int_level_2_3 = {.phys = CRONUS_ADDR(0x2A2890)},
63 .int_level_2_2 = 0x2A2894, 66 .int_level_2_2 = {.phys = CRONUS_ADDR(0x2A2894)},
64 .int_level_2_1 = 0x2A2898, 67 .int_level_2_1 = {.phys = CRONUS_ADDR(0x2A2898)},
65 .int_level_2_0 = 0x2A289C, 68 .int_level_2_0 = {.phys = CRONUS_ADDR(0x2A289C)},
66 .int_level_1_3 = 0x2A28A0, 69 .int_level_1_3 = {.phys = CRONUS_ADDR(0x2A28A0)},
67 .int_level_1_2 = 0x2A28A4, 70 .int_level_1_2 = {.phys = CRONUS_ADDR(0x2A28A4)},
68 .int_level_1_1 = 0x2A28A8, 71 .int_level_1_1 = {.phys = CRONUS_ADDR(0x2A28A8)},
69 .int_level_1_0 = 0x2A28AC, 72 .int_level_1_0 = {.phys = CRONUS_ADDR(0x2A28AC)},
70 .int_level_0_3 = 0x2A28B0, 73 .int_level_0_3 = {.phys = CRONUS_ADDR(0x2A28B0)},
71 .int_level_0_2 = 0x2A28B4, 74 .int_level_0_2 = {.phys = CRONUS_ADDR(0x2A28B4)},
72 .int_level_0_1 = 0x2A28B8, 75 .int_level_0_1 = {.phys = CRONUS_ADDR(0x2A28B8)},
73 .int_level_0_0 = 0x2A28BC, 76 .int_level_0_0 = {.phys = CRONUS_ADDR(0x2A28BC)},
74 .int_docsis_en = 0x2A28F4, 77 .int_docsis_en = {.phys = CRONUS_ADDR(0x2A28F4)},
75 78
76 .mips_pll_setup = 0x1C0000, 79 .mips_pll_setup = {.phys = CRONUS_ADDR(0x1C0000)},
77 .usb_fs = 0x1C0018, 80 .usb_fs = {.phys = CRONUS_ADDR(0x1C0018)},
78 .test_bus = 0x1C00CC, 81 .test_bus = {.phys = CRONUS_ADDR(0x1C00CC)},
79 .crt_spare = 0x1c00d4, 82 .crt_spare = {.phys = CRONUS_ADDR(0x1c00d4)},
80 .usb2_ohci_int_mask = 0x20000C, 83 .usb2_ohci_int_mask = {.phys = CRONUS_ADDR(0x20000C)},
81 .usb2_strap = 0x200014, 84 .usb2_strap = {.phys = CRONUS_ADDR(0x200014)},
82 .ehci_hcapbase = 0x21FE00, 85 .ehci_hcapbase = {.phys = CRONUS_ADDR(0x21FE00)},
83 .ohci_hc_revision = 0x1E0000, 86 .ohci_hc_revision = {.phys = CRONUS_ADDR(0x1E0000)},
84 .bcm1_bs_lmi_steer = 0x2E0008, 87 .bcm1_bs_lmi_steer = {.phys = CRONUS_ADDR(0x2E0008)},
85 .usb2_control = 0x2E004C, 88 .usb2_control = {.phys = CRONUS_ADDR(0x2E004C)},
86 .usb2_stbus_obc = 0x21FF00, 89 .usb2_stbus_obc = {.phys = CRONUS_ADDR(0x21FF00)},
87 .usb2_stbus_mess_size = 0x21FF04, 90 .usb2_stbus_mess_size = {.phys = CRONUS_ADDR(0x21FF04)},
88 .usb2_stbus_chunk_size = 0x21FF08, 91 .usb2_stbus_chunk_size = {.phys = CRONUS_ADDR(0x21FF08)},
89 92
90 .pcie_regs = 0x220000, 93 .pcie_regs = {.phys = CRONUS_ADDR(0x220000)},
91 .tim_ch = 0x2A2C10, 94 .tim_ch = {.phys = CRONUS_ADDR(0x2A2C10)},
92 .tim_cl = 0x2A2C14, 95 .tim_cl = {.phys = CRONUS_ADDR(0x2A2C14)},
93 .gpio_dout = 0x2A2C20, 96 .gpio_dout = {.phys = CRONUS_ADDR(0x2A2C20)},
94 .gpio_din = 0x2A2C24, 97 .gpio_din = {.phys = CRONUS_ADDR(0x2A2C24)},
95 .gpio_dir = 0x2A2C2C, 98 .gpio_dir = {.phys = CRONUS_ADDR(0x2A2C2C)},
96 .watchdog = 0x2A2C30, 99 .watchdog = {.phys = CRONUS_ADDR(0x2A2C30)},
97 .front_panel = 0x2A3800, 100 .front_panel = {.phys = CRONUS_ADDR(0x2A3800)},
98}; 101};
diff --git a/arch/mips/powertv/asic/asic-zeus.c b/arch/mips/powertv/asic/asic-zeus.c
index 1469daab920e..095cbe10ebb9 100644
--- a/arch/mips/powertv/asic/asic-zeus.c
+++ b/arch/mips/powertv/asic/asic-zeus.c
@@ -23,76 +23,79 @@
23 * Description: Defines the platform resources for the SA settop. 23 * Description: Defines the platform resources for the SA settop.
24 */ 24 */
25 25
26#include <linux/init.h>
26#include <asm/mach-powertv/asic.h> 27#include <asm/mach-powertv/asic.h>
27 28
28const struct register_map zeus_register_map = { 29#define ZEUS_ADDR(x) (ZEUS_IO_BASE + (x))
29 .eic_slow0_strt_add = 0x000000,
30 .eic_cfg_bits = 0x000038,
31 .eic_ready_status = 0x00004c,
32 30
33 .chipver3 = 0x280800, 31const struct register_map zeus_register_map __initdata = {
34 .chipver2 = 0x280804, 32 .eic_slow0_strt_add = {.phys = ZEUS_ADDR(0x000000)},
35 .chipver1 = 0x280808, 33 .eic_cfg_bits = {.phys = ZEUS_ADDR(0x000038)},
36 .chipver0 = 0x28080c, 34 .eic_ready_status = {.phys = ZEUS_ADDR(0x00004c)},
35
36 .chipver3 = {.phys = ZEUS_ADDR(0x280800)},
37 .chipver2 = {.phys = ZEUS_ADDR(0x280804)},
38 .chipver1 = {.phys = ZEUS_ADDR(0x280808)},
39 .chipver0 = {.phys = ZEUS_ADDR(0x28080c)},
37 40
38 /* The registers of IRBlaster */ 41 /* The registers of IRBlaster */
39 .uart1_intstat = 0x281800, 42 .uart1_intstat = {.phys = ZEUS_ADDR(0x281800)},
40 .uart1_inten = 0x281804, 43 .uart1_inten = {.phys = ZEUS_ADDR(0x281804)},
41 .uart1_config1 = 0x281808, 44 .uart1_config1 = {.phys = ZEUS_ADDR(0x281808)},
42 .uart1_config2 = 0x28180C, 45 .uart1_config2 = {.phys = ZEUS_ADDR(0x28180C)},
43 .uart1_divisorhi = 0x281810, 46 .uart1_divisorhi = {.phys = ZEUS_ADDR(0x281810)},
44 .uart1_divisorlo = 0x281814, 47 .uart1_divisorlo = {.phys = ZEUS_ADDR(0x281814)},
45 .uart1_data = 0x281818, 48 .uart1_data = {.phys = ZEUS_ADDR(0x281818)},
46 .uart1_status = 0x28181C, 49 .uart1_status = {.phys = ZEUS_ADDR(0x28181C)},
47 50
48 .int_stat_3 = 0x282800, 51 .int_stat_3 = {.phys = ZEUS_ADDR(0x282800)},
49 .int_stat_2 = 0x282804, 52 .int_stat_2 = {.phys = ZEUS_ADDR(0x282804)},
50 .int_stat_1 = 0x282808, 53 .int_stat_1 = {.phys = ZEUS_ADDR(0x282808)},
51 .int_stat_0 = 0x28280c, 54 .int_stat_0 = {.phys = ZEUS_ADDR(0x28280c)},
52 .int_config = 0x282810, 55 .int_config = {.phys = ZEUS_ADDR(0x282810)},
53 .int_int_scan = 0x282818, 56 .int_int_scan = {.phys = ZEUS_ADDR(0x282818)},
54 .ien_int_3 = 0x282830, 57 .ien_int_3 = {.phys = ZEUS_ADDR(0x282830)},
55 .ien_int_2 = 0x282834, 58 .ien_int_2 = {.phys = ZEUS_ADDR(0x282834)},
56 .ien_int_1 = 0x282838, 59 .ien_int_1 = {.phys = ZEUS_ADDR(0x282838)},
57 .ien_int_0 = 0x28283c, 60 .ien_int_0 = {.phys = ZEUS_ADDR(0x28283c)},
58 .int_level_3_3 = 0x282880, 61 .int_level_3_3 = {.phys = ZEUS_ADDR(0x282880)},
59 .int_level_3_2 = 0x282884, 62 .int_level_3_2 = {.phys = ZEUS_ADDR(0x282884)},
60 .int_level_3_1 = 0x282888, 63 .int_level_3_1 = {.phys = ZEUS_ADDR(0x282888)},
61 .int_level_3_0 = 0x28288c, 64 .int_level_3_0 = {.phys = ZEUS_ADDR(0x28288c)},
62 .int_level_2_3 = 0x282890, 65 .int_level_2_3 = {.phys = ZEUS_ADDR(0x282890)},
63 .int_level_2_2 = 0x282894, 66 .int_level_2_2 = {.phys = ZEUS_ADDR(0x282894)},
64 .int_level_2_1 = 0x282898, 67 .int_level_2_1 = {.phys = ZEUS_ADDR(0x282898)},
65 .int_level_2_0 = 0x28289c, 68 .int_level_2_0 = {.phys = ZEUS_ADDR(0x28289c)},
66 .int_level_1_3 = 0x2828a0, 69 .int_level_1_3 = {.phys = ZEUS_ADDR(0x2828a0)},
67 .int_level_1_2 = 0x2828a4, 70 .int_level_1_2 = {.phys = ZEUS_ADDR(0x2828a4)},
68 .int_level_1_1 = 0x2828a8, 71 .int_level_1_1 = {.phys = ZEUS_ADDR(0x2828a8)},
69 .int_level_1_0 = 0x2828ac, 72 .int_level_1_0 = {.phys = ZEUS_ADDR(0x2828ac)},
70 .int_level_0_3 = 0x2828b0, 73 .int_level_0_3 = {.phys = ZEUS_ADDR(0x2828b0)},
71 .int_level_0_2 = 0x2828b4, 74 .int_level_0_2 = {.phys = ZEUS_ADDR(0x2828b4)},
72 .int_level_0_1 = 0x2828b8, 75 .int_level_0_1 = {.phys = ZEUS_ADDR(0x2828b8)},
73 .int_level_0_0 = 0x2828bc, 76 .int_level_0_0 = {.phys = ZEUS_ADDR(0x2828bc)},
74 .int_docsis_en = 0x2828F4, 77 .int_docsis_en = {.phys = ZEUS_ADDR(0x2828F4)},
75 78
76 .mips_pll_setup = 0x1a0000, 79 .mips_pll_setup = {.phys = ZEUS_ADDR(0x1a0000)},
77 .usb_fs = 0x1a0018, 80 .usb_fs = {.phys = ZEUS_ADDR(0x1a0018)},
78 .test_bus = 0x1a0238, 81 .test_bus = {.phys = ZEUS_ADDR(0x1a0238)},
79 .crt_spare = 0x1a0090, 82 .crt_spare = {.phys = ZEUS_ADDR(0x1a0090)},
80 .usb2_ohci_int_mask = 0x1e000c, 83 .usb2_ohci_int_mask = {.phys = ZEUS_ADDR(0x1e000c)},
81 .usb2_strap = 0x1e0014, 84 .usb2_strap = {.phys = ZEUS_ADDR(0x1e0014)},
82 .ehci_hcapbase = 0x1FFE00, 85 .ehci_hcapbase = {.phys = ZEUS_ADDR(0x1FFE00)},
83 .ohci_hc_revision = 0x1FFC00, 86 .ohci_hc_revision = {.phys = ZEUS_ADDR(0x1FFC00)},
84 .bcm1_bs_lmi_steer = 0x2C0008, 87 .bcm1_bs_lmi_steer = {.phys = ZEUS_ADDR(0x2C0008)},
85 .usb2_control = 0x2c01a0, 88 .usb2_control = {.phys = ZEUS_ADDR(0x2c01a0)},
86 .usb2_stbus_obc = 0x1FFF00, 89 .usb2_stbus_obc = {.phys = ZEUS_ADDR(0x1FFF00)},
87 .usb2_stbus_mess_size = 0x1FFF04, 90 .usb2_stbus_mess_size = {.phys = ZEUS_ADDR(0x1FFF04)},
88 .usb2_stbus_chunk_size = 0x1FFF08, 91 .usb2_stbus_chunk_size = {.phys = ZEUS_ADDR(0x1FFF08)},
89 92
90 .pcie_regs = 0x200000, 93 .pcie_regs = {.phys = ZEUS_ADDR(0x200000)},
91 .tim_ch = 0x282C10, 94 .tim_ch = {.phys = ZEUS_ADDR(0x282C10)},
92 .tim_cl = 0x282C14, 95 .tim_cl = {.phys = ZEUS_ADDR(0x282C14)},
93 .gpio_dout = 0x282c20, 96 .gpio_dout = {.phys = ZEUS_ADDR(0x282c20)},
94 .gpio_din = 0x282c24, 97 .gpio_din = {.phys = ZEUS_ADDR(0x282c24)},
95 .gpio_dir = 0x282c2C, 98 .gpio_dir = {.phys = ZEUS_ADDR(0x282c2C)},
96 .watchdog = 0x282c30, 99 .watchdog = {.phys = ZEUS_ADDR(0x282c30)},
97 .front_panel = 0x283800, 100 .front_panel = {.phys = ZEUS_ADDR(0x283800)},
98}; 101};
diff --git a/arch/mips/powertv/asic/asic_devices.c b/arch/mips/powertv/asic/asic_devices.c
index bae82880b6b5..6a882194e063 100644
--- a/arch/mips/powertv/asic/asic_devices.c
+++ b/arch/mips/powertv/asic/asic_devices.c
@@ -67,8 +67,8 @@ enum asic_type asic;
67 67
68unsigned int platform_features; 68unsigned int platform_features;
69unsigned int platform_family; 69unsigned int platform_family;
70const struct register_map *register_map; 70struct register_map _asic_register_map;
71EXPORT_SYMBOL(register_map); /* Exported for testing */ 71EXPORT_SYMBOL(_asic_register_map); /* Exported for testing */
72unsigned long asic_phy_base; 72unsigned long asic_phy_base;
73unsigned long asic_base; 73unsigned long asic_base;
74EXPORT_SYMBOL(asic_base); /* Exported for testing */ 74EXPORT_SYMBOL(asic_base); /* Exported for testing */
@@ -418,6 +418,15 @@ void platform_unconfigure_usb_ohci()
418{ 418{
419} 419}
420 420
421static void __init set_register_map(unsigned long phys_base,
422 const struct register_map *map)
423{
424 asic_phy_base = phys_base;
425 _asic_register_map = *map;
426 register_map_virtualize(&_asic_register_map);
427 asic_base = (unsigned long)ioremap_nocache(phys_base, ASIC_IO_SIZE);
428}
429
421/** 430/**
422 * configure_platform - configuration based on platform type. 431 * configure_platform - configuration based on platform type.
423 */ 432 */
@@ -431,10 +440,7 @@ void __init configure_platform(void)
431 case FAMILY_1500VZF: 440 case FAMILY_1500VZF:
432 platform_features = FFS_CAPABLE; 441 platform_features = FFS_CAPABLE;
433 asic = ASIC_CALLIOPE; 442 asic = ASIC_CALLIOPE;
434 asic_phy_base = CALLIOPE_IO_BASE; 443 set_register_map(CALLIOPE_IO_BASE, &calliope_register_map);
435 register_map = &calliope_register_map;
436 asic_base = (unsigned long)ioremap_nocache(asic_phy_base,
437 ASIC_IO_SIZE);
438 444
439 if (platform_family == FAMILY_1500VZE) { 445 if (platform_family == FAMILY_1500VZE) {
440 gp_resources = non_dvr_vze_calliope_resources; 446 gp_resources = non_dvr_vze_calliope_resources;
@@ -455,10 +461,7 @@ void __init configure_platform(void)
455 platform_features = FFS_CAPABLE | PCIE_CAPABLE | 461 platform_features = FFS_CAPABLE | PCIE_CAPABLE |
456 DISPLAY_CAPABLE; 462 DISPLAY_CAPABLE;
457 asic = ASIC_ZEUS; 463 asic = ASIC_ZEUS;
458 asic_phy_base = ZEUS_IO_BASE; 464 set_register_map(ZEUS_IO_BASE, &zeus_register_map);
459 register_map = &zeus_register_map;
460 asic_base = (unsigned long)ioremap_nocache(asic_phy_base,
461 ASIC_IO_SIZE);
462 gp_resources = non_dvr_zeus_resources; 465 gp_resources = non_dvr_zeus_resources;
463 466
464 pr_info("Platform: 4500 - ZEUS, NON_DVR_CAPABLE\n"); 467 pr_info("Platform: 4500 - ZEUS, NON_DVR_CAPABLE\n");
@@ -471,11 +474,6 @@ void __init configure_platform(void)
471 /* The settop has PCIE but it isn't used, so don't advertise 474 /* The settop has PCIE but it isn't used, so don't advertise
472 * it*/ 475 * it*/
473 platform_features = FFS_CAPABLE | DISPLAY_CAPABLE; 476 platform_features = FFS_CAPABLE | DISPLAY_CAPABLE;
474 asic_phy_base = CRONUS_IO_BASE; /* same as Cronus */
475 register_map = &cronus_register_map; /* same as Cronus */
476 asic_base = (unsigned long)ioremap_nocache(asic_phy_base,
477 ASIC_IO_SIZE);
478 gp_resources = non_dvr_cronuslite_resources;
479 477
480 /* ASIC version will determine if this is a real CronusLite or 478 /* ASIC version will determine if this is a real CronusLite or
481 * Castrati(Cronus) */ 479 * Castrati(Cronus) */
@@ -489,6 +487,9 @@ void __init configure_platform(void)
489 else 487 else
490 asic = ASIC_CRONUSLITE; 488 asic = ASIC_CRONUSLITE;
491 489
490 /* Cronus and Cronus Lite have the same register map */
491 set_register_map(CRONUS_IO_BASE, &cronus_register_map);
492 gp_resources = non_dvr_cronuslite_resources;
492 pr_info("Platform: 4600 - %s, NON_DVR_CAPABLE, " 493 pr_info("Platform: 4600 - %s, NON_DVR_CAPABLE, "
493 "chipversion=0x%08X\n", 494 "chipversion=0x%08X\n",
494 (asic == ASIC_CRONUS) ? "CRONUS" : "CRONUS LITE", 495 (asic == ASIC_CRONUS) ? "CRONUS" : "CRONUS LITE",
@@ -498,10 +499,7 @@ void __init configure_platform(void)
498 case FAMILY_4600VZA: 499 case FAMILY_4600VZA:
499 platform_features = FFS_CAPABLE | DISPLAY_CAPABLE; 500 platform_features = FFS_CAPABLE | DISPLAY_CAPABLE;
500 asic = ASIC_CRONUS; 501 asic = ASIC_CRONUS;
501 asic_phy_base = CRONUS_IO_BASE; 502 set_register_map(CRONUS_IO_BASE, &cronus_register_map);
502 register_map = &cronus_register_map;
503 asic_base = (unsigned long)ioremap_nocache(asic_phy_base,
504 ASIC_IO_SIZE);
505 gp_resources = non_dvr_cronus_resources; 503 gp_resources = non_dvr_cronus_resources;
506 504
507 pr_info("Platform: Vz Class A - CRONUS, NON_DVR_CAPABLE\n"); 505 pr_info("Platform: Vz Class A - CRONUS, NON_DVR_CAPABLE\n");
@@ -512,10 +510,7 @@ void __init configure_platform(void)
512 platform_features = DVR_CAPABLE | PCIE_CAPABLE | 510 platform_features = DVR_CAPABLE | PCIE_CAPABLE |
513 DISPLAY_CAPABLE; 511 DISPLAY_CAPABLE;
514 asic = ASIC_ZEUS; 512 asic = ASIC_ZEUS;
515 asic_phy_base = ZEUS_IO_BASE; 513 set_register_map(ZEUS_IO_BASE, &zeus_register_map);
516 register_map = &zeus_register_map;
517 asic_base = (unsigned long)ioremap_nocache(asic_phy_base,
518 ASIC_IO_SIZE);
519 gp_resources = dvr_zeus_resources; 514 gp_resources = dvr_zeus_resources;
520 515
521 pr_info("Platform: 8500/RNG200 - ZEUS, DVR_CAPABLE\n"); 516 pr_info("Platform: 8500/RNG200 - ZEUS, DVR_CAPABLE\n");
@@ -526,10 +521,7 @@ void __init configure_platform(void)
526 platform_features = DVR_CAPABLE | PCIE_CAPABLE | 521 platform_features = DVR_CAPABLE | PCIE_CAPABLE |
527 DISPLAY_CAPABLE; 522 DISPLAY_CAPABLE;
528 asic = ASIC_CRONUS; 523 asic = ASIC_CRONUS;
529 asic_phy_base = CRONUS_IO_BASE; 524 set_register_map(CRONUS_IO_BASE, &cronus_register_map);
530 register_map = &cronus_register_map;
531 asic_base = (unsigned long)ioremap_nocache(asic_phy_base,
532 ASIC_IO_SIZE);
533 gp_resources = dvr_cronus_resources; 525 gp_resources = dvr_cronus_resources;
534 526
535 pr_info("Platform: 8600/Vz Class B - CRONUS, " 527 pr_info("Platform: 8600/Vz Class B - CRONUS, "
diff --git a/arch/mips/powertv/cmdline.c b/arch/mips/powertv/cmdline.c
deleted file mode 100644
index 98d73cb0d452..000000000000
--- a/arch/mips/powertv/cmdline.c
+++ /dev/null
@@ -1,52 +0,0 @@
1/*
2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
4 * Portions copyright (C) 2009 Cisco Systems, Inc.
5 *
6 * This program is free software; you can distribute it and/or modify it
7 * under the terms of the GNU General Public License (Version 2) as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
18 *
19 * Kernel command line creation using the prom monitor (YAMON) argc/argv.
20 */
21#include <linux/init.h>
22#include <linux/string.h>
23
24#include <asm/bootinfo.h>
25
26#include "init.h"
27
28/*
29 * YAMON (32-bit PROM) pass arguments and environment as 32-bit pointer.
30 * This macro take care of sign extension.
31 */
32#define prom_argv(index) ((char *)(long)_prom_argv[(index)])
33
34char * __init prom_getcmdline(void)
35{
36 return &(arcs_cmdline[0]);
37}
38
39void __init prom_init_cmdline(void)
40{
41 int len;
42
43 if (prom_argc != 1)
44 return;
45
46 len = strlen(arcs_cmdline);
47
48 arcs_cmdline[len] = ' ';
49
50 strlcpy(arcs_cmdline + len + 1, (char *)_prom_argv,
51 COMMAND_LINE_SIZE - len - 1);
52}
diff --git a/arch/mips/powertv/init.c b/arch/mips/powertv/init.c
index 5f4e4c304e48..0afe227f1d0a 100644
--- a/arch/mips/powertv/init.c
+++ b/arch/mips/powertv/init.c
@@ -34,10 +34,7 @@
34#include <asm/mips-boards/generic.h> 34#include <asm/mips-boards/generic.h>
35#include <asm/mach-powertv/asic.h> 35#include <asm/mach-powertv/asic.h>
36 36
37#include "init.h" 37static int *_prom_envp;
38
39int prom_argc;
40int *_prom_argv, *_prom_envp;
41unsigned long _prom_memsize; 38unsigned long _prom_memsize;
42 39
43/* 40/*
@@ -109,16 +106,20 @@ static void __init mips_ejtag_setup(void)
109 106
110void __init prom_init(void) 107void __init prom_init(void)
111{ 108{
109 int prom_argc;
110 char *prom_argv;
111
112 prom_argc = fw_arg0; 112 prom_argc = fw_arg0;
113 _prom_argv = (int *) fw_arg1; 113 prom_argv = (char *) fw_arg1;
114 _prom_envp = (int *) fw_arg2; 114 _prom_envp = (int *) fw_arg2;
115 _prom_memsize = (unsigned long) fw_arg3; 115 _prom_memsize = (unsigned long) fw_arg3;
116 116
117 board_nmi_handler_setup = mips_nmi_setup; 117 board_nmi_handler_setup = mips_nmi_setup;
118 board_ejtag_handler_setup = mips_ejtag_setup; 118 board_ejtag_handler_setup = mips_ejtag_setup;
119 119
120 pr_info("\nLINUX started...\n"); 120 if (prom_argc == 1)
121 prom_init_cmdline(); 121 strlcat(arcs_cmdline, prom_argv, COMMAND_LINE_SIZE);
122
122 configure_platform(); 123 configure_platform();
123 prom_meminit(); 124 prom_meminit();
124 125
diff --git a/arch/mips/powertv/init.h b/arch/mips/powertv/init.h
index 7af6bf25008c..b194c34ca966 100644
--- a/arch/mips/powertv/init.h
+++ b/arch/mips/powertv/init.h
@@ -22,7 +22,5 @@
22 22
23#ifndef _POWERTV_INIT_H 23#ifndef _POWERTV_INIT_H
24#define _POWERTV_INIT_H 24#define _POWERTV_INIT_H
25extern int prom_argc;
26extern int *_prom_argv;
27extern unsigned long _prom_memsize; 25extern unsigned long _prom_memsize;
28#endif 26#endif
diff --git a/arch/mips/powertv/memory.c b/arch/mips/powertv/memory.c
index 28d06605fff6..f49eb3d0358b 100644
--- a/arch/mips/powertv/memory.c
+++ b/arch/mips/powertv/memory.c
@@ -42,8 +42,6 @@
42#define BOOT_MEM_SIZE KIBIBYTE(256) /* Memory reserved for bldr */ 42#define BOOT_MEM_SIZE KIBIBYTE(256) /* Memory reserved for bldr */
43#define PHYS_MEM_START 0x10000000 /* Start of physical memory */ 43#define PHYS_MEM_START 0x10000000 /* Start of physical memory */
44 44
45unsigned long ptv_memsize;
46
47char __initdata cmdline[COMMAND_LINE_SIZE]; 45char __initdata cmdline[COMMAND_LINE_SIZE];
48 46
49void __init prom_meminit(void) 47void __init prom_meminit(void)
@@ -87,9 +85,6 @@ void __init prom_meminit(void)
87 } 85 }
88 } 86 }
89 87
90 /* Store memsize for diagnostic purposes */
91 ptv_memsize = memsize;
92
93 physend = PFN_ALIGN(&_end) - 0x80000000; 88 physend = PFN_ALIGN(&_end) - 0x80000000;
94 if (memsize > LOW_MEM_MAX) { 89 if (memsize > LOW_MEM_MAX) {
95 low_mem = LOW_MEM_MAX; 90 low_mem = LOW_MEM_MAX;
diff --git a/arch/mips/powertv/powertv_setup.c b/arch/mips/powertv/powertv_setup.c
index bd8ebf128f29..698b1eafbe98 100644
--- a/arch/mips/powertv/powertv_setup.c
+++ b/arch/mips/powertv/powertv_setup.c
@@ -64,9 +64,6 @@
64#define REG_SIZE "4" /* In bytes */ 64#define REG_SIZE "4" /* In bytes */
65#endif 65#endif
66 66
67static struct pt_regs die_regs;
68static bool have_die_regs;
69
70static void register_panic_notifier(void); 67static void register_panic_notifier(void);
71static int panic_handler(struct notifier_block *notifier_block, 68static int panic_handler(struct notifier_block *notifier_block,
72 unsigned long event, void *cause_string); 69 unsigned long event, void *cause_string);
@@ -218,24 +215,6 @@ static int panic_handler(struct notifier_block *notifier_block,
218 return NOTIFY_DONE; 215 return NOTIFY_DONE;
219} 216}
220 217
221/**
222 * Platform-specific handling of oops
223 * @str: Pointer to the oops string
224 * @regs: Pointer to the oops registers
225 * All we do here is to save the registers for subsequent printing through
226 * the panic notifier.
227 */
228void platform_die(const char *str, const struct pt_regs *regs)
229{
230 /* If we already have saved registers, don't overwrite them as they
231 * they apply to the initial fault */
232
233 if (!have_die_regs) {
234 have_die_regs = true;
235 die_regs = *regs;
236 }
237}
238
239/* Information about the RF MAC address, if one was supplied on the 218/* Information about the RF MAC address, if one was supplied on the
240 * command line. */ 219 * command line. */
241static bool have_rfmac; 220static bool have_rfmac;
diff --git a/arch/mips/powertv/reset.c b/arch/mips/powertv/reset.c
index 494c652c984b..0007652cb774 100644
--- a/arch/mips/powertv/reset.c
+++ b/arch/mips/powertv/reset.c
@@ -28,9 +28,6 @@
28#include <asm/mach-powertv/asic_regs.h> 28#include <asm/mach-powertv/asic_regs.h>
29#include "reset.h" 29#include "reset.h"
30 30
31static void mips_machine_restart(char *command);
32static void mips_machine_halt(void);
33
34static void mips_machine_restart(char *command) 31static void mips_machine_restart(char *command)
35{ 32{
36#ifdef CONFIG_BOOTLOADER_DRIVER 33#ifdef CONFIG_BOOTLOADER_DRIVER
@@ -44,22 +41,7 @@ static void mips_machine_restart(char *command)
44#endif 41#endif
45} 42}
46 43
47static void mips_machine_halt(void)
48{
49#ifdef CONFIG_BOOTLOADER_DRIVER
50 /*
51 * Call the bootloader's reset function to ensure
52 * that persistent data is flushed before hard reset
53 */
54 kbldr_SetCauseAndReset();
55#else
56 writel(0x1, asic_reg_addr(watchdog));
57#endif
58}
59
60void mips_reboot_setup(void) 44void mips_reboot_setup(void)
61{ 45{
62 _machine_restart = mips_machine_restart; 46 _machine_restart = mips_machine_restart;
63 _machine_halt = mips_machine_halt;
64 pm_power_off = mips_machine_halt;
65} 47}
diff --git a/arch/mips/powertv/time.c b/arch/mips/powertv/time.c
index 1e0a5ef4c8c7..9fd7b67f2af7 100644
--- a/arch/mips/powertv/time.c
+++ b/arch/mips/powertv/time.c
@@ -33,5 +33,4 @@ unsigned int __cpuinit get_c0_compare_int(void)
33void __init plat_time_init(void) 33void __init plat_time_init(void)
34{ 34{
35 powertv_clocksource_init(); 35 powertv_clocksource_init();
36 r4k_clockevent_init();
37} 36}
diff --git a/arch/mips/sgi-ip27/ip27-memory.c b/arch/mips/sgi-ip27/ip27-memory.c
index f61c164d1e67..bc1297109cc5 100644
--- a/arch/mips/sgi-ip27/ip27-memory.c
+++ b/arch/mips/sgi-ip27/ip27-memory.c
@@ -505,5 +505,5 @@ void __init mem_init(void)
505 (num_physpages - tmp) << (PAGE_SHIFT-10), 505 (num_physpages - tmp) << (PAGE_SHIFT-10),
506 datasize >> 10, 506 datasize >> 10,
507 initsize >> 10, 507 initsize >> 10,
508 (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10))); 508 totalhigh_pages << (PAGE_SHIFT-10));
509} 509}
diff --git a/arch/mips/sni/rm200.c b/arch/mips/sni/rm200.c
index 46f00691f448..31e2583ec622 100644
--- a/arch/mips/sni/rm200.c
+++ b/arch/mips/sni/rm200.c
@@ -404,7 +404,7 @@ void __init sni_rm200_i8259_irqs(void)
404 if (!rm200_pic_master) 404 if (!rm200_pic_master)
405 return; 405 return;
406 rm200_pic_slave = ioremap_nocache(0x160000a0, 4); 406 rm200_pic_slave = ioremap_nocache(0x160000a0, 4);
407 if (!rm200_pic_master) { 407 if (!rm200_pic_slave) {
408 iounmap(rm200_pic_master); 408 iounmap(rm200_pic_master);
409 return; 409 return;
410 } 410 }
diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c
index 06e801c7e258..e27809b6d04f 100644
--- a/arch/mips/txx9/generic/setup.c
+++ b/arch/mips/txx9/generic/setup.c
@@ -160,7 +160,6 @@ static void __init prom_init_cmdline(void)
160 int argc; 160 int argc;
161 int *argv32; 161 int *argv32;
162 int i; /* Always ignore the "-c" at argv[0] */ 162 int i; /* Always ignore the "-c" at argv[0] */
163 static char builtin[COMMAND_LINE_SIZE] __initdata;
164 163
165 if (fw_arg0 >= CKSEG0 || fw_arg1 < CKSEG0) { 164 if (fw_arg0 >= CKSEG0 || fw_arg1 < CKSEG0) {
166 /* 165 /*
@@ -174,20 +173,6 @@ static void __init prom_init_cmdline(void)
174 argv32 = (int *)fw_arg1; 173 argv32 = (int *)fw_arg1;
175 } 174 }
176 175
177 /* ignore all built-in args if any f/w args given */
178 /*
179 * But if built-in strings was started with '+', append them
180 * to command line args. If built-in was started with '-',
181 * ignore all f/w args.
182 */
183 builtin[0] = '\0';
184 if (arcs_cmdline[0] == '+')
185 strcpy(builtin, arcs_cmdline + 1);
186 else if (arcs_cmdline[0] == '-') {
187 strcpy(builtin, arcs_cmdline + 1);
188 argc = 0;
189 } else if (argc <= 1)
190 strcpy(builtin, arcs_cmdline);
191 arcs_cmdline[0] = '\0'; 176 arcs_cmdline[0] = '\0';
192 177
193 for (i = 1; i < argc; i++) { 178 for (i = 1; i < argc; i++) {
@@ -201,12 +186,6 @@ static void __init prom_init_cmdline(void)
201 } else 186 } else
202 strcat(arcs_cmdline, str); 187 strcat(arcs_cmdline, str);
203 } 188 }
204 /* append saved builtin args */
205 if (builtin[0]) {
206 if (arcs_cmdline[0])
207 strcat(arcs_cmdline, " ");
208 strcat(arcs_cmdline, builtin);
209 }
210} 189}
211 190
212static int txx9_ic_disable __initdata; 191static int txx9_ic_disable __initdata;
diff --git a/arch/mips/vr41xx/common/init.c b/arch/mips/vr41xx/common/init.c
index 1386e6f081c8..23916321cc1b 100644
--- a/arch/mips/vr41xx/common/init.c
+++ b/arch/mips/vr41xx/common/init.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * init.c, Common initialization routines for NEC VR4100 series. 2 * init.c, Common initialization routines for NEC VR4100 series.
3 * 3 *
4 * Copyright (C) 2003-2008 Yoichi Yuasa <yuasa@linux-mips.org> 4 * Copyright (C) 2003-2009 Yoichi Yuasa <yuasa@linux-mips.org>
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
@@ -66,9 +66,9 @@ void __init prom_init(void)
66 argv = (char **)fw_arg1; 66 argv = (char **)fw_arg1;
67 67
68 for (i = 1; i < argc; i++) { 68 for (i = 1; i < argc; i++) {
69 strcat(arcs_cmdline, argv[i]); 69 strlcat(arcs_cmdline, argv[i], COMMAND_LINE_SIZE);
70 if (i < (argc - 1)) 70 if (i < (argc - 1))
71 strcat(arcs_cmdline, " "); 71 strlcat(arcs_cmdline, " ", COMMAND_LINE_SIZE);
72 } 72 }
73} 73}
74 74
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-18 20:11:09 -0500