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-rw-r--r--arch/mips/ath79/irq.c1
-rw-r--r--arch/mips/ath79/setup.c5
-rw-r--r--arch/mips/include/asm/time.h1
-rw-r--r--arch/mips/kernel/perf_event_mipsxx.c23
-rw-r--r--arch/mips/lantiq/irq.c8
-rw-r--r--arch/mips/mti-malta/malta-time.c16
-rw-r--r--arch/mips/mti-sead3/sead3-time.c7
-rw-r--r--arch/mips/oprofile/op_model_mipsxx.c18
-rw-r--r--arch/mips/ralink/irq.c8
9 files changed, 51 insertions, 36 deletions
diff --git a/arch/mips/ath79/irq.c b/arch/mips/ath79/irq.c
index 9c0e1761773f..6adae366f11a 100644
--- a/arch/mips/ath79/irq.c
+++ b/arch/mips/ath79/irq.c
@@ -359,7 +359,6 @@ void __init arch_init_irq(void)
359 BUG(); 359 BUG();
360 } 360 }
361 361
362 cp0_perfcount_irq = ATH79_MISC_IRQ(5);
363 mips_cpu_irq_init(); 362 mips_cpu_irq_init();
364 ath79_misc_irq_init(); 363 ath79_misc_irq_init();
365 364
diff --git a/arch/mips/ath79/setup.c b/arch/mips/ath79/setup.c
index 64807a4809d0..a73c93c3d44a 100644
--- a/arch/mips/ath79/setup.c
+++ b/arch/mips/ath79/setup.c
@@ -182,6 +182,11 @@ const char *get_system_type(void)
182 return ath79_sys_type; 182 return ath79_sys_type;
183} 183}
184 184
185int get_c0_perfcount_int(void)
186{
187 return ATH79_MISC_IRQ(5);
188}
189
185unsigned int get_c0_compare_int(void) 190unsigned int get_c0_compare_int(void)
186{ 191{
187 return CP0_LEGACY_COMPARE_IRQ; 192 return CP0_LEGACY_COMPARE_IRQ;
diff --git a/arch/mips/include/asm/time.h b/arch/mips/include/asm/time.h
index 8f3047d611ee..7969933ba89a 100644
--- a/arch/mips/include/asm/time.h
+++ b/arch/mips/include/asm/time.h
@@ -46,6 +46,7 @@ extern unsigned int mips_hpt_frequency;
46 * so it lives here. 46 * so it lives here.
47 */ 47 */
48extern int (*perf_irq)(void); 48extern int (*perf_irq)(void);
49extern int __weak get_c0_perfcount_int(void);
49 50
50/* 51/*
51 * Initialize the calling CPU's compare interrupt as clockevent device 52 * Initialize the calling CPU's compare interrupt as clockevent device
diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c
index 7633d30550e9..9466184d0039 100644
--- a/arch/mips/kernel/perf_event_mipsxx.c
+++ b/arch/mips/kernel/perf_event_mipsxx.c
@@ -1613,22 +1613,13 @@ init_hw_perf_events(void)
1613 counters = counters_total_to_per_cpu(counters); 1613 counters = counters_total_to_per_cpu(counters);
1614#endif 1614#endif
1615 1615
1616#ifdef MSC01E_INT_BASE 1616 if (get_c0_perfcount_int)
1617 if (cpu_has_veic) { 1617 irq = get_c0_perfcount_int();
1618 /* 1618 else if ((cp0_perfcount_irq >= 0) &&
1619 * Using platform specific interrupt controller defines. 1619 (cp0_compare_irq != cp0_perfcount_irq))
1620 */ 1620 irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
1621 irq = MSC01E_INT_BASE + MSC01E_INT_PERFCTR; 1621 else
1622 } else { 1622 irq = -1;
1623#endif
1624 if ((cp0_perfcount_irq >= 0) &&
1625 (cp0_compare_irq != cp0_perfcount_irq))
1626 irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
1627 else
1628 irq = -1;
1629#ifdef MSC01E_INT_BASE
1630 }
1631#endif
1632 1623
1633 mipspmu.map_raw_event = mipsxx_pmu_map_raw_event; 1624 mipspmu.map_raw_event = mipsxx_pmu_map_raw_event;
1634 1625
diff --git a/arch/mips/lantiq/irq.c b/arch/mips/lantiq/irq.c
index 030568a70ac4..21c38eee0a81 100644
--- a/arch/mips/lantiq/irq.c
+++ b/arch/mips/lantiq/irq.c
@@ -70,6 +70,7 @@ static struct resource ltq_eiu_irq[MAX_EIU];
70static void __iomem *ltq_icu_membase[MAX_IM]; 70static void __iomem *ltq_icu_membase[MAX_IM];
71static void __iomem *ltq_eiu_membase; 71static void __iomem *ltq_eiu_membase;
72static struct irq_domain *ltq_domain; 72static struct irq_domain *ltq_domain;
73static int ltq_perfcount_irq;
73 74
74int ltq_eiu_get_irq(int exin) 75int ltq_eiu_get_irq(int exin)
75{ 76{
@@ -449,7 +450,7 @@ int __init icu_of_init(struct device_node *node, struct device_node *parent)
449#endif 450#endif
450 451
451 /* tell oprofile which irq to use */ 452 /* tell oprofile which irq to use */
452 cp0_perfcount_irq = irq_create_mapping(ltq_domain, LTQ_PERF_IRQ); 453 ltq_perfcount_irq = irq_create_mapping(ltq_domain, LTQ_PERF_IRQ);
453 454
454 /* 455 /*
455 * if the timer irq is not one of the mips irqs we need to 456 * if the timer irq is not one of the mips irqs we need to
@@ -461,6 +462,11 @@ int __init icu_of_init(struct device_node *node, struct device_node *parent)
461 return 0; 462 return 0;
462} 463}
463 464
465int get_c0_perfcount_int(void)
466{
467 return ltq_perfcount_irq;
468}
469
464unsigned int get_c0_compare_int(void) 470unsigned int get_c0_compare_int(void)
465{ 471{
466 return MIPS_CPU_TIMER_IRQ; 472 return MIPS_CPU_TIMER_IRQ;
diff --git a/arch/mips/mti-malta/malta-time.c b/arch/mips/mti-malta/malta-time.c
index 3778a359f3ad..a4e035c8acf6 100644
--- a/arch/mips/mti-malta/malta-time.c
+++ b/arch/mips/mti-malta/malta-time.c
@@ -121,22 +121,20 @@ void read_persistent_clock(struct timespec *ts)
121 ts->tv_nsec = 0; 121 ts->tv_nsec = 0;
122} 122}
123 123
124static void __init plat_perf_setup(void) 124int get_c0_perfcount_int(void)
125{ 125{
126#ifdef MSC01E_INT_BASE
127 if (cpu_has_veic) { 126 if (cpu_has_veic) {
128 set_vi_handler(MSC01E_INT_PERFCTR, mips_perf_dispatch); 127 set_vi_handler(MSC01E_INT_PERFCTR, mips_perf_dispatch);
129 mips_cpu_perf_irq = MSC01E_INT_BASE + MSC01E_INT_PERFCTR; 128 mips_cpu_perf_irq = MSC01E_INT_BASE + MSC01E_INT_PERFCTR;
130 } else 129 } else if (cp0_perfcount_irq >= 0) {
131#endif
132 if (cp0_perfcount_irq >= 0) {
133 if (cpu_has_vint) 130 if (cpu_has_vint)
134 set_vi_handler(cp0_perfcount_irq, mips_perf_dispatch); 131 set_vi_handler(cp0_perfcount_irq, mips_perf_dispatch);
135 mips_cpu_perf_irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq; 132 mips_cpu_perf_irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
136#ifdef CONFIG_SMP 133 } else {
137 irq_set_handler(mips_cpu_perf_irq, handle_percpu_irq); 134 mips_cpu_perf_irq = -1;
138#endif
139 } 135 }
136
137 return mips_cpu_perf_irq;
140} 138}
141 139
142unsigned int get_c0_compare_int(void) 140unsigned int get_c0_compare_int(void)
@@ -201,6 +199,4 @@ void __init plat_time_init(void)
201#endif 199#endif
202 } 200 }
203#endif 201#endif
204
205 plat_perf_setup();
206} 202}
diff --git a/arch/mips/mti-sead3/sead3-time.c b/arch/mips/mti-sead3/sead3-time.c
index 678d03d53c60..f090c5177719 100644
--- a/arch/mips/mti-sead3/sead3-time.c
+++ b/arch/mips/mti-sead3/sead3-time.c
@@ -81,13 +81,16 @@ void read_persistent_clock(struct timespec *ts)
81 ts->tv_nsec = 0; 81 ts->tv_nsec = 0;
82} 82}
83 83
84static void __init plat_perf_setup(void) 84int get_c0_perfcount_int(void)
85{ 85{
86 if (cp0_perfcount_irq >= 0) { 86 if (cp0_perfcount_irq >= 0) {
87 if (cpu_has_vint) 87 if (cpu_has_vint)
88 set_vi_handler(cp0_perfcount_irq, mips_perf_dispatch); 88 set_vi_handler(cp0_perfcount_irq, mips_perf_dispatch);
89 mips_cpu_perf_irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq; 89 mips_cpu_perf_irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
90 } else {
91 mips_cpu_perf_irq = -1;
90 } 92 }
93 return mips_cpu_perf_irq;
91} 94}
92 95
93unsigned int get_c0_compare_int(void) 96unsigned int get_c0_compare_int(void)
@@ -108,6 +111,4 @@ void __init plat_time_init(void)
108 (est_freq % 1000000) * 100 / 1000000); 111 (est_freq % 1000000) * 100 / 1000000);
109 112
110 mips_scroll_message(); 113 mips_scroll_message();
111
112 plat_perf_setup();
113} 114}
diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c
index 42821ae2d77e..01f721a85c5b 100644
--- a/arch/mips/oprofile/op_model_mipsxx.c
+++ b/arch/mips/oprofile/op_model_mipsxx.c
@@ -11,6 +11,7 @@
11#include <linux/interrupt.h> 11#include <linux/interrupt.h>
12#include <linux/smp.h> 12#include <linux/smp.h>
13#include <asm/irq_regs.h> 13#include <asm/irq_regs.h>
14#include <asm/time.h>
14 15
15#include "op_impl.h" 16#include "op_impl.h"
16 17
@@ -35,6 +36,7 @@
35#define M_PERFCTL_COUNT_ALL_THREADS (1UL << 13) 36#define M_PERFCTL_COUNT_ALL_THREADS (1UL << 13)
36 37
37static int (*save_perf_irq)(void); 38static int (*save_perf_irq)(void);
39static int perfcount_irq;
38 40
39/* 41/*
40 * XLR has only one set of counters per core. Designate the 42 * XLR has only one set of counters per core. Designate the
@@ -431,8 +433,16 @@ static int __init mipsxx_init(void)
431 save_perf_irq = perf_irq; 433 save_perf_irq = perf_irq;
432 perf_irq = mipsxx_perfcount_handler; 434 perf_irq = mipsxx_perfcount_handler;
433 435
434 if ((cp0_perfcount_irq >= 0) && (cp0_compare_irq != cp0_perfcount_irq)) 436 if (get_c0_perfcount_int)
435 return request_irq(cp0_perfcount_irq, mipsxx_perfcount_int, 437 perfcount_irq = get_c0_perfcount_int();
438 else if ((cp0_perfcount_irq >= 0) &&
439 (cp0_compare_irq != cp0_perfcount_irq))
440 perfcount_irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
441 else
442 perfcount_irq = -1;
443
444 if (perfcount_irq >= 0)
445 return request_irq(perfcount_irq, mipsxx_perfcount_int,
436 0, "Perfcounter", save_perf_irq); 446 0, "Perfcounter", save_perf_irq);
437 447
438 return 0; 448 return 0;
@@ -442,8 +452,8 @@ static void mipsxx_exit(void)
442{ 452{
443 int counters = op_model_mipsxx_ops.num_counters; 453 int counters = op_model_mipsxx_ops.num_counters;
444 454
445 if ((cp0_perfcount_irq >= 0) && (cp0_compare_irq != cp0_perfcount_irq)) 455 if (perfcount_irq >= 0)
446 free_irq(cp0_perfcount_irq, save_perf_irq); 456 free_irq(perfcount_irq, save_perf_irq);
447 457
448 counters = counters_per_cpu_to_total(counters); 458 counters = counters_per_cpu_to_total(counters);
449 on_each_cpu(reset_counters, (void *)(long)counters, 1); 459 on_each_cpu(reset_counters, (void *)(long)counters, 1);
diff --git a/arch/mips/ralink/irq.c b/arch/mips/ralink/irq.c
index 0495011a19df..7634dcd88766 100644
--- a/arch/mips/ralink/irq.c
+++ b/arch/mips/ralink/irq.c
@@ -45,6 +45,7 @@
45#define RALINK_INTC_IRQ_PERFC (RALINK_INTC_IRQ_BASE + 9) 45#define RALINK_INTC_IRQ_PERFC (RALINK_INTC_IRQ_BASE + 9)
46 46
47static void __iomem *rt_intc_membase; 47static void __iomem *rt_intc_membase;
48static int rt_perfcount_irq;
48 49
49static inline void rt_intc_w32(u32 val, unsigned reg) 50static inline void rt_intc_w32(u32 val, unsigned reg)
50{ 51{
@@ -73,6 +74,11 @@ static struct irq_chip ralink_intc_irq_chip = {
73 .irq_mask_ack = ralink_intc_irq_mask, 74 .irq_mask_ack = ralink_intc_irq_mask,
74}; 75};
75 76
77int get_c0_perfcount_int(void)
78{
79 return rt_perfcount_irq;
80}
81
76unsigned int get_c0_compare_int(void) 82unsigned int get_c0_compare_int(void)
77{ 83{
78 return CP0_LEGACY_COMPARE_IRQ; 84 return CP0_LEGACY_COMPARE_IRQ;
@@ -167,7 +173,7 @@ static int __init intc_of_init(struct device_node *node,
167 irq_set_handler_data(irq, domain); 173 irq_set_handler_data(irq, domain);
168 174
169 /* tell the kernel which irq is used for performance monitoring */ 175 /* tell the kernel which irq is used for performance monitoring */
170 cp0_perfcount_irq = irq_create_mapping(domain, 9); 176 rt_perfcount_irq = irq_create_mapping(domain, 9);
171 177
172 return 0; 178 return 0;
173} 179}