diff options
Diffstat (limited to 'arch/mips')
34 files changed, 78 insertions, 77 deletions
diff --git a/arch/mips/au1000/common/dbdma.c b/arch/mips/au1000/common/dbdma.c index d00e8247d6c2..6ee090bd86c9 100644 --- a/arch/mips/au1000/common/dbdma.c +++ b/arch/mips/au1000/common/dbdma.c | |||
@@ -214,7 +214,7 @@ au1xxx_ddma_add_device(dbdev_tab_t *dev) | |||
214 | if ( NULL != p ) | 214 | if ( NULL != p ) |
215 | { | 215 | { |
216 | memcpy(p, dev, sizeof(dbdev_tab_t)); | 216 | memcpy(p, dev, sizeof(dbdev_tab_t)); |
217 | p->dev_id = DSCR_DEV2CUSTOM_ID(new_id,dev->dev_id); | 217 | p->dev_id = DSCR_DEV2CUSTOM_ID(new_id,dev->dev_id); |
218 | ret = p->dev_id; | 218 | ret = p->dev_id; |
219 | new_id++; | 219 | new_id++; |
220 | #if 0 | 220 | #if 0 |
@@ -260,7 +260,7 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid, | |||
260 | spin_lock_irqsave(&au1xxx_dbdma_spin_lock, flags); | 260 | spin_lock_irqsave(&au1xxx_dbdma_spin_lock, flags); |
261 | if (!(stp->dev_flags & DEV_FLAGS_INUSE) || | 261 | if (!(stp->dev_flags & DEV_FLAGS_INUSE) || |
262 | (stp->dev_flags & DEV_FLAGS_ANYUSE)) { | 262 | (stp->dev_flags & DEV_FLAGS_ANYUSE)) { |
263 | /* Got source */ | 263 | /* Got source */ |
264 | stp->dev_flags |= DEV_FLAGS_INUSE; | 264 | stp->dev_flags |= DEV_FLAGS_INUSE; |
265 | if (!(dtp->dev_flags & DEV_FLAGS_INUSE) || | 265 | if (!(dtp->dev_flags & DEV_FLAGS_INUSE) || |
266 | (dtp->dev_flags & DEV_FLAGS_ANYUSE)) { | 266 | (dtp->dev_flags & DEV_FLAGS_ANYUSE)) { |
diff --git a/arch/mips/au1000/common/dma.c b/arch/mips/au1000/common/dma.c index 1905c6b104f2..1d82f2277517 100644 --- a/arch/mips/au1000/common/dma.c +++ b/arch/mips/au1000/common/dma.c | |||
@@ -174,7 +174,7 @@ int request_au1000_dma(int dev_id, const char *dev_str, | |||
174 | return -EINVAL; | 174 | return -EINVAL; |
175 | #else | 175 | #else |
176 | if (dev_id < 0 || dev_id >= DMA_NUM_DEV) | 176 | if (dev_id < 0 || dev_id >= DMA_NUM_DEV) |
177 | return -EINVAL; | 177 | return -EINVAL; |
178 | #endif | 178 | #endif |
179 | 179 | ||
180 | for (i = 0; i < NUM_AU1000_DMA_CHANNELS; i++) { | 180 | for (i = 0; i < NUM_AU1000_DMA_CHANNELS; i++) { |
diff --git a/arch/mips/au1000/common/platform.c b/arch/mips/au1000/common/platform.c index 48d3f54f88f8..d7a8f0a811fe 100644 --- a/arch/mips/au1000/common/platform.c +++ b/arch/mips/au1000/common/platform.c | |||
@@ -264,7 +264,7 @@ static struct resource smc91x_resources[] = { | |||
264 | 264 | ||
265 | static struct platform_device smc91x_device = { | 265 | static struct platform_device smc91x_device = { |
266 | .name = "smc91x", | 266 | .name = "smc91x", |
267 | .id = -1, | 267 | .id = -1, |
268 | .num_resources = ARRAY_SIZE(smc91x_resources), | 268 | .num_resources = ARRAY_SIZE(smc91x_resources), |
269 | .resource = smc91x_resources, | 269 | .resource = smc91x_resources, |
270 | }; | 270 | }; |
@@ -288,7 +288,7 @@ static struct platform_device *au1xxx_platform_devices[] __initdata = { | |||
288 | &au1xxx_mmc_device, | 288 | &au1xxx_mmc_device, |
289 | #endif | 289 | #endif |
290 | #ifdef CONFIG_MIPS_DB1200 | 290 | #ifdef CONFIG_MIPS_DB1200 |
291 | &smc91x_device, | 291 | &smc91x_device, |
292 | #endif | 292 | #endif |
293 | }; | 293 | }; |
294 | 294 | ||
diff --git a/arch/mips/au1000/common/setup.c b/arch/mips/au1000/common/setup.c index eb155c071aa6..1080558c8100 100644 --- a/arch/mips/au1000/common/setup.c +++ b/arch/mips/au1000/common/setup.c | |||
@@ -90,7 +90,7 @@ void __init plat_setup(void) | |||
90 | else { | 90 | else { |
91 | /* Clear to obtain best system bus performance */ | 91 | /* Clear to obtain best system bus performance */ |
92 | clear_c0_config(1<<19); /* Clear Config[OD] */ | 92 | clear_c0_config(1<<19); /* Clear Config[OD] */ |
93 | } | 93 | } |
94 | 94 | ||
95 | argptr = prom_getcmdline(); | 95 | argptr = prom_getcmdline(); |
96 | 96 | ||
diff --git a/arch/mips/au1000/common/time.c b/arch/mips/au1000/common/time.c index 883d3f3d8c53..f85f1524b366 100644 --- a/arch/mips/au1000/common/time.c +++ b/arch/mips/au1000/common/time.c | |||
@@ -359,7 +359,7 @@ static unsigned long do_fast_cp0_gettimeoffset(void) | |||
359 | : "hi", "lo", GCC_REG_ACCUM); | 359 | : "hi", "lo", GCC_REG_ACCUM); |
360 | 360 | ||
361 | /* | 361 | /* |
362 | * Due to possible jiffies inconsistencies, we need to check | 362 | * Due to possible jiffies inconsistencies, we need to check |
363 | * the result so that we'll get a timer that is monotonic. | 363 | * the result so that we'll get a timer that is monotonic. |
364 | */ | 364 | */ |
365 | if (res >= USECS_PER_JIFFY) | 365 | if (res >= USECS_PER_JIFFY) |
diff --git a/arch/mips/dec/prom/memory.c b/arch/mips/dec/prom/memory.c index 83d4556c3cb5..81cb5a76cfb7 100644 --- a/arch/mips/dec/prom/memory.c +++ b/arch/mips/dec/prom/memory.c | |||
@@ -45,7 +45,7 @@ static inline void pmax_setup_memory_region(void) | |||
45 | */ | 45 | */ |
46 | for (memory_page = (unsigned char *)CKSEG1 + CHUNK_SIZE; | 46 | for (memory_page = (unsigned char *)CKSEG1 + CHUNK_SIZE; |
47 | mem_err == 0 && memory_page < (unsigned char *)CKSEG1 + 0x1e00000; | 47 | mem_err == 0 && memory_page < (unsigned char *)CKSEG1 + 0x1e00000; |
48 | memory_page += CHUNK_SIZE) { | 48 | memory_page += CHUNK_SIZE) { |
49 | dummy = *memory_page; | 49 | dummy = *memory_page; |
50 | } | 50 | } |
51 | memcpy((void *)(CKSEG0 + 0x80), &old_handler, 0x80); | 51 | memcpy((void *)(CKSEG0 + 0x80), &old_handler, 0x80); |
diff --git a/arch/mips/jazz/int-handler.S b/arch/mips/jazz/int-handler.S index 4dbcf91db884..dc752c67b528 100644 --- a/arch/mips/jazz/int-handler.S +++ b/arch/mips/jazz/int-handler.S | |||
@@ -248,17 +248,17 @@ loc_call: /* | |||
248 | and t2,s1 | 248 | and t2,s1 |
249 | sh t2,JAZZ_IO_IRQ_ENABLE | 249 | sh t2,JAZZ_IO_IRQ_ENABLE |
250 | 250 | ||
251 | nor s1,zero,s1 | 251 | nor s1,zero,s1 |
252 | jal do_IRQ | 252 | jal do_IRQ |
253 | 253 | ||
254 | /* | 254 | /* |
255 | * Reenable interrupt | 255 | * Reenable interrupt |
256 | */ | 256 | */ |
257 | lhu t2,JAZZ_IO_IRQ_ENABLE | 257 | lhu t2,JAZZ_IO_IRQ_ENABLE |
258 | or t2,s1 | 258 | or t2,s1 |
259 | sh t2,JAZZ_IO_IRQ_ENABLE | 259 | sh t2,JAZZ_IO_IRQ_ENABLE |
260 | 260 | ||
261 | j ret_from_irq | 261 | j ret_from_irq |
262 | 262 | ||
263 | /* | 263 | /* |
264 | * "Jump extender" to reach spurious_interrupt | 264 | * "Jump extender" to reach spurious_interrupt |
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 292f8b243a5e..58b3b14873cb 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c | |||
@@ -291,7 +291,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c) | |||
291 | * for documentation. Commented out because it shares | 291 | * for documentation. Commented out because it shares |
292 | * it's c0_prid id number with the TX3900. | 292 | * it's c0_prid id number with the TX3900. |
293 | */ | 293 | */ |
294 | c->cputype = CPU_R4650; | 294 | c->cputype = CPU_R4650; |
295 | c->isa_level = MIPS_CPU_ISA_III; | 295 | c->isa_level = MIPS_CPU_ISA_III; |
296 | c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_LLSC; | 296 | c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_LLSC; |
297 | c->tlbsize = 48; | 297 | c->tlbsize = 48; |
@@ -604,7 +604,7 @@ static inline void cpu_probe_alchemy(struct cpuinfo_mips *c) | |||
604 | case PRID_IMP_AU1_REV2: | 604 | case PRID_IMP_AU1_REV2: |
605 | switch ((c->processor_id >> 24) & 0xff) { | 605 | switch ((c->processor_id >> 24) & 0xff) { |
606 | case 0: | 606 | case 0: |
607 | c->cputype = CPU_AU1000; | 607 | c->cputype = CPU_AU1000; |
608 | break; | 608 | break; |
609 | case 1: | 609 | case 1: |
610 | c->cputype = CPU_AU1500; | 610 | c->cputype = CPU_AU1500; |
@@ -705,7 +705,7 @@ __init void cpu_probe(void) | |||
705 | break; | 705 | break; |
706 | case PRID_COMP_PHILIPS: | 706 | case PRID_COMP_PHILIPS: |
707 | cpu_probe_philips(c); | 707 | cpu_probe_philips(c); |
708 | break; | 708 | break; |
709 | default: | 709 | default: |
710 | c->cputype = CPU_UNKNOWN; | 710 | c->cputype = CPU_UNKNOWN; |
711 | } | 711 | } |
diff --git a/arch/mips/kernel/gdb-low.S b/arch/mips/kernel/gdb-low.S index 83b8986f9401..235ad9f6bd35 100644 --- a/arch/mips/kernel/gdb-low.S +++ b/arch/mips/kernel/gdb-low.S | |||
@@ -41,7 +41,7 @@ | |||
41 | */ | 41 | */ |
42 | .align 5 | 42 | .align 5 |
43 | NESTED(trap_low, GDB_FR_SIZE, sp) | 43 | NESTED(trap_low, GDB_FR_SIZE, sp) |
44 | .set noat | 44 | .set noat |
45 | .set noreorder | 45 | .set noreorder |
46 | 46 | ||
47 | mfc0 k0, CP0_STATUS | 47 | mfc0 k0, CP0_STATUS |
diff --git a/arch/mips/kernel/signal-common.h b/arch/mips/kernel/signal-common.h index 36bfc2588aa3..3ca786215d48 100644 --- a/arch/mips/kernel/signal-common.h +++ b/arch/mips/kernel/signal-common.h | |||
@@ -166,11 +166,11 @@ get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size) | |||
166 | sp = regs->regs[29]; | 166 | sp = regs->regs[29]; |
167 | 167 | ||
168 | /* | 168 | /* |
169 | * FPU emulator may have it's own trampoline active just | 169 | * FPU emulator may have it's own trampoline active just |
170 | * above the user stack, 16-bytes before the next lowest | 170 | * above the user stack, 16-bytes before the next lowest |
171 | * 16 byte boundary. Try to avoid trashing it. | 171 | * 16 byte boundary. Try to avoid trashing it. |
172 | */ | 172 | */ |
173 | sp -= 32; | 173 | sp -= 32; |
174 | 174 | ||
175 | /* This is the X/Open sanctioned signal stack switching. */ | 175 | /* This is the X/Open sanctioned signal stack switching. */ |
176 | if ((ka->sa.sa_flags & SA_ONSTACK) && (sas_ss_flags (sp) == 0)) | 176 | if ((ka->sa.sa_flags & SA_ONSTACK) && (sas_ss_flags (sp) == 0)) |
diff --git a/arch/mips/kernel/signal32.c b/arch/mips/kernel/signal32.c index 1c7241ba6924..f32a22997c3d 100644 --- a/arch/mips/kernel/signal32.c +++ b/arch/mips/kernel/signal32.c | |||
@@ -624,11 +624,11 @@ static inline void __user *get_sigframe(struct k_sigaction *ka, | |||
624 | sp = regs->regs[29]; | 624 | sp = regs->regs[29]; |
625 | 625 | ||
626 | /* | 626 | /* |
627 | * FPU emulator may have it's own trampoline active just | 627 | * FPU emulator may have it's own trampoline active just |
628 | * above the user stack, 16-bytes before the next lowest | 628 | * above the user stack, 16-bytes before the next lowest |
629 | * 16 byte boundary. Try to avoid trashing it. | 629 | * 16 byte boundary. Try to avoid trashing it. |
630 | */ | 630 | */ |
631 | sp -= 32; | 631 | sp -= 32; |
632 | 632 | ||
633 | /* This is the X/Open sanctioned signal stack switching. */ | 633 | /* This is the X/Open sanctioned signal stack switching. */ |
634 | if ((ka->sa.sa_flags & SA_ONSTACK) && (sas_ss_flags (sp) == 0)) | 634 | if ((ka->sa.sa_flags & SA_ONSTACK) && (sas_ss_flags (sp) == 0)) |
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 005debbfbe84..bed0eb6cf55d 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c | |||
@@ -576,7 +576,7 @@ asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31) | |||
576 | } | 576 | } |
577 | #endif | 577 | #endif |
578 | /* | 578 | /* |
579 | * Unimplemented operation exception. If we've got the full | 579 | * Unimplemented operation exception. If we've got the full |
580 | * software emulator on-board, let's use it... | 580 | * software emulator on-board, let's use it... |
581 | * | 581 | * |
582 | * Force FPU to dump state into task/thread context. We're | 582 | * Force FPU to dump state into task/thread context. We're |
diff --git a/arch/mips/lasat/image/romscript.normal b/arch/mips/lasat/image/romscript.normal index ca22336f6c36..988f8ad189cb 100644 --- a/arch/mips/lasat/image/romscript.normal +++ b/arch/mips/lasat/image/romscript.normal | |||
@@ -16,7 +16,8 @@ SECTIONS | |||
16 | _image_start = ADDR(.data); | 16 | _image_start = ADDR(.data); |
17 | _image_size = SIZEOF(.data); | 17 | _image_size = SIZEOF(.data); |
18 | 18 | ||
19 | .other : { | 19 | .other : |
20 | *(.*) | 20 | { |
21 | *(.*) | ||
21 | } | 22 | } |
22 | } | 23 | } |
diff --git a/arch/mips/mips-boards/generic/mipsIRQ.S b/arch/mips/mips-boards/generic/mipsIRQ.S index a397ecb872d6..ddd5c73a2971 100644 --- a/arch/mips/mips-boards/generic/mipsIRQ.S +++ b/arch/mips/mips-boards/generic/mipsIRQ.S | |||
@@ -98,7 +98,7 @@ | |||
98 | and s0, s1 | 98 | and s0, s1 |
99 | 99 | ||
100 | #if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) | 100 | #if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) |
101 | .set mips32 | 101 | .set mips32 |
102 | clz a0, s0 | 102 | clz a0, s0 |
103 | .set mips0 | 103 | .set mips0 |
104 | negu a0 | 104 | negu a0 |
diff --git a/arch/mips/mips-boards/sim/sim_IRQ.c b/arch/mips/mips-boards/sim/sim_IRQ.c index 9987a85aabeb..5b84c7fe1022 100644 --- a/arch/mips/mips-boards/sim/sim_IRQ.c +++ b/arch/mips/mips-boards/sim/sim_IRQ.c | |||
@@ -96,7 +96,7 @@ | |||
96 | andi a0, s0, CAUSEF_IP3 # delay slot, check hw1 interrupt | 96 | andi a0, s0, CAUSEF_IP3 # delay slot, check hw1 interrupt |
97 | #else | 97 | #else |
98 | beq a0, zero, 1f # delay slot, check hw3 interrupt | 98 | beq a0, zero, 1f # delay slot, check hw3 interrupt |
99 | andi a0, s0, CAUSEF_IP5 | 99 | andi a0, s0, CAUSEF_IP5 |
100 | #endif | 100 | #endif |
101 | 101 | ||
102 | /* Wheee, combined hardware level zero interrupt. */ | 102 | /* Wheee, combined hardware level zero interrupt. */ |
diff --git a/arch/mips/mips-boards/sim/sim_irq.S b/arch/mips/mips-boards/sim/sim_irq.S index 835f0387fcd4..da52297a2216 100644 --- a/arch/mips/mips-boards/sim/sim_irq.S +++ b/arch/mips/mips-boards/sim/sim_irq.S | |||
@@ -42,7 +42,7 @@ | |||
42 | and s0, s1 | 42 | and s0, s1 |
43 | 43 | ||
44 | #if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) | 44 | #if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) |
45 | .set mips32 | 45 | .set mips32 |
46 | clz a0, s0 | 46 | clz a0, s0 |
47 | .set mips0 | 47 | .set mips0 |
48 | negu a0 | 48 | negu a0 |
diff --git a/arch/mips/mips-boards/sim/sim_smp.c b/arch/mips/mips-boards/sim/sim_smp.c index 19824359f5de..a9f0c2bfe4ad 100644 --- a/arch/mips/mips-boards/sim/sim_smp.c +++ b/arch/mips/mips-boards/sim/sim_smp.c | |||
@@ -115,7 +115,7 @@ void prom_prepare_cpus(unsigned int max_cpus) | |||
115 | #ifdef CONFIG_MIPS_MT_SMTC | 115 | #ifdef CONFIG_MIPS_MT_SMTC |
116 | void mipsmt_prepare_cpus(int c); | 116 | void mipsmt_prepare_cpus(int c); |
117 | /* | 117 | /* |
118 | * As noted above, we can assume a single CPU for now | 118 | * As noted above, we can assume a single CPU for now |
119 | * but it may be multithreaded. | 119 | * but it may be multithreaded. |
120 | */ | 120 | */ |
121 | 121 | ||
diff --git a/arch/mips/mm/c-r3k.c b/arch/mips/mm/c-r3k.c index 27f4fa25e8c9..9dd1352d5748 100644 --- a/arch/mips/mm/c-r3k.c +++ b/arch/mips/mm/c-r3k.c | |||
@@ -129,7 +129,7 @@ static void r3k_flush_icache_range(unsigned long start, unsigned long end) | |||
129 | "sb\t$0, 0x014(%0)\n\t" | 129 | "sb\t$0, 0x014(%0)\n\t" |
130 | "sb\t$0, 0x018(%0)\n\t" | 130 | "sb\t$0, 0x018(%0)\n\t" |
131 | "sb\t$0, 0x01c(%0)\n\t" | 131 | "sb\t$0, 0x01c(%0)\n\t" |
132 | "sb\t$0, 0x020(%0)\n\t" | 132 | "sb\t$0, 0x020(%0)\n\t" |
133 | "sb\t$0, 0x024(%0)\n\t" | 133 | "sb\t$0, 0x024(%0)\n\t" |
134 | "sb\t$0, 0x028(%0)\n\t" | 134 | "sb\t$0, 0x028(%0)\n\t" |
135 | "sb\t$0, 0x02c(%0)\n\t" | 135 | "sb\t$0, 0x02c(%0)\n\t" |
@@ -145,7 +145,7 @@ static void r3k_flush_icache_range(unsigned long start, unsigned long end) | |||
145 | "sb\t$0, 0x054(%0)\n\t" | 145 | "sb\t$0, 0x054(%0)\n\t" |
146 | "sb\t$0, 0x058(%0)\n\t" | 146 | "sb\t$0, 0x058(%0)\n\t" |
147 | "sb\t$0, 0x05c(%0)\n\t" | 147 | "sb\t$0, 0x05c(%0)\n\t" |
148 | "sb\t$0, 0x060(%0)\n\t" | 148 | "sb\t$0, 0x060(%0)\n\t" |
149 | "sb\t$0, 0x064(%0)\n\t" | 149 | "sb\t$0, 0x064(%0)\n\t" |
150 | "sb\t$0, 0x068(%0)\n\t" | 150 | "sb\t$0, 0x068(%0)\n\t" |
151 | "sb\t$0, 0x06c(%0)\n\t" | 151 | "sb\t$0, 0x06c(%0)\n\t" |
@@ -182,31 +182,31 @@ static void r3k_flush_dcache_range(unsigned long start, unsigned long end) | |||
182 | "sb\t$0, 0x004(%0)\n\t" | 182 | "sb\t$0, 0x004(%0)\n\t" |
183 | "sb\t$0, 0x008(%0)\n\t" | 183 | "sb\t$0, 0x008(%0)\n\t" |
184 | "sb\t$0, 0x00c(%0)\n\t" | 184 | "sb\t$0, 0x00c(%0)\n\t" |
185 | "sb\t$0, 0x010(%0)\n\t" | 185 | "sb\t$0, 0x010(%0)\n\t" |
186 | "sb\t$0, 0x014(%0)\n\t" | 186 | "sb\t$0, 0x014(%0)\n\t" |
187 | "sb\t$0, 0x018(%0)\n\t" | 187 | "sb\t$0, 0x018(%0)\n\t" |
188 | "sb\t$0, 0x01c(%0)\n\t" | 188 | "sb\t$0, 0x01c(%0)\n\t" |
189 | "sb\t$0, 0x020(%0)\n\t" | 189 | "sb\t$0, 0x020(%0)\n\t" |
190 | "sb\t$0, 0x024(%0)\n\t" | 190 | "sb\t$0, 0x024(%0)\n\t" |
191 | "sb\t$0, 0x028(%0)\n\t" | 191 | "sb\t$0, 0x028(%0)\n\t" |
192 | "sb\t$0, 0x02c(%0)\n\t" | 192 | "sb\t$0, 0x02c(%0)\n\t" |
193 | "sb\t$0, 0x030(%0)\n\t" | 193 | "sb\t$0, 0x030(%0)\n\t" |
194 | "sb\t$0, 0x034(%0)\n\t" | 194 | "sb\t$0, 0x034(%0)\n\t" |
195 | "sb\t$0, 0x038(%0)\n\t" | 195 | "sb\t$0, 0x038(%0)\n\t" |
196 | "sb\t$0, 0x03c(%0)\n\t" | 196 | "sb\t$0, 0x03c(%0)\n\t" |
197 | "sb\t$0, 0x040(%0)\n\t" | 197 | "sb\t$0, 0x040(%0)\n\t" |
198 | "sb\t$0, 0x044(%0)\n\t" | 198 | "sb\t$0, 0x044(%0)\n\t" |
199 | "sb\t$0, 0x048(%0)\n\t" | 199 | "sb\t$0, 0x048(%0)\n\t" |
200 | "sb\t$0, 0x04c(%0)\n\t" | 200 | "sb\t$0, 0x04c(%0)\n\t" |
201 | "sb\t$0, 0x050(%0)\n\t" | 201 | "sb\t$0, 0x050(%0)\n\t" |
202 | "sb\t$0, 0x054(%0)\n\t" | 202 | "sb\t$0, 0x054(%0)\n\t" |
203 | "sb\t$0, 0x058(%0)\n\t" | 203 | "sb\t$0, 0x058(%0)\n\t" |
204 | "sb\t$0, 0x05c(%0)\n\t" | 204 | "sb\t$0, 0x05c(%0)\n\t" |
205 | "sb\t$0, 0x060(%0)\n\t" | 205 | "sb\t$0, 0x060(%0)\n\t" |
206 | "sb\t$0, 0x064(%0)\n\t" | 206 | "sb\t$0, 0x064(%0)\n\t" |
207 | "sb\t$0, 0x068(%0)\n\t" | 207 | "sb\t$0, 0x068(%0)\n\t" |
208 | "sb\t$0, 0x06c(%0)\n\t" | 208 | "sb\t$0, 0x06c(%0)\n\t" |
209 | "sb\t$0, 0x070(%0)\n\t" | 209 | "sb\t$0, 0x070(%0)\n\t" |
210 | "sb\t$0, 0x074(%0)\n\t" | 210 | "sb\t$0, 0x074(%0)\n\t" |
211 | "sb\t$0, 0x078(%0)\n\t" | 211 | "sb\t$0, 0x078(%0)\n\t" |
212 | "sb\t$0, 0x07c(%0)\n\t" | 212 | "sb\t$0, 0x07c(%0)\n\t" |
diff --git a/arch/mips/momentum/jaguar_atx/reset.c b/arch/mips/momentum/jaguar_atx/reset.c index c4236b1e59fa..ce9fb2e3d952 100644 --- a/arch/mips/momentum/jaguar_atx/reset.c +++ b/arch/mips/momentum/jaguar_atx/reset.c | |||
@@ -32,7 +32,7 @@ void momenco_jaguar_restart(char *command) | |||
32 | #else | 32 | #else |
33 | void *nvram = (void*) 0xfc807000; | 33 | void *nvram = (void*) 0xfc807000; |
34 | #endif | 34 | #endif |
35 | /* Ask the NVRAM/RTC/watchdog chip to assert reset in 1/16 second */ | 35 | /* Ask the NVRAM/RTC/watchdog chip to assert reset in 1/16 second */ |
36 | writeb(0x84, nvram + 0xff7); | 36 | writeb(0x84, nvram + 0xff7); |
37 | 37 | ||
38 | /* wait for the watchdog to go off */ | 38 | /* wait for the watchdog to go off */ |
diff --git a/arch/mips/momentum/jaguar_atx/setup.c b/arch/mips/momentum/jaguar_atx/setup.c index 2699917b640a..3784c898db1a 100644 --- a/arch/mips/momentum/jaguar_atx/setup.c +++ b/arch/mips/momentum/jaguar_atx/setup.c | |||
@@ -461,7 +461,7 @@ void __init plat_setup(void) | |||
461 | unsigned int tbControl; | 461 | unsigned int tbControl; |
462 | tbControl = | 462 | tbControl = |
463 | 0 << 26 | /* post trigger delay 0 */ | 463 | 0 << 26 | /* post trigger delay 0 */ |
464 | 0x2 << 16 | /* sequential trace mode */ | 464 | 0x2 << 16 | /* sequential trace mode */ |
465 | // 0x0 << 16 | /* non-sequential trace mode */ | 465 | // 0x0 << 16 | /* non-sequential trace mode */ |
466 | // 0xf << 4 | /* watchpoints disabled */ | 466 | // 0xf << 4 | /* watchpoints disabled */ |
467 | 2 << 2 | /* armed */ | 467 | 2 << 2 | /* armed */ |
diff --git a/arch/mips/momentum/ocelot_3/reset.c b/arch/mips/momentum/ocelot_3/reset.c index 72b4423c0864..9d86d2468376 100644 --- a/arch/mips/momentum/ocelot_3/reset.c +++ b/arch/mips/momentum/ocelot_3/reset.c | |||
@@ -34,7 +34,7 @@ void momenco_ocelot_restart(char *command) | |||
34 | /* base address of timekeeper portion of part */ | 34 | /* base address of timekeeper portion of part */ |
35 | void *nvram = (void *) 0xfc807000L; | 35 | void *nvram = (void *) 0xfc807000L; |
36 | 36 | ||
37 | /* Ask the NVRAM/RTC/watchdog chip to assert reset in 1/16 second */ | 37 | /* Ask the NVRAM/RTC/watchdog chip to assert reset in 1/16 second */ |
38 | writeb(0x84, nvram + 0xff7); | 38 | writeb(0x84, nvram + 0xff7); |
39 | 39 | ||
40 | /* wait for the watchdog to go off */ | 40 | /* wait for the watchdog to go off */ |
diff --git a/arch/mips/momentum/ocelot_c/reset.c b/arch/mips/momentum/ocelot_c/reset.c index 6a2489f3b9a0..9dcd154c7767 100644 --- a/arch/mips/momentum/ocelot_c/reset.c +++ b/arch/mips/momentum/ocelot_c/reset.c | |||
@@ -34,7 +34,7 @@ void momenco_ocelot_restart(char *command) | |||
34 | 0xfc807000; | 34 | 0xfc807000; |
35 | #endif | 35 | #endif |
36 | 36 | ||
37 | /* Ask the NVRAM/RTC/watchdog chip to assert reset in 1/16 second */ | 37 | /* Ask the NVRAM/RTC/watchdog chip to assert reset in 1/16 second */ |
38 | writeb(0x84, nvram + 0xff7); | 38 | writeb(0x84, nvram + 0xff7); |
39 | 39 | ||
40 | /* wait for the watchdog to go off */ | 40 | /* wait for the watchdog to go off */ |
diff --git a/arch/mips/pci/fixup-vr4133.c b/arch/mips/pci/fixup-vr4133.c index 03a0ff2fc993..a8a47b494b23 100644 --- a/arch/mips/pci/fixup-vr4133.c +++ b/arch/mips/pci/fixup-vr4133.c | |||
@@ -45,7 +45,7 @@ int pcibios_plat_dev_init(struct pci_dev *dev) | |||
45 | 45 | ||
46 | /* | 46 | /* |
47 | * we have to open the bridges' windows down to 0 because otherwise | 47 | * we have to open the bridges' windows down to 0 because otherwise |
48 | * we cannot access ISA south bridge I/O registers that get mapped from | 48 | * we cannot access ISA south bridge I/O registers that get mapped from |
49 | * 0. for example, 8259 PIC would be unaccessible without that | 49 | * 0. for example, 8259 PIC would be unaccessible without that |
50 | */ | 50 | */ |
51 | if(dev->vendor == PCI_VENDOR_ID_INTEL && dev->device == PCI_DEVICE_ID_INTEL_S21152BB) { | 51 | if(dev->vendor == PCI_VENDOR_ID_INTEL && dev->device == PCI_DEVICE_ID_INTEL_S21152BB) { |
diff --git a/arch/mips/pci/ops-ddb5477.c b/arch/mips/pci/ops-ddb5477.c index 0406b50a37d8..8e57d4c5d90f 100644 --- a/arch/mips/pci/ops-ddb5477.c +++ b/arch/mips/pci/ops-ddb5477.c | |||
@@ -253,9 +253,9 @@ static int write_config_byte(struct pci_config_swap *swap, | |||
253 | static int prefix##_##rw##_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 star val) \ | 253 | static int prefix##_##rw##_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 star val) \ |
254 | { \ | 254 | { \ |
255 | if (size == 1) \ | 255 | if (size == 1) \ |
256 | return rw##_config_byte(pciswap, bus, devfn, where, (u8 star)val); \ | 256 | return rw##_config_byte(pciswap, bus, devfn, where, (u8 star)val); \ |
257 | else if (size == 2) \ | 257 | else if (size == 2) \ |
258 | return rw##_config_word(pciswap, bus, devfn, where, (u16 star)val); \ | 258 | return rw##_config_word(pciswap, bus, devfn, where, (u16 star)val); \ |
259 | /* Size must be 4 */ \ | 259 | /* Size must be 4 */ \ |
260 | return rw##_config_dword(pciswap, bus, devfn, where, val); \ | 260 | return rw##_config_dword(pciswap, bus, devfn, where, val); \ |
261 | } | 261 | } |
diff --git a/arch/mips/pci/ops-tx4938.c b/arch/mips/pci/ops-tx4938.c index 4c0dcfce5297..0ff083489efd 100644 --- a/arch/mips/pci/ops-tx4938.c +++ b/arch/mips/pci/ops-tx4938.c | |||
@@ -34,16 +34,16 @@ struct resource pci_mem_resource = { | |||
34 | }; | 34 | }; |
35 | 35 | ||
36 | struct resource tx4938_pcic1_pci_io_resource = { | 36 | struct resource tx4938_pcic1_pci_io_resource = { |
37 | .name = "PCI1 IO", | 37 | .name = "PCI1 IO", |
38 | .start = 0, | 38 | .start = 0, |
39 | .end = 0, | 39 | .end = 0, |
40 | .flags = IORESOURCE_IO | 40 | .flags = IORESOURCE_IO |
41 | }; | 41 | }; |
42 | struct resource tx4938_pcic1_pci_mem_resource = { | 42 | struct resource tx4938_pcic1_pci_mem_resource = { |
43 | .name = "PCI1 mem", | 43 | .name = "PCI1 mem", |
44 | .start = 0, | 44 | .start = 0, |
45 | .end = 0, | 45 | .end = 0, |
46 | .flags = IORESOURCE_MEM | 46 | .flags = IORESOURCE_MEM |
47 | }; | 47 | }; |
48 | 48 | ||
49 | static int mkaddr(int bus, int dev_fn, int where, int *flagsp) | 49 | static int mkaddr(int bus, int dev_fn, int where, int *flagsp) |
diff --git a/arch/mips/pci/pci-bcm1480.c b/arch/mips/pci/pci-bcm1480.c index ca975e7d32ff..f4ef1a35ca18 100644 --- a/arch/mips/pci/pci-bcm1480.c +++ b/arch/mips/pci/pci-bcm1480.c | |||
@@ -100,7 +100,7 @@ static int bcm1480_pci_can_access(struct pci_bus *bus, int devfn) | |||
100 | 100 | ||
101 | if (bus->number == 0) { | 101 | if (bus->number == 0) { |
102 | devno = PCI_SLOT(devfn); | 102 | devno = PCI_SLOT(devfn); |
103 | if (bcm1480_bus_status & PCI_DEVICE_MODE) | 103 | if (bcm1480_bus_status & PCI_DEVICE_MODE) |
104 | return 0; | 104 | return 0; |
105 | else | 105 | else |
106 | return 1; | 106 | return 1; |
diff --git a/arch/mips/pci/pci-bcm1480ht.c b/arch/mips/pci/pci-bcm1480ht.c index aca4a2e7a1c6..a3eebe5890a7 100644 --- a/arch/mips/pci/pci-bcm1480ht.c +++ b/arch/mips/pci/pci-bcm1480ht.c | |||
@@ -95,7 +95,7 @@ static int bcm1480ht_can_access(struct pci_bus *bus, int devfn) | |||
95 | 95 | ||
96 | if (bus->number == 0) { | 96 | if (bus->number == 0) { |
97 | devno = PCI_SLOT(devfn); | 97 | devno = PCI_SLOT(devfn); |
98 | if (bcm1480ht_bus_status & PCI_DEVICE_MODE) | 98 | if (bcm1480ht_bus_status & PCI_DEVICE_MODE) |
99 | return 0; | 99 | return 0; |
100 | } | 100 | } |
101 | return 1; | 101 | return 1; |
diff --git a/arch/mips/pci/pci-ip27.c b/arch/mips/pci/pci-ip27.c index efc96ce99eeb..6002d2a6a262 100644 --- a/arch/mips/pci/pci-ip27.c +++ b/arch/mips/pci/pci-ip27.c | |||
@@ -379,18 +379,18 @@ int __init bridge_probe(nasid_t nasid, int widget_id, int masterwid) | |||
379 | bridge = (bridge_t *) RAW_NODE_SWIN_BASE(nasid, widget_id); | 379 | bridge = (bridge_t *) RAW_NODE_SWIN_BASE(nasid, widget_id); |
380 | 380 | ||
381 | /* | 381 | /* |
382 | * Clear all pending interrupts. | 382 | * Clear all pending interrupts. |
383 | */ | 383 | */ |
384 | bridge->b_int_rst_stat = BRIDGE_IRR_ALL_CLR; | 384 | bridge->b_int_rst_stat = BRIDGE_IRR_ALL_CLR; |
385 | 385 | ||
386 | /* | 386 | /* |
387 | * Until otherwise set up, assume all interrupts are from slot 0 | 387 | * Until otherwise set up, assume all interrupts are from slot 0 |
388 | */ | 388 | */ |
389 | bridge->b_int_device = 0x0; | 389 | bridge->b_int_device = 0x0; |
390 | 390 | ||
391 | /* | 391 | /* |
392 | * swap pio's to pci mem and io space (big windows) | 392 | * swap pio's to pci mem and io space (big windows) |
393 | */ | 393 | */ |
394 | bridge->b_wid_control |= BRIDGE_CTRL_IO_SWAP | | 394 | bridge->b_wid_control |= BRIDGE_CTRL_IO_SWAP | |
395 | BRIDGE_CTRL_MEM_SWAP; | 395 | BRIDGE_CTRL_MEM_SWAP; |
396 | 396 | ||
diff --git a/arch/mips/philips/pnx8550/common/int.c b/arch/mips/philips/pnx8550/common/int.c index 546144988bf5..c500e2d41f2c 100644 --- a/arch/mips/philips/pnx8550/common/int.c +++ b/arch/mips/philips/pnx8550/common/int.c | |||
@@ -251,7 +251,7 @@ void __init arch_init_irq(void) | |||
251 | if (gic_int_line == (PNX8550_INT_GPIO0 - PNX8550_INT_GIC_MIN)) { | 251 | if (gic_int_line == (PNX8550_INT_GPIO0 - PNX8550_INT_GIC_MIN)) { |
252 | /* PCI INT through gpio 8, which is setup in | 252 | /* PCI INT through gpio 8, which is setup in |
253 | * pnx8550_setup.c and routed to GPIO | 253 | * pnx8550_setup.c and routed to GPIO |
254 | * Interrupt Level 0 (GPIO Connection 58). | 254 | * Interrupt Level 0 (GPIO Connection 58). |
255 | * Set it active low. */ | 255 | * Set it active low. */ |
256 | 256 | ||
257 | PNX8550_GIC_REQ(gic_int_line) = 0x1E020000; | 257 | PNX8550_GIC_REQ(gic_int_line) = 0x1E020000; |
diff --git a/arch/mips/sgi-ip27/ip27-memory.c b/arch/mips/sgi-ip27/ip27-memory.c index ef20d9ac0ba3..ed93a9792959 100644 --- a/arch/mips/sgi-ip27/ip27-memory.c +++ b/arch/mips/sgi-ip27/ip27-memory.c | |||
@@ -540,8 +540,8 @@ void __init mem_init(void) | |||
540 | struct page *end, *p; | 540 | struct page *end, *p; |
541 | 541 | ||
542 | /* | 542 | /* |
543 | * This will free up the bootmem, ie, slot 0 memory. | 543 | * This will free up the bootmem, ie, slot 0 memory. |
544 | */ | 544 | */ |
545 | totalram_pages += free_all_bootmem_node(NODE_DATA(node)); | 545 | totalram_pages += free_all_bootmem_node(NODE_DATA(node)); |
546 | 546 | ||
547 | /* | 547 | /* |
diff --git a/arch/mips/sgi-ip32/ip32-setup.c b/arch/mips/sgi-ip32/ip32-setup.c index 2c38770b1e1b..2f50c79b7887 100644 --- a/arch/mips/sgi-ip32/ip32-setup.c +++ b/arch/mips/sgi-ip32/ip32-setup.c | |||
@@ -98,7 +98,7 @@ void __init plat_setup(void) | |||
98 | board_timer_setup = ip32_timer_setup; | 98 | board_timer_setup = ip32_timer_setup; |
99 | 99 | ||
100 | #ifdef CONFIG_SERIAL_8250 | 100 | #ifdef CONFIG_SERIAL_8250 |
101 | { | 101 | { |
102 | static struct uart_port o2_serial[2]; | 102 | static struct uart_port o2_serial[2]; |
103 | 103 | ||
104 | memset(o2_serial, 0, sizeof(o2_serial)); | 104 | memset(o2_serial, 0, sizeof(o2_serial)); |
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c index e19e2be70f76..efe50562f0ce 100644 --- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c +++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c | |||
@@ -70,10 +70,10 @@ void __init prom_init(void) | |||
70 | 70 | ||
71 | if ((read_c0_prid() & 0xff) == PRID_REV_TX4927) { | 71 | if ((read_c0_prid() & 0xff) == PRID_REV_TX4927) { |
72 | mips_machtype = MACH_TOSHIBA_RBTX4927; | 72 | mips_machtype = MACH_TOSHIBA_RBTX4927; |
73 | toshiba_name = "TX4927"; | 73 | toshiba_name = "TX4927"; |
74 | } else { | 74 | } else { |
75 | mips_machtype = MACH_TOSHIBA_RBTX4937; | 75 | mips_machtype = MACH_TOSHIBA_RBTX4937; |
76 | toshiba_name = "TX4937"; | 76 | toshiba_name = "TX4937"; |
77 | } | 77 | } |
78 | 78 | ||
79 | msize = tx4927_get_mem_size(); | 79 | msize = tx4927_get_mem_size(); |
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/setup.c b/arch/mips/tx4938/toshiba_rbtx4938/setup.c index 5c7ace982a49..9166cd4557eb 100644 --- a/arch/mips/tx4938/toshiba_rbtx4938/setup.c +++ b/arch/mips/tx4938/toshiba_rbtx4938/setup.c | |||
@@ -684,7 +684,7 @@ void __init tx4938_board_setup(void) | |||
684 | for (i = 0; i < 8; i++) { | 684 | for (i = 0; i < 8; i++) { |
685 | if (!(tx4938_ebuscptr->cr[i] & 0x8)) | 685 | if (!(tx4938_ebuscptr->cr[i] & 0x8)) |
686 | continue; /* disabled */ | 686 | continue; /* disabled */ |
687 | rbtx4938_ce_base[i] = (unsigned long)TX4938_EBUSC_BA(i); | 687 | rbtx4938_ce_base[i] = (unsigned long)TX4938_EBUSC_BA(i); |
688 | txboard_add_phys_region(rbtx4938_ce_base[i], TX4938_EBUSC_SIZE(i)); | 688 | txboard_add_phys_region(rbtx4938_ce_base[i], TX4938_EBUSC_SIZE(i)); |
689 | } | 689 | } |
690 | 690 | ||
diff --git a/arch/mips/vr41xx/common/bcu.c b/arch/mips/vr41xx/common/bcu.c index de0c1b35f11c..ff272b2e8395 100644 --- a/arch/mips/vr41xx/common/bcu.c +++ b/arch/mips/vr41xx/common/bcu.c | |||
@@ -183,11 +183,11 @@ static inline unsigned long calculate_tclock(uint16_t clkspeed, unsigned long pc | |||
183 | switch (current_cpu_data.cputype) { | 183 | switch (current_cpu_data.cputype) { |
184 | case CPU_VR4111: | 184 | case CPU_VR4111: |
185 | if (!(clkspeed & DIV2B)) | 185 | if (!(clkspeed & DIV2B)) |
186 | tclock = pclock / 2; | 186 | tclock = pclock / 2; |
187 | else if (!(clkspeed & DIV3B)) | 187 | else if (!(clkspeed & DIV3B)) |
188 | tclock = pclock / 3; | 188 | tclock = pclock / 3; |
189 | else if (!(clkspeed & DIV4B)) | 189 | else if (!(clkspeed & DIV4B)) |
190 | tclock = pclock / 4; | 190 | tclock = pclock / 4; |
191 | break; | 191 | break; |
192 | case CPU_VR4121: | 192 | case CPU_VR4121: |
193 | tclock = pclock / DIVT(clkspeed); | 193 | tclock = pclock / DIVT(clkspeed); |