diff options
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/sgi-ip22/ip22-nvram.c | 40 |
1 files changed, 21 insertions, 19 deletions
diff --git a/arch/mips/sgi-ip22/ip22-nvram.c b/arch/mips/sgi-ip22/ip22-nvram.c index e19d60d5fcc1..0177566475d4 100644 --- a/arch/mips/sgi-ip22/ip22-nvram.c +++ b/arch/mips/sgi-ip22/ip22-nvram.c | |||
@@ -32,19 +32,19 @@ | |||
32 | for (x=0; x<100000; x++) __asm__ __volatile__(""); }) | 32 | for (x=0; x<100000; x++) __asm__ __volatile__(""); }) |
33 | 33 | ||
34 | #define eeprom_cs_on(ptr) ({ \ | 34 | #define eeprom_cs_on(ptr) ({ \ |
35 | *ptr &= ~EEPROM_DATO; \ | 35 | __raw_writel(__raw_readl(ptr) & ~EEPROM_DATO, ptr); \ |
36 | *ptr &= ~EEPROM_ECLK; \ | 36 | __raw_writel(__raw_readl(ptr) & ~EEPROM_ECLK, ptr); \ |
37 | *ptr &= ~EEPROM_EPROT; \ | 37 | __raw_writel(__raw_readl(ptr) & ~EEPROM_EPROT, ptr); \ |
38 | delay(); \ | 38 | delay(); \ |
39 | *ptr |= EEPROM_CSEL; \ | 39 | __raw_writel(__raw_readl(ptr) | EEPROM_CSEL, ptr); \ |
40 | *ptr |= EEPROM_ECLK; }) | 40 | __raw_writel(__raw_readl(ptr) | EEPROM_ECLK, ptr); }) |
41 | 41 | ||
42 | 42 | ||
43 | #define eeprom_cs_off(ptr) ({ \ | 43 | #define eeprom_cs_off(ptr) ({ \ |
44 | *ptr &= ~EEPROM_ECLK; \ | 44 | __raw_writel(__raw_readl(ptr) & ~EEPROM_ECLK, ptr); \ |
45 | *ptr &= ~EEPROM_CSEL; \ | 45 | __raw_writel(__raw_readl(ptr) & ~EEPROM_CSEL, ptr); \ |
46 | *ptr |= EEPROM_EPROT; \ | 46 | __raw_writel(__raw_readl(ptr) | EEPROM_EPROT, ptr); \ |
47 | *ptr |= EEPROM_ECLK; }) | 47 | __raw_writel(__raw_readl(ptr) | EEPROM_ECLK, ptr); }) |
48 | 48 | ||
49 | #define BITS_IN_COMMAND 11 | 49 | #define BITS_IN_COMMAND 11 |
50 | /* | 50 | /* |
@@ -60,15 +60,17 @@ static inline void eeprom_cmd(unsigned int *ctrl, unsigned cmd, unsigned reg) | |||
60 | ser_cmd = cmd | (reg << (16 - BITS_IN_COMMAND)); | 60 | ser_cmd = cmd | (reg << (16 - BITS_IN_COMMAND)); |
61 | for (i = 0; i < BITS_IN_COMMAND; i++) { | 61 | for (i = 0; i < BITS_IN_COMMAND; i++) { |
62 | if (ser_cmd & (1<<15)) /* if high order bit set */ | 62 | if (ser_cmd & (1<<15)) /* if high order bit set */ |
63 | writel(readl(ctrl) | EEPROM_DATO, ctrl); | 63 | __raw_writel(__raw_readl(ctrl) | EEPROM_DATO, ctrl); |
64 | else | 64 | else |
65 | writel(readl(ctrl) & ~EEPROM_DATO, ctrl); | 65 | __raw_writel(__raw_readl(ctrl) & ~EEPROM_DATO, ctrl); |
66 | writel(readl(ctrl) & ~EEPROM_ECLK, ctrl); | 66 | __raw_writel(__raw_readl(ctrl) & ~EEPROM_ECLK, ctrl); |
67 | writel(readl(ctrl) | EEPROM_ECLK, ctrl); | 67 | delay(); |
68 | __raw_writel(__raw_readl(ctrl) | EEPROM_ECLK, ctrl); | ||
69 | delay(); | ||
68 | ser_cmd <<= 1; | 70 | ser_cmd <<= 1; |
69 | } | 71 | } |
70 | /* see data sheet timing diagram */ | 72 | /* see data sheet timing diagram */ |
71 | writel(readl(ctrl) & ~EEPROM_DATO, ctrl); | 73 | __raw_writel(__raw_readl(ctrl) & ~EEPROM_DATO, ctrl); |
72 | } | 74 | } |
73 | 75 | ||
74 | unsigned short ip22_eeprom_read(unsigned int *ctrl, int reg) | 76 | unsigned short ip22_eeprom_read(unsigned int *ctrl, int reg) |
@@ -76,18 +78,18 @@ unsigned short ip22_eeprom_read(unsigned int *ctrl, int reg) | |||
76 | unsigned short res = 0; | 78 | unsigned short res = 0; |
77 | int i; | 79 | int i; |
78 | 80 | ||
79 | writel(readl(ctrl) & ~EEPROM_EPROT, ctrl); | 81 | __raw_writel(__raw_readl(ctrl) & ~EEPROM_EPROT, ctrl); |
80 | eeprom_cs_on(ctrl); | 82 | eeprom_cs_on(ctrl); |
81 | eeprom_cmd(ctrl, EEPROM_READ, reg); | 83 | eeprom_cmd(ctrl, EEPROM_READ, reg); |
82 | 84 | ||
83 | /* clock the data ouf of serial mem */ | 85 | /* clock the data ouf of serial mem */ |
84 | for (i = 0; i < 16; i++) { | 86 | for (i = 0; i < 16; i++) { |
85 | writel(readl(ctrl) & ~EEPROM_ECLK, ctrl); | 87 | __raw_writel(__raw_readl(ctrl) & ~EEPROM_ECLK, ctrl); |
86 | delay(); | 88 | delay(); |
87 | writel(readl(ctrl) | EEPROM_ECLK, ctrl); | 89 | __raw_writel(__raw_readl(ctrl) | EEPROM_ECLK, ctrl); |
88 | delay(); | 90 | delay(); |
89 | res <<= 1; | 91 | res <<= 1; |
90 | if (readl(ctrl) & EEPROM_DATI) | 92 | if (__raw_readl(ctrl) & EEPROM_DATI) |
91 | res |= 1; | 93 | res |= 1; |
92 | } | 94 | } |
93 | 95 | ||