32 files changed, 82 insertions, 332 deletions

diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 9b4cb00407d7..0be318609fc6 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -286,11 +286,11 @@ CLEAN_FILES += vmlinux.32 vmlinux.64
 archprepare:
 ifdef CONFIG_MIPS32_N32
         @echo '  Checking missing-syscalls for N32'
-        $(Q)$(MAKE) $(build)=. missing-syscalls ccflags-y="-mabi=n32"
+        $(Q)$(MAKE) $(build)=. missing-syscalls missing_syscalls_flags="-mabi=n32"
 endif
 ifdef CONFIG_MIPS32_O32
         @echo '  Checking missing-syscalls for O32'
-        $(Q)$(MAKE) $(build)=. missing-syscalls ccflags-y="-mabi=32"
+        $(Q)$(MAKE) $(build)=. missing-syscalls missing_syscalls_flags="-mabi=32"
 endif
 
 install:
diff --git a/arch/mips/cavium-octeon/flash_setup.c b/arch/mips/cavium-octeon/flash_setup.c
index 975c20327bb1..0a430e06f5e5 100644
--- a/arch/mips/cavium-octeon/flash_setup.c
+++ b/arch/mips/cavium-octeon/flash_setup.c
@@ -17,8 +17,6 @@
 
 static struct map_info flash_map;
 static struct mtd_info *mymtd;
-static int nr_parts;
-static struct mtd_partition *parts;
 static const char *part_probe_types[] = {
         "cmdlinepart",
 #ifdef CONFIG_MTD_REDBOOT_PARTS
@@ -61,11 +59,8 @@ static int __init flash_init(void)
                 mymtd = do_map_probe("cfi_probe", &flash_map);
                 if (mymtd) {
                         mymtd->owner = THIS_MODULE;
-
-                        nr_parts = parse_mtd_partitions(mymtd,
-                                                        part_probe_types,
-                                                        &parts, 0);
-                        mtd_device_register(mymtd, parts, nr_parts);
+                        mtd_device_parse_register(mymtd, part_probe_types,
+                                                  0, NULL, 0);
                 } else {
                         pr_err("Failed to register MTD device for flash\n");
                 }
diff --git a/arch/mips/cavium-octeon/smp.c b/arch/mips/cavium-octeon/smp.c
index 8b606423bbd7..efcfff4d4627 100644
--- a/arch/mips/cavium-octeon/smp.c
+++ b/arch/mips/cavium-octeon/smp.c
@@ -207,8 +207,9 @@ void octeon_prepare_cpus(unsigned int max_cpus)
          * the other bits alone.
          */
         cvmx_write_csr(CVMX_CIU_MBOX_CLRX(cvmx_get_core_num()), 0xffff);
-        if (request_irq(OCTEON_IRQ_MBOX0, mailbox_interrupt, IRQF_DISABLED,
-                        "SMP-IPI", mailbox_interrupt)) {
+        if (request_irq(OCTEON_IRQ_MBOX0, mailbox_interrupt,
+                        IRQF_PERCPU | IRQF_NO_THREAD, "SMP-IPI",
+                        mailbox_interrupt)) {
                 panic("Cannot request_irq(OCTEON_IRQ_MBOX0)\n");
         }
 }
diff --git a/arch/mips/emma/common/prom.c b/arch/mips/emma/common/prom.c
index 708f08761406..cae42259d6da 100644
--- a/arch/mips/emma/common/prom.c
+++ b/arch/mips/emma/common/prom.c
@@ -50,7 +50,7 @@ void __init prom_init(void)
 
         /* arg[0] is "g", the rest is boot parameters */
         for (i = 1; i < argc; i++) {
-                if (strlen(arcs_cmdline) + strlen(arg[i] + 1)
+                if (strlen(arcs_cmdline) + strlen(arg[i]) + 1
                     >= sizeof(arcs_cmdline))
                         break;
                 strcat(arcs_cmdline, arg[i]);
diff --git a/arch/mips/include/asm/mach-bcm47xx/gpio.h b/arch/mips/include/asm/mach-bcm47xx/gpio.h
index 76961cabeedf..2ef17e8df403 100644
--- a/arch/mips/include/asm/mach-bcm47xx/gpio.h
+++ b/arch/mips/include/asm/mach-bcm47xx/gpio.h
@@ -36,6 +36,8 @@ static inline int gpio_get_value(unsigned gpio)
         return -EINVAL;
 }
 
+#define gpio_get_value_cansleep gpio_get_value
+
 static inline void gpio_set_value(unsigned gpio, int value)
 {
         switch (bcm47xx_bus_type) {
@@ -54,6 +56,19 @@ static inline void gpio_set_value(unsigned gpio, int value)
         }
 }
 
+#define gpio_set_value_cansleep gpio_set_value
+
+static inline int gpio_cansleep(unsigned gpio)
+{
+        return 0;
+}
+
+static inline int gpio_is_valid(unsigned gpio)
+{
+        return gpio < (BCM47XX_EXTIF_GPIO_LINES + BCM47XX_CHIPCO_GPIO_LINES);
+}
+
+
 static inline int gpio_direction_input(unsigned gpio)
 {
         switch (bcm47xx_bus_type) {
@@ -137,7 +152,4 @@ static inline int gpio_polarity(unsigned gpio, int value)
 }
 
 
-/* cansleep wrappers */
-#include <asm-generic/gpio.h>
-
 #endif /* __BCM47XX_GPIO_H */
diff --git a/arch/mips/include/asm/unistd.h b/arch/mips/include/asm/unistd.h
index ecea7871dec2..d8dad5340ea3 100644
--- a/arch/mips/include/asm/unistd.h
+++ b/arch/mips/include/asm/unistd.h
@@ -365,16 +365,18 @@
 #define __NR_syncfs                     (__NR_Linux + 342)
 #define __NR_sendmmsg                   (__NR_Linux + 343)
 #define __NR_setns                      (__NR_Linux + 344)
+#define __NR_process_vm_readv           (__NR_Linux + 345)
+#define __NR_process_vm_writev          (__NR_Linux + 346)
 
 /*
  * Offset of the last Linux o32 flavoured syscall
  */
-#define __NR_Linux_syscalls             344
+#define __NR_Linux_syscalls             346
 
 #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
 
 #define __NR_O32_Linux                  4000
-#define __NR_O32_Linux_syscalls         344
+#define __NR_O32_Linux_syscalls         346
 
 #if _MIPS_SIM == _MIPS_SIM_ABI64
 
@@ -686,16 +688,18 @@
 #define __NR_syncfs                     (__NR_Linux + 301)
 #define __NR_sendmmsg                   (__NR_Linux + 302)
 #define __NR_setns                      (__NR_Linux + 303)
+#define __NR_process_vm_readv           (__NR_Linux + 304)
+#define __NR_process_vm_writev          (__NR_Linux + 305)
 
 /*
  * Offset of the last Linux 64-bit flavoured syscall
  */
-#define __NR_Linux_syscalls             303
+#define __NR_Linux_syscalls             305
 
 #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
 
 #define __NR_64_Linux                   5000
-#define __NR_64_Linux_syscalls          303
+#define __NR_64_Linux_syscalls          305
 
 #if _MIPS_SIM == _MIPS_SIM_NABI32
 
@@ -1012,16 +1016,18 @@
 #define __NR_syncfs                     (__NR_Linux + 306)
 #define __NR_sendmmsg                   (__NR_Linux + 307)
 #define __NR_setns                      (__NR_Linux + 308)
+#define __NR_process_vm_readv           (__NR_Linux + 309)
+#define __NR_process_vm_writev          (__NR_Linux + 310)
 
 /*
  * Offset of the last N32 flavoured syscall
  */
-#define __NR_Linux_syscalls             308
+#define __NR_Linux_syscalls             310
 
 #endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
 
 #define __NR_N32_Linux                  6000
-#define __NR_N32_Linux_syscalls         308
+#define __NR_N32_Linux_syscalls         310
 
 #ifdef __KERNEL__
 
diff --git a/arch/mips/kernel/cevt-r4k.c b/arch/mips/kernel/cevt-r4k.c
index 98c5a9737c14..e2d8e199be32 100644
--- a/arch/mips/kernel/cevt-r4k.c
+++ b/arch/mips/kernel/cevt-r4k.c
@@ -103,19 +103,10 @@ static int c0_compare_int_pending(void)
 
 /*
  * Compare interrupt can be routed and latched outside the core,
- * so a single execution hazard barrier may not be enough to give
- * it time to clear as seen in the Cause register.  4 time the
- * pipeline depth seems reasonably conservative, and empirically
- * works better in configurations with high CPU/bus clock ratios.
+ * so wait up to worst case number of cycle counter ticks for timer interrupt
+ * changes to propagate to the cause register.
  */
-
-#define compare_change_hazard() \
-        do { \
-                irq_disable_hazard(); \
-                irq_disable_hazard(); \
-                irq_disable_hazard(); \
-                irq_disable_hazard(); \
-        } while (0)
+#define COMPARE_INT_SEEN_TICKS 50
 
 int c0_compare_int_usable(void)
 {
@@ -126,8 +117,12 @@ int c0_compare_int_usable(void)
          * IP7 already pending?  Try to clear it by acking the timer.
          */
         if (c0_compare_int_pending()) {
-                write_c0_compare(read_c0_count());
-                compare_change_hazard();
+                cnt = read_c0_count();
+                write_c0_compare(cnt);
+                back_to_back_c0_hazard();
+                while (read_c0_count() < (cnt  + COMPARE_INT_SEEN_TICKS))
+                        if (!c0_compare_int_pending())
+                                break;
                 if (c0_compare_int_pending())
                         return 0;
         }
@@ -136,7 +131,7 @@ int c0_compare_int_usable(void)
                 cnt = read_c0_count();
                 cnt += delta;
                 write_c0_compare(cnt);
-                compare_change_hazard();
+                back_to_back_c0_hazard();
                 if ((int)(read_c0_count() - cnt) < 0)
                     break;
                 /* increase delta if the timer was already expired */
@@ -145,12 +140,17 @@ int c0_compare_int_usable(void)
         while ((int)(read_c0_count() - cnt) <= 0)
                 ;       /* Wait for expiry  */
 
-        compare_change_hazard();
+        while (read_c0_count() < (cnt + COMPARE_INT_SEEN_TICKS))
+                if (c0_compare_int_pending())
+                        break;
         if (!c0_compare_int_pending())
                 return 0;
-
-        write_c0_compare(read_c0_count());
-        compare_change_hazard();
+        cnt = read_c0_count();
+        write_c0_compare(cnt);
+        back_to_back_c0_hazard();
+        while (read_c0_count() < (cnt + COMPARE_INT_SEEN_TICKS))
+                if (!c0_compare_int_pending())
+                        break;
         if (c0_compare_int_pending())
                 return 0;
 
diff --git a/arch/mips/kernel/cpufreq/loongson2_clock.c b/arch/mips/kernel/cpufreq/loongson2_clock.c
index cefc6e259baf..5426779d9fdb 100644
--- a/arch/mips/kernel/cpufreq/loongson2_clock.c
+++ b/arch/mips/kernel/cpufreq/loongson2_clock.c
@@ -7,6 +7,7 @@
  * for more details.
  */
 
+#include <linux/module.h>
 #include <linux/cpufreq.h>
 #include <linux/platform_device.h>
 
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index 47920657968d..a632bc144efa 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -591,6 +591,8 @@ einval:	li	v0, -ENOSYS
         sys     sys_syncfs              1
         sys     sys_sendmmsg            4
         sys     sys_setns               2
+        sys     sys_process_vm_readv    6       /* 4345 */
+        sys     sys_process_vm_writev   6
         .endm
 
         /* We pre-compute the number of _instruction_ bytes needed to
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index fb7334bea731..3b5a5e9ae49c 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -430,4 +430,6 @@ sys_call_table:
         PTR     sys_syncfs
         PTR     sys_sendmmsg
         PTR     sys_setns
+        PTR     sys_process_vm_readv
+        PTR     sys_process_vm_writev           /* 5305 */
         .size   sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index 6de1f598346e..6be6f7020923 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -430,4 +430,6 @@ EXPORT(sysn32_call_table)
         PTR     sys_syncfs
         PTR     compat_sys_sendmmsg
         PTR     sys_setns
+        PTR     compat_sys_process_vm_readv
+        PTR     compat_sys_process_vm_writev    /* 6310 */
         .size   sysn32_call_table,.-sysn32_call_table
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index 1d813169e453..54228553691d 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -548,4 +548,6 @@ sys_call_table:
         PTR     sys_syncfs
         PTR     compat_sys_sendmmsg
         PTR     sys_setns
+        PTR     compat_sys_process_vm_readv     /* 4345 */
+        PTR     compat_sys_process_vm_writev
         .size   sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 261ccbc07740..5c8a49d55054 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1596,7 +1596,8 @@ void __cpuinit per_cpu_trap_init(void)
         }
 #endif /* CONFIG_MIPS_MT_SMTC */
 
-        cpu_data[cpu].asid_cache = ASID_FIRST_VERSION;
+        if (!cpu_data[cpu].asid_cache)
+                cpu_data[cpu].asid_cache = ASID_FIRST_VERSION;
 
         atomic_inc(&init_mm.mm_count);
         current->active_mm = &init_mm;
diff --git a/arch/mips/lantiq/clk.c b/arch/mips/lantiq/clk.c
index 7e9c0ffc11a5..77ed70fc2fe5 100644
--- a/arch/mips/lantiq/clk.c
+++ b/arch/mips/lantiq/clk.c
@@ -7,7 +7,7 @@
  * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
  */
 #include <linux/io.h>
-#include <linux/module.h>
+#include <linux/export.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/types.h>
diff --git a/arch/mips/lantiq/devices.c b/arch/mips/lantiq/devices.c
index 44a36771c819..de1cb2bcd79a 100644
--- a/arch/mips/lantiq/devices.c
+++ b/arch/mips/lantiq/devices.c
@@ -7,7 +7,7 @@
  */
 
 #include <linux/init.h>
-#include <linux/module.h>
+#include <linux/export.h>
 #include <linux/types.h>
 #include <linux/string.h>
 #include <linux/kernel.h>
diff --git a/arch/mips/lantiq/prom.c b/arch/mips/lantiq/prom.c
index 56ba007bf1e5..e34fcfd0d5ca 100644
--- a/arch/mips/lantiq/prom.c
+++ b/arch/mips/lantiq/prom.c
@@ -6,7 +6,7 @@
  * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
  */
 
-#include <linux/module.h>
+#include <linux/export.h>
 #include <linux/clk.h>
 #include <asm/bootinfo.h>
 #include <asm/time.h>
diff --git a/arch/mips/lantiq/setup.c b/arch/mips/lantiq/setup.c
index 9b8af77ed0f9..1ff6c9d6cb93 100644
--- a/arch/mips/lantiq/setup.c
+++ b/arch/mips/lantiq/setup.c
@@ -7,7 +7,7 @@
  */
 
 #include <linux/kernel.h>
-#include <linux/module.h>
+#include <linux/export.h>
 #include <linux/io.h>
 #include <linux/ioport.h>
 #include <asm/bootinfo.h>
diff --git a/arch/mips/lantiq/xway/clk-ase.c b/arch/mips/lantiq/xway/clk-ase.c
index 22d823acd536..652258309c9c 100644
--- a/arch/mips/lantiq/xway/clk-ase.c
+++ b/arch/mips/lantiq/xway/clk-ase.c
@@ -7,7 +7,7 @@
  */
 
 #include <linux/io.h>
-#include <linux/module.h>
+#include <linux/export.h>
 #include <linux/init.h>
 #include <linux/clk.h>
 
diff --git a/arch/mips/lantiq/xway/clk-xway.c b/arch/mips/lantiq/xway/clk-xway.c
index ddd39593c581..696b1a3e0642 100644
--- a/arch/mips/lantiq/xway/clk-xway.c
+++ b/arch/mips/lantiq/xway/clk-xway.c
@@ -7,7 +7,7 @@
  */
 
 #include <linux/io.h>
-#include <linux/module.h>
+#include <linux/export.h>
 #include <linux/init.h>
 #include <linux/clk.h>
 
diff --git a/arch/mips/lantiq/xway/devices.c b/arch/mips/lantiq/xway/devices.c
index d0e32ab2ea07..d614aa7ff07f 100644
--- a/arch/mips/lantiq/xway/devices.c
+++ b/arch/mips/lantiq/xway/devices.c
@@ -7,7 +7,7 @@
  */
 
 #include <linux/init.h>
-#include <linux/module.h>
+#include <linux/export.h>
 #include <linux/types.h>
 #include <linux/string.h>
 #include <linux/mtd/physmap.h>
diff --git a/arch/mips/lantiq/xway/dma.c b/arch/mips/lantiq/xway/dma.c
index 4278a459d6c4..cbb6ae5747b9 100644
--- a/arch/mips/lantiq/xway/dma.c
+++ b/arch/mips/lantiq/xway/dma.c
@@ -19,6 +19,7 @@
 #include <linux/platform_device.h>
 #include <linux/io.h>
 #include <linux/dma-mapping.h>
+#include <linux/export.h>
 
 #include <lantiq_soc.h>
 #include <xway_dma.h>
diff --git a/arch/mips/lantiq/xway/gpio.c b/arch/mips/lantiq/xway/gpio.c
index a321451a5455..d2fa98f3c78d 100644
--- a/arch/mips/lantiq/xway/gpio.c
+++ b/arch/mips/lantiq/xway/gpio.c
@@ -7,7 +7,7 @@
  */
 
 #include <linux/slab.h>
-#include <linux/module.h>
+#include <linux/export.h>
 #include <linux/platform_device.h>
 #include <linux/gpio.h>
 #include <linux/ioport.h>
diff --git a/arch/mips/lantiq/xway/gpio_ebu.c b/arch/mips/lantiq/xway/gpio_ebu.c
index a479355abdb9..b91c7f17f10f 100644
--- a/arch/mips/lantiq/xway/gpio_ebu.c
+++ b/arch/mips/lantiq/xway/gpio_ebu.c
@@ -7,7 +7,7 @@
  */
 
 #include <linux/init.h>
-#include <linux/module.h>
+#include <linux/export.h>
 #include <linux/types.h>
 #include <linux/platform_device.h>
 #include <linux/mutex.h>
diff --git a/arch/mips/lantiq/xway/gpio_stp.c b/arch/mips/lantiq/xway/gpio_stp.c
index 67d59d690340..ff9991cddeaa 100644
--- a/arch/mips/lantiq/xway/gpio_stp.c
+++ b/arch/mips/lantiq/xway/gpio_stp.c
@@ -9,7 +9,7 @@
 
 #include <linux/slab.h>
 #include <linux/init.h>
-#include <linux/module.h>
+#include <linux/export.h>
 #include <linux/types.h>
 #include <linux/platform_device.h>
 #include <linux/mutex.h>
diff --git a/arch/mips/lantiq/xway/prom-ase.c b/arch/mips/lantiq/xway/prom-ase.c
index abe49f4db57f..ae4959ae865c 100644
--- a/arch/mips/lantiq/xway/prom-ase.c
+++ b/arch/mips/lantiq/xway/prom-ase.c
@@ -6,7 +6,7 @@
  *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
  */
 
-#include <linux/module.h>
+#include <linux/export.h>
 #include <linux/clk.h>
 #include <asm/bootinfo.h>
 #include <asm/time.h>
diff --git a/arch/mips/lantiq/xway/prom-xway.c b/arch/mips/lantiq/xway/prom-xway.c
index 1686692ac24d..2228133ca356 100644
--- a/arch/mips/lantiq/xway/prom-xway.c
+++ b/arch/mips/lantiq/xway/prom-xway.c
@@ -6,7 +6,7 @@
  *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
  */
 
-#include <linux/module.h>
+#include <linux/export.h>
 #include <linux/clk.h>
 #include <asm/bootinfo.h>
 #include <asm/time.h>
diff --git a/arch/mips/lantiq/xway/reset.c b/arch/mips/lantiq/xway/reset.c
index a1be36d0e490..3d41f0bb5bf7 100644
--- a/arch/mips/lantiq/xway/reset.c
+++ b/arch/mips/lantiq/xway/reset.c
@@ -10,7 +10,7 @@
 #include <linux/io.h>
 #include <linux/ioport.h>
 #include <linux/pm.h>
-#include <linux/module.h>
+#include <linux/export.h>
 #include <asm/reboot.h>
 
 #include <lantiq_soc.h>
diff --git a/arch/mips/nxp/pnx8550/common/pci.c b/arch/mips/nxp/pnx8550/common/pci.c
deleted file mode 100644
index 98e86ddb86cc..000000000000
--- a/arch/mips/nxp/pnx8550/common/pci.c
+++ /dev/null
@@ -1,134 +0,0 @@
-/*
- *
- * BRIEF MODULE DESCRIPTION
- *
- * Author: source@mvista.com
- *
- *  This program is free software; you can distribute it and/or modify it
- *  under the terms of the GNU General Public License (Version 2) as
- *  published by the Free Software Foundation.
- *
- *  This program is distributed in the hope it will be useful, but WITHOUT
- *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- *  for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- */
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <pci.h>
-#include <glb.h>
-#include <nand.h>
-
-static struct resource pci_io_resource = {
-        .start  = PNX8550_PCIIO + 0x1000,       /* reserve regacy I/O space */
-        .end    = PNX8550_PCIIO + PNX8550_PCIIO_SIZE,
-        .name   = "pci IO space",
-        .flags  = IORESOURCE_IO
-};
-
-static struct resource pci_mem_resource = {
-        .start  = PNX8550_PCIMEM,
-        .end    = PNX8550_PCIMEM + PNX8550_PCIMEM_SIZE - 1,
-        .name   = "pci memory space",
-        .flags  = IORESOURCE_MEM
-};
-
-extern struct pci_ops pnx8550_pci_ops;
-
-static struct pci_controller pnx8550_controller = {
-        .pci_ops        = &pnx8550_pci_ops,
-        .io_map_base    = PNX8550_PORT_BASE,
-        .io_resource    = &pci_io_resource,
-        .mem_resource   = &pci_mem_resource,
-};
-
-/* Return the total size of DRAM-memory, (RANK0 + RANK1) */
-static inline unsigned long get_system_mem_size(void)
-{
-        /* Read IP2031_RANK0_ADDR_LO */
-        unsigned long dram_r0_lo = inl(PCI_BASE | 0x65010);
-        /* Read IP2031_RANK1_ADDR_HI */
-        unsigned long dram_r1_hi = inl(PCI_BASE | 0x65018);
-
-        return dram_r1_hi - dram_r0_lo + 1;
-}
-
-static int __init pnx8550_pci_setup(void)
-{
-        int pci_mem_code;
-        int mem_size = get_system_mem_size() >> 20;
-
-        /* Clear the Global 2 Register, PCI Inta Output Enable Registers
-           Bit 1:Enable DAC Powerdown
-          -> 0:DACs are enabled and are working normally
-             1:DACs are powerdown
-           Bit 0:Enable of PCI inta output
-          -> 0 = Disable PCI inta output
-             1 = Enable PCI inta output
-        */
-        PNX8550_GLB2_ENAB_INTA_O = 0;
-
-        /* Calc the PCI mem size code */
-        if (mem_size >= 128)
-                pci_mem_code = SIZE_128M;
-        else if (mem_size >= 64)
-                pci_mem_code = SIZE_64M;
-        else if (mem_size >= 32)
-                pci_mem_code = SIZE_32M;
-        else
-                pci_mem_code = SIZE_16M;
-
-        /* Set PCI_XIO registers */
-        outl(pci_mem_resource.start, PCI_BASE | PCI_BASE1_LO);
-        outl(pci_mem_resource.end + 1, PCI_BASE | PCI_BASE1_HI);
-        outl(pci_io_resource.start, PCI_BASE | PCI_BASE2_LO);
-        outl(pci_io_resource.end, PCI_BASE | PCI_BASE2_HI);
-
-        /* Send memory transaction via PCI_BASE2 */
-        outl(0x00000001, PCI_BASE | PCI_IO);
-
-        /* Unlock the setup register */
-        outl(0xca, PCI_BASE | PCI_UNLOCKREG);
-
-        /*
-         * BAR0 of PNX8550 (pci base 10) must be zero in order for ide
-         * to work, and in order for bus_to_baddr to work without any
-         * hacks.
-         */
-        outl(0x00000000, PCI_BASE | PCI_BASE10);
-
-        /*
-         *These two bars are set by default or the boot code.
-         * However, it's safer to set them here so we're not boot
-         * code dependent.
-         */
-        outl(0x1be00000, PCI_BASE | PCI_BASE14);  /* PNX MMIO */
-        outl(PNX8550_NAND_BASE_ADDR, PCI_BASE | PCI_BASE18);  /* XIO      */
-
-        outl(PCI_EN_TA |
-             PCI_EN_PCI2MMI |
-             PCI_EN_XIO |
-             PCI_SETUP_BASE18_SIZE(SIZE_32M) |
-             PCI_SETUP_BASE18_EN |
-             PCI_SETUP_BASE14_EN |
-             PCI_SETUP_BASE10_PREF |
-             PCI_SETUP_BASE10_SIZE(pci_mem_code) |
-             PCI_SETUP_CFGMANAGE_EN |
-             PCI_SETUP_PCIARB_EN,
-             PCI_BASE |
-             PCI_SETUP);        /* PCI_SETUP */
-        outl(0x00000000, PCI_BASE | PCI_CTRL);  /* PCI_CONTROL */
-
-        register_pci_controller(&pnx8550_controller);
-
-        return 0;
-}
-
-arch_initcall(pnx8550_pci_setup);
diff --git a/arch/mips/nxp/pnx8550/common/setup.c b/arch/mips/nxp/pnx8550/common/setup.c
deleted file mode 100644
index 71adac323323..000000000000
--- a/arch/mips/nxp/pnx8550/common/setup.c
+++ /dev/null
@@ -1,143 +0,0 @@
-/*
- *
- * 2.6 port, Embedded Alley Solutions, Inc
- *
- *  Based on Per Hallsmark, per.hallsmark@mvista.com
- *
- *  This program is free software; you can distribute it and/or modify it
- *  under the terms of the GNU General Public License (Version 2) as
- *  published by the Free Software Foundation.
- *
- *  This program is distributed in the hope it will be useful, but WITHOUT
- *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- *  for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- */
-#include <linux/init.h>
-#include <linux/sched.h>
-#include <linux/ioport.h>
-#include <linux/irq.h>
-#include <linux/mm.h>
-#include <linux/delay.h>
-#include <linux/interrupt.h>
-#include <linux/serial_pnx8xxx.h>
-#include <linux/pm.h>
-
-#include <asm/cpu.h>
-#include <asm/bootinfo.h>
-#include <asm/irq.h>
-#include <asm/mipsregs.h>
-#include <asm/reboot.h>
-#include <asm/pgtable.h>
-#include <asm/time.h>
-
-#include <glb.h>
-#include <int.h>
-#include <pci.h>
-#include <uart.h>
-#include <nand.h>
-
-extern void __init board_setup(void);
-extern void pnx8550_machine_restart(char *);
-extern void pnx8550_machine_halt(void);
-extern void pnx8550_machine_power_off(void);
-extern struct resource ioport_resource;
-extern struct resource iomem_resource;
-extern char *prom_getcmdline(void);
-
-struct resource standard_io_resources[] = {
-        {
-                .start  = 0x00,
-                .end    = 0x1f,
-                .name   = "dma1",
-                .flags  = IORESOURCE_BUSY
-        }, {
-                .start  = 0x40,
-                .end    = 0x5f,
-                .name   = "timer",
-                .flags  = IORESOURCE_BUSY
-        }, {
-                .start  = 0x80,
-                .end    = 0x8f,
-                .name   = "dma page reg",
-                .flags  = IORESOURCE_BUSY
-        }, {
-                .start  = 0xc0,
-                .end    = 0xdf,
-                .name   = "dma2",
-                .flags  = IORESOURCE_BUSY
-        },
-};
-
-#define STANDARD_IO_RESOURCES ARRAY_SIZE(standard_io_resources)
-
-extern struct resource pci_io_resource;
-extern struct resource pci_mem_resource;
-
-/* Return the total size of DRAM-memory, (RANK0 + RANK1) */
-unsigned long get_system_mem_size(void)
-{
-        /* Read IP2031_RANK0_ADDR_LO */
-        unsigned long dram_r0_lo = inl(PCI_BASE | 0x65010);
-        /* Read IP2031_RANK1_ADDR_HI */
-        unsigned long dram_r1_hi = inl(PCI_BASE | 0x65018);
-
-        return dram_r1_hi - dram_r0_lo + 1;
-}
-
-int pnx8550_console_port = -1;
-
-void __init plat_mem_setup(void)
-{
-        int i;
-        char* argptr;
-
-        board_setup();  /* board specific setup */
-
-        _machine_restart = pnx8550_machine_restart;
-        _machine_halt = pnx8550_machine_halt;
-        pm_power_off = pnx8550_machine_power_off;
-
-        /* Clear the Global 2 Register, PCI Inta Output Enable Registers
-           Bit 1:Enable DAC Powerdown
-          -> 0:DACs are enabled and are working normally
-             1:DACs are powerdown
-           Bit 0:Enable of PCI inta output
-          -> 0 = Disable PCI inta output
-             1 = Enable PCI inta output
-        */
-        PNX8550_GLB2_ENAB_INTA_O = 0;
-
-        /* IO/MEM resources. */
-        set_io_port_base(PNX8550_PORT_BASE);
-        ioport_resource.start = 0;
-        ioport_resource.end = ~0;
-        iomem_resource.start = 0;
-        iomem_resource.end = ~0;
-
-        /* Request I/O space for devices on this board */
-        for (i = 0; i < STANDARD_IO_RESOURCES; i++)
-                request_resource(&ioport_resource, standard_io_resources + i);
-
-        /* Place the Mode Control bit for GPIO pin 16 in primary function */
-        /* Pin 16 is used by UART1, UA1_TX                                */
-        outl((PNX8550_GPIO_MODE_PRIMOP << PNX8550_GPIO_MC_16_BIT) |
-                        (PNX8550_GPIO_MODE_PRIMOP << PNX8550_GPIO_MC_17_BIT),
-                        PNX8550_GPIO_MC1);
-
-        argptr = prom_getcmdline();
-        if ((argptr = strstr(argptr, "console=ttyS")) != NULL) {
-                argptr += strlen("console=ttyS");
-                pnx8550_console_port = *argptr == '0' ? 0 : 1;
-
-                /* We must initialize the UART (console) before early printk */
-                /* Set LCR to 8-bit and BAUD to 38400 (no 5)                */
-                ip3106_lcr(UART_BASE, pnx8550_console_port) =
-                        PNX8XXX_UART_LCR_8BIT;
-                ip3106_baud(UART_BASE, pnx8550_console_port) = 5;
-        }
-}
diff --git a/arch/mips/pci/pci-alchemy.c b/arch/mips/pci/pci-alchemy.c
index 4ee57104e47b..b5ce041cdafb 100644
--- a/arch/mips/pci/pci-alchemy.c
+++ b/arch/mips/pci/pci-alchemy.c
@@ -7,6 +7,7 @@
  * Support for all devices (greater than 16) added by David Gathright.
  */
 
+#include <linux/export.h>
 #include <linux/types.h>
 #include <linux/pci.h>
 #include <linux/platform_device.h>
diff --git a/arch/mips/pci/pci-lantiq.c b/arch/mips/pci/pci-lantiq.c
index 8656388b34bd..be1e1afe12c3 100644
--- a/arch/mips/pci/pci-lantiq.c
+++ b/arch/mips/pci/pci-lantiq.c
@@ -13,6 +13,7 @@
 #include <linux/delay.h>
 #include <linux/mm.h>
 #include <linux/vmalloc.h>
+#include <linux/export.h>
 #include <linux/platform_device.h>
 
 #include <asm/pci.h>
diff --git a/arch/mips/pmc-sierra/yosemite/prom.c b/arch/mips/pmc-sierra/yosemite/prom.c
index cf4c868715ac..dcc926e06fce 100644
--- a/arch/mips/pmc-sierra/yosemite/prom.c
+++ b/arch/mips/pmc-sierra/yosemite/prom.c
@@ -102,7 +102,7 @@ void __init prom_init(void)
 
         /* Get the boot parameters */
         for (i = 1; i < argc; i++) {
-                if (strlen(arcs_cmdline) + strlen(arg[i] + 1) >=
+                if (strlen(arcs_cmdline) + strlen(arg[i]) + 1 >=
                     sizeof(arcs_cmdline))
                         break;