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-rw-r--r--arch/mips/vr41xx/common/siu.c36
1 files changed, 35 insertions, 1 deletions
diff --git a/arch/mips/vr41xx/common/siu.c b/arch/mips/vr41xx/common/siu.c
index b735f45b25f0..654dee6208be 100644
--- a/arch/mips/vr41xx/common/siu.c
+++ b/arch/mips/vr41xx/common/siu.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * NEC VR4100 series SIU platform device. 2 * NEC VR4100 series SIU platform device.
3 * 3 *
4 * Copyright (C) 2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> 4 * Copyright (C) 2007-2008 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
@@ -118,3 +118,37 @@ err_free_device:
118 return retval; 118 return retval;
119} 119}
120device_initcall(vr41xx_siu_add); 120device_initcall(vr41xx_siu_add);
121
122void __init vr41xx_siu_setup(void)
123{
124 struct uart_port port;
125 struct resource *res;
126 unsigned int *type;
127 int i;
128
129 switch (current_cpu_type()) {
130 case CPU_VR4111:
131 case CPU_VR4121:
132 type = siu_type1_ports;
133 res = siu_type1_resource;
134 break;
135 case CPU_VR4122:
136 case CPU_VR4131:
137 case CPU_VR4133:
138 type = siu_type2_ports;
139 res = siu_type2_resource;
140 break;
141 default:
142 return;
143 }
144
145 for (i = 0; i < SIU_PORTS_MAX; i++) {
146 port.line = i;
147 port.type = type[i];
148 if (port.type == PORT_UNKNOWN)
149 break;
150 port.mapbase = res[i].start;
151 port.membase = (unsigned char __iomem *)KSEG1ADDR(res[i].start);
152 vr41xx_siu_early_setup(&port);
153 }
154}