diff options
Diffstat (limited to 'arch/mips/vr41xx/common/int-handler.S')
| -rw-r--r-- | arch/mips/vr41xx/common/int-handler.S | 114 |
1 files changed, 0 insertions, 114 deletions
diff --git a/arch/mips/vr41xx/common/int-handler.S b/arch/mips/vr41xx/common/int-handler.S deleted file mode 100644 index 2b6043f16d09..000000000000 --- a/arch/mips/vr41xx/common/int-handler.S +++ /dev/null | |||
| @@ -1,114 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * FILE NAME | ||
| 3 | * arch/mips/vr41xx/common/int-handler.S | ||
| 4 | * | ||
| 5 | * BRIEF MODULE DESCRIPTION | ||
| 6 | * Interrupt dispatcher for the NEC VR4100 series. | ||
| 7 | * | ||
| 8 | * Author: Yoichi Yuasa | ||
| 9 | * yyuasa@mvista.com or source@mvista.com | ||
| 10 | * | ||
| 11 | * Copyright 2001 MontaVista Software Inc. | ||
| 12 | * | ||
| 13 | * This program is free software; you can redistribute it and/or modify it | ||
| 14 | * under the terms of the GNU General Public License as published by the | ||
| 15 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 16 | * option) any later version. | ||
| 17 | * | ||
| 18 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | ||
| 19 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | ||
| 20 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | ||
| 21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | ||
| 22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, | ||
| 23 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS | ||
| 24 | * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND | ||
| 25 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR | ||
| 26 | * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE | ||
| 27 | * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
| 28 | * | ||
| 29 | * You should have received a copy of the GNU General Public License along | ||
| 30 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
| 31 | * 675 Mass Ave, Cambridge, MA 02139, USA. | ||
| 32 | */ | ||
| 33 | /* | ||
| 34 | * Changes: | ||
| 35 | * MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com> | ||
| 36 | * - New creation, NEC VR4100 series are supported. | ||
| 37 | * | ||
| 38 | * Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | ||
| 39 | * - Coped with INTASSIGN of NEC VR4133. | ||
| 40 | */ | ||
| 41 | #include <asm/asm.h> | ||
| 42 | #include <asm/regdef.h> | ||
| 43 | #include <asm/mipsregs.h> | ||
| 44 | #include <asm/stackframe.h> | ||
| 45 | |||
| 46 | .text | ||
| 47 | .set noreorder | ||
| 48 | |||
| 49 | .align 5 | ||
| 50 | NESTED(vr41xx_handle_interrupt, PT_SIZE, ra) | ||
| 51 | .set noat | ||
| 52 | SAVE_ALL | ||
| 53 | CLI | ||
| 54 | .set at | ||
| 55 | .set noreorder | ||
| 56 | |||
| 57 | /* | ||
| 58 | * Get the pending interrupts | ||
| 59 | */ | ||
| 60 | mfc0 t0, CP0_CAUSE | ||
| 61 | mfc0 t1, CP0_STATUS | ||
| 62 | andi t0, 0xff00 | ||
| 63 | and t0, t0, t1 | ||
| 64 | |||
| 65 | andi t1, t0, CAUSEF_IP7 # MIPS timer interrupt | ||
| 66 | bnez t1, handle_irq | ||
| 67 | li a0, 7 | ||
| 68 | |||
| 69 | andi t1, t0, 0x7800 # check for Int1-4 | ||
| 70 | beqz t1, 1f | ||
| 71 | |||
| 72 | andi t1, t0, CAUSEF_IP3 # check for Int1 | ||
| 73 | bnez t1, handle_int | ||
| 74 | li a0, 3 | ||
| 75 | |||
| 76 | andi t1, t0, CAUSEF_IP4 # check for Int2 | ||
| 77 | bnez t1, handle_int | ||
| 78 | li a0, 4 | ||
| 79 | |||
| 80 | andi t1, t0, CAUSEF_IP5 # check for Int3 | ||
| 81 | bnez t1, handle_int | ||
| 82 | li a0, 5 | ||
| 83 | |||
| 84 | andi t1, t0, CAUSEF_IP6 # check for Int4 | ||
| 85 | bnez t1, handle_int | ||
| 86 | li a0, 6 | ||
| 87 | |||
| 88 | 1: | ||
| 89 | andi t1, t0, CAUSEF_IP2 # check for Int0 | ||
| 90 | bnez t1, handle_int | ||
| 91 | li a0, 2 | ||
| 92 | |||
| 93 | andi t1, t0, CAUSEF_IP0 # check for IP0 | ||
| 94 | bnez t1, handle_irq | ||
| 95 | li a0, 0 | ||
| 96 | |||
| 97 | andi t1, t0, CAUSEF_IP1 # check for IP1 | ||
| 98 | bnez t1, handle_irq | ||
| 99 | li a0, 1 | ||
| 100 | |||
| 101 | j spurious_interrupt | ||
| 102 | nop | ||
| 103 | |||
| 104 | handle_int: | ||
| 105 | jal irq_dispatch | ||
| 106 | move a1, sp | ||
| 107 | j ret_from_irq | ||
| 108 | nop | ||
| 109 | |||
| 110 | handle_irq: | ||
| 111 | jal do_IRQ | ||
| 112 | move a1, sp | ||
| 113 | j ret_from_irq | ||
| 114 | END(vr41xx_handle_interrupt) | ||