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Diffstat (limited to 'arch/mips/txx9/jmr3927/setup.c')
-rw-r--r--arch/mips/txx9/jmr3927/setup.c108
1 files changed, 27 insertions, 81 deletions
diff --git a/arch/mips/txx9/jmr3927/setup.c b/arch/mips/txx9/jmr3927/setup.c
index 41e0f3b3af2c..baa8c8db9a94 100644
--- a/arch/mips/txx9/jmr3927/setup.c
+++ b/arch/mips/txx9/jmr3927/setup.c
@@ -30,7 +30,6 @@
30#include <linux/init.h> 30#include <linux/init.h>
31#include <linux/kernel.h> 31#include <linux/kernel.h>
32#include <linux/types.h> 32#include <linux/types.h>
33#include <linux/pci.h>
34#include <linux/ioport.h> 33#include <linux/ioport.h>
35#include <linux/delay.h> 34#include <linux/delay.h>
36#include <linux/pm.h> 35#include <linux/pm.h>
@@ -44,6 +43,7 @@
44#include <asm/txx9tmr.h> 43#include <asm/txx9tmr.h>
45#include <asm/txx9pio.h> 44#include <asm/txx9pio.h>
46#include <asm/reboot.h> 45#include <asm/reboot.h>
46#include <asm/txx9/pci.h>
47#include <asm/txx9/jmr3927.h> 47#include <asm/txx9/jmr3927.h>
48#include <asm/mipsregs.h> 48#include <asm/mipsregs.h>
49 49
@@ -96,8 +96,6 @@ void __init plat_time_init(void)
96 96
97extern char * __init prom_getcmdline(void); 97extern char * __init prom_getcmdline(void);
98static void jmr3927_board_init(void); 98static void jmr3927_board_init(void);
99extern struct resource pci_io_resource;
100extern struct resource pci_mem_resource;
101 99
102void __init plat_mem_setup(void) 100void __init plat_mem_setup(void)
103{ 101{
@@ -112,8 +110,8 @@ void __init plat_mem_setup(void)
112 /* 110 /*
113 * IO/MEM resources. 111 * IO/MEM resources.
114 */ 112 */
115 ioport_resource.start = pci_io_resource.start; 113 ioport_resource.start = 0;
116 ioport_resource.end = pci_io_resource.end; 114 ioport_resource.end = 0xffffffff;
117 iomem_resource.start = 0; 115 iomem_resource.start = 0;
118 iomem_resource.end = 0xffffffff; 116 iomem_resource.end = 0xffffffff;
119 117
@@ -191,9 +189,33 @@ void __init plat_mem_setup(void)
191 189
192static void tx3927_setup(void); 190static void tx3927_setup(void);
193 191
192static void __init jmr3927_pci_setup(void)
193{
194#ifdef CONFIG_PCI
195 int extarb = !(tx3927_ccfgptr->ccfg & TX3927_CCFG_PCIXARB);
196 struct pci_controller *c;
197
198 c = txx9_alloc_pci_controller(&txx9_primary_pcic,
199 JMR3927_PCIMEM, JMR3927_PCIMEM_SIZE,
200 JMR3927_PCIIO, JMR3927_PCIIO_SIZE);
201 register_pci_controller(c);
202 if (!extarb) {
203 /* Reset PCI Bus */
204 jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
205 udelay(100);
206 jmr3927_ioc_reg_out(JMR3927_IOC_RESET_PCI,
207 JMR3927_IOC_RESET_ADDR);
208 udelay(100);
209 jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
210 }
211 tx3927_pcic_setup(c, JMR3927_SDRAM_SIZE, extarb);
212#endif /* CONFIG_PCI */
213}
214
194static void __init jmr3927_board_init(void) 215static void __init jmr3927_board_init(void)
195{ 216{
196 tx3927_setup(); 217 tx3927_setup();
218 jmr3927_pci_setup();
197 219
198 /* SIO0 DTR on */ 220 /* SIO0 DTR on */
199 jmr3927_ioc_reg_out(0, JMR3927_IOC_DTR_ADDR); 221 jmr3927_ioc_reg_out(0, JMR3927_IOC_DTR_ADDR);
@@ -210,14 +232,6 @@ static void __init jmr3927_board_init(void)
210static void __init tx3927_setup(void) 232static void __init tx3927_setup(void)
211{ 233{
212 int i; 234 int i;
213#ifdef CONFIG_PCI
214 unsigned long mips_pci_io_base = JMR3927_PCIIO;
215 unsigned long mips_pci_io_size = JMR3927_PCIIO_SIZE;
216 unsigned long mips_pci_mem_base = JMR3927_PCIMEM;
217 unsigned long mips_pci_mem_size = JMR3927_PCIMEM_SIZE;
218 /* for legacy I/O, PCI I/O PCI Bus address must be 0 */
219 unsigned long mips_pci_io_pciaddr = 0;
220#endif
221 235
222 /* SDRAMC are configured by PROM */ 236 /* SDRAMC are configured by PROM */
223 237
@@ -272,74 +286,6 @@ static void __init tx3927_setup(void)
272 tx3927_dmaptr->mcr = TX3927_DMA_MCR_MSTEN | TX3927_DMA_MCR_LE; 286 tx3927_dmaptr->mcr = TX3927_DMA_MCR_MSTEN | TX3927_DMA_MCR_LE;
273#endif 287#endif
274 288
275#ifdef CONFIG_PCI
276 /* PCIC */
277 printk("TX3927 PCIC -- DID:%04x VID:%04x RID:%02x Arbiter:",
278 tx3927_pcicptr->did, tx3927_pcicptr->vid,
279 tx3927_pcicptr->rid);
280 if (!(tx3927_ccfgptr->ccfg & TX3927_CCFG_PCIXARB)) {
281 printk("External\n");
282 /* XXX */
283 } else {
284 printk("Internal\n");
285
286 /* Reset PCI Bus */
287 jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
288 udelay(100);
289 jmr3927_ioc_reg_out(JMR3927_IOC_RESET_PCI,
290 JMR3927_IOC_RESET_ADDR);
291 udelay(100);
292 jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
293
294
295 /* Disable External PCI Config. Access */
296 tx3927_pcicptr->lbc = TX3927_PCIC_LBC_EPCAD;
297#ifdef __BIG_ENDIAN
298 tx3927_pcicptr->lbc |= TX3927_PCIC_LBC_IBSE |
299 TX3927_PCIC_LBC_TIBSE |
300 TX3927_PCIC_LBC_TMFBSE | TX3927_PCIC_LBC_MSDSE;
301#endif
302 /* LB->PCI mappings */
303 tx3927_pcicptr->iomas = ~(mips_pci_io_size - 1);
304 tx3927_pcicptr->ilbioma = mips_pci_io_base;
305 tx3927_pcicptr->ipbioma = mips_pci_io_pciaddr;
306 tx3927_pcicptr->mmas = ~(mips_pci_mem_size - 1);
307 tx3927_pcicptr->ilbmma = mips_pci_mem_base;
308 tx3927_pcicptr->ipbmma = mips_pci_mem_base;
309 /* PCI->LB mappings */
310 tx3927_pcicptr->iobas = 0xffffffff;
311 tx3927_pcicptr->ioba = 0;
312 tx3927_pcicptr->tlbioma = 0;
313 tx3927_pcicptr->mbas = ~(mips_pci_mem_size - 1);
314 tx3927_pcicptr->mba = 0;
315 tx3927_pcicptr->tlbmma = 0;
316 /* Enable Direct mapping Address Space Decoder */
317 tx3927_pcicptr->lbc |= TX3927_PCIC_LBC_ILMDE | TX3927_PCIC_LBC_ILIDE;
318
319 /* Clear All Local Bus Status */
320 tx3927_pcicptr->lbstat = TX3927_PCIC_LBIM_ALL;
321 /* Enable All Local Bus Interrupts */
322 tx3927_pcicptr->lbim = TX3927_PCIC_LBIM_ALL;
323 /* Clear All PCI Status Error */
324 tx3927_pcicptr->pcistat = TX3927_PCIC_PCISTATIM_ALL;
325 /* Enable All PCI Status Error Interrupts */
326 tx3927_pcicptr->pcistatim = TX3927_PCIC_PCISTATIM_ALL;
327
328 /* PCIC Int => IRC IRQ10 */
329 tx3927_pcicptr->il = TX3927_IR_PCI;
330 /* Target Control (per errata) */
331 tx3927_pcicptr->tc = TX3927_PCIC_TC_OF8E | TX3927_PCIC_TC_IF8E;
332
333 /* Enable Bus Arbiter */
334 tx3927_pcicptr->pbapmc = TX3927_PCIC_PBAPMC_PBAEN;
335
336 tx3927_pcicptr->pcicmd = PCI_COMMAND_MASTER |
337 PCI_COMMAND_MEMORY |
338 PCI_COMMAND_IO |
339 PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
340 }
341#endif /* CONFIG_PCI */
342
343 /* PIO */ 289 /* PIO */
344 /* PIO[15:12] connected to LEDs */ 290 /* PIO[15:12] connected to LEDs */
345 __raw_writel(0x0000f000, &tx3927_pioptr->dir); 291 __raw_writel(0x0000f000, &tx3927_pioptr->dir);