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-rw-r--r--arch/mips/tx4927/common/tx4927_setup.c186
1 files changed, 0 insertions, 186 deletions
diff --git a/arch/mips/tx4927/common/tx4927_setup.c b/arch/mips/tx4927/common/tx4927_setup.c
deleted file mode 100644
index 36c5f200eb3d..000000000000
--- a/arch/mips/tx4927/common/tx4927_setup.c
+++ /dev/null
@@ -1,186 +0,0 @@
1/*
2 * Author: MontaVista Software, Inc.
3 * source@mvista.com
4 *
5 * Copyright 2001-2002 MontaVista Software Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
13 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
15 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
16 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
17 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
18 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
19 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
20 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
21 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
22 *
23 * You should have received a copy of the GNU General Public License along
24 * with this program; if not, write to the Free Software Foundation, Inc.,
25 * 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27#include <linux/errno.h>
28#include <linux/init.h>
29#include <linux/kernel_stat.h>
30#include <linux/module.h>
31#include <linux/signal.h>
32#include <linux/sched.h>
33#include <linux/types.h>
34#include <linux/interrupt.h>
35#include <linux/ioport.h>
36#include <linux/timex.h>
37#include <linux/slab.h>
38#include <linux/random.h>
39#include <linux/irq.h>
40#include <linux/bitops.h>
41#include <asm/bootinfo.h>
42#include <asm/io.h>
43#include <asm/irq.h>
44#include <asm/mipsregs.h>
45#include <asm/system.h>
46#include <asm/time.h>
47#include <asm/tx4927/tx4927.h>
48
49
50#undef DEBUG
51
52void dump_cp0(char *key);
53
54
55void __init plat_mem_setup(void)
56{
57#ifdef CONFIG_TOSHIBA_RBTX4927
58 {
59 extern void toshiba_rbtx4927_setup(void);
60 toshiba_rbtx4927_setup();
61 }
62#endif
63}
64
65void __init plat_time_init(void)
66{
67#ifdef CONFIG_TOSHIBA_RBTX4927
68 {
69 extern void toshiba_rbtx4927_time_init(void);
70 toshiba_rbtx4927_time_init();
71 }
72#endif
73}
74
75#ifdef DEBUG
76void print_cp0(char *key, int num, char *name, u32 val)
77{
78 printk("%s cp0:%02d:%s=0x%08x\n", key, num, name, val);
79 return;
80}
81
82void
83dump_cp0(char *key)
84{
85 if (key == NULL)
86 key = "";
87
88 print_cp0(key, 0, "INDEX ", read_c0_index());
89 print_cp0(key, 2, "ENTRYLO1", read_c0_entrylo0());
90 print_cp0(key, 3, "ENTRYLO2", read_c0_entrylo1());
91 print_cp0(key, 4, "CONTEXT ", read_c0_context());
92 print_cp0(key, 5, "PAGEMASK", read_c0_pagemask());
93 print_cp0(key, 6, "WIRED ", read_c0_wired());
94 //print_cp0(key, 8, "BADVADDR", read_c0_badvaddr());
95 print_cp0(key, 9, "COUNT ", read_c0_count());
96 print_cp0(key, 10, "ENTRYHI ", read_c0_entryhi());
97 print_cp0(key, 11, "COMPARE ", read_c0_compare());
98 print_cp0(key, 12, "STATUS ", read_c0_status());
99 print_cp0(key, 13, "CAUSE ", read_c0_cause() & 0xffff87ff);
100 print_cp0(key, 16, "CONFIG ", read_c0_config());
101 return;
102}
103
104void print_pic(char *key, unsigned long reg, char *name)
105{
106 printk(KERN_INFO "%s pic:0x%08lx:%s=0x%08x\n", key, reg, name,
107 __raw_readl((void __iomem *)reg));
108 return;
109}
110
111
112void dump_pic(char *key)
113{
114 if (key == NULL)
115 key = "";
116
117 print_pic(key, 0xff1ff600, "IRDEN ");
118 print_pic(key, 0xff1ff604, "IRDM0 ");
119 print_pic(key, 0xff1ff608, "IRDM1 ");
120
121 print_pic(key, 0xff1ff610, "IRLVL0 ");
122 print_pic(key, 0xff1ff614, "IRLVL1 ");
123 print_pic(key, 0xff1ff618, "IRLVL2 ");
124 print_pic(key, 0xff1ff61c, "IRLVL3 ");
125 print_pic(key, 0xff1ff620, "IRLVL4 ");
126 print_pic(key, 0xff1ff624, "IRLVL5 ");
127 print_pic(key, 0xff1ff628, "IRLVL6 ");
128 print_pic(key, 0xff1ff62c, "IRLVL7 ");
129
130 print_pic(key, 0xff1ff640, "IRMSK ");
131 print_pic(key, 0xff1ff660, "IREDC ");
132 print_pic(key, 0xff1ff680, "IRPND ");
133 print_pic(key, 0xff1ff6a0, "IRCS ");
134
135 print_pic(key, 0xff1ff514, "IRFLAG1 "); /* don't read IRLAG0 -- it hangs system */
136
137 print_pic(key, 0xff1ff518, "IRPOL ");
138 print_pic(key, 0xff1ff51c, "IRRCNT ");
139 print_pic(key, 0xff1ff520, "IRMASKINT");
140 print_pic(key, 0xff1ff524, "IRMASKEXT");
141
142 return;
143}
144
145
146void print_addr(char *hdr, char *key, unsigned long addr)
147{
148 printk(KERN_INFO "%s %s:0x%08lx=0x%08x\n", hdr, key, addr,
149 __raw_readl((void __iomem *)addr));
150 return;
151}
152
153
154void dump_180(char *key)
155{
156 u32 i;
157
158 for (i = 0x80000180; i < 0x80000180 + 0x80; i += 4) {
159 print_addr("180", key, i);
160 }
161 return;
162}
163
164
165void dump_eh0(char *key)
166{
167 int i;
168 extern unsigned long exception_handlers[];
169
170 for (i = (int) exception_handlers;
171 i < (int) (exception_handlers + 20); i += 4) {
172 print_addr("eh0", key, i);
173 }
174
175 return;
176}
177
178void pk0(void)
179{
180 volatile u32 val;
181
182 __asm__ __volatile__("ori %0, $26, 0":"=r"(val)
183 );
184 printk("k0=[0x%08x]\n", val);
185}
186#endif
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