diff options
Diffstat (limited to 'arch/mips/sni/a20r.c')
-rw-r--r-- | arch/mips/sni/a20r.c | 25 |
1 files changed, 7 insertions, 18 deletions
diff --git a/arch/mips/sni/a20r.c b/arch/mips/sni/a20r.c index bbe7187879fa..c48194c3073b 100644 --- a/arch/mips/sni/a20r.c +++ b/arch/mips/sni/a20r.c | |||
@@ -168,33 +168,22 @@ static u32 a20r_ack_hwint(void) | |||
168 | return status; | 168 | return status; |
169 | } | 169 | } |
170 | 170 | ||
171 | static inline void unmask_a20r_irq(unsigned int irq) | 171 | static inline void unmask_a20r_irq(struct irq_data *d) |
172 | { | 172 | { |
173 | set_c0_status(0x100 << (irq - SNI_A20R_IRQ_BASE)); | 173 | set_c0_status(0x100 << (d->irq - SNI_A20R_IRQ_BASE)); |
174 | irq_enable_hazard(); | 174 | irq_enable_hazard(); |
175 | } | 175 | } |
176 | 176 | ||
177 | static inline void mask_a20r_irq(unsigned int irq) | 177 | static inline void mask_a20r_irq(struct irq_data *d) |
178 | { | 178 | { |
179 | clear_c0_status(0x100 << (irq - SNI_A20R_IRQ_BASE)); | 179 | clear_c0_status(0x100 << (d->irq - SNI_A20R_IRQ_BASE)); |
180 | irq_disable_hazard(); | 180 | irq_disable_hazard(); |
181 | } | 181 | } |
182 | 182 | ||
183 | static void end_a20r_irq(unsigned int irq) | ||
184 | { | ||
185 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) { | ||
186 | a20r_ack_hwint(); | ||
187 | unmask_a20r_irq(irq); | ||
188 | } | ||
189 | } | ||
190 | |||
191 | static struct irq_chip a20r_irq_type = { | 183 | static struct irq_chip a20r_irq_type = { |
192 | .name = "A20R", | 184 | .name = "A20R", |
193 | .ack = mask_a20r_irq, | 185 | .irq_mask = mask_a20r_irq, |
194 | .mask = mask_a20r_irq, | 186 | .irq_unmask = unmask_a20r_irq, |
195 | .mask_ack = mask_a20r_irq, | ||
196 | .unmask = unmask_a20r_irq, | ||
197 | .end = end_a20r_irq, | ||
198 | }; | 187 | }; |
199 | 188 | ||
200 | /* | 189 | /* |
@@ -220,7 +209,7 @@ void __init sni_a20r_irq_init(void) | |||
220 | int i; | 209 | int i; |
221 | 210 | ||
222 | for (i = SNI_A20R_IRQ_BASE + 2 ; i < SNI_A20R_IRQ_BASE + 8; i++) | 211 | for (i = SNI_A20R_IRQ_BASE + 2 ; i < SNI_A20R_IRQ_BASE + 8; i++) |
223 | set_irq_chip_and_handler(i, &a20r_irq_type, handle_level_irq); | 212 | irq_set_chip_and_handler(i, &a20r_irq_type, handle_level_irq); |
224 | sni_hwint = a20r_hwint; | 213 | sni_hwint = a20r_hwint; |
225 | change_c0_status(ST0_IM, IE_IRQ0); | 214 | change_c0_status(ST0_IM, IE_IRQ0); |
226 | setup_irq(SNI_A20R_IRQ_BASE + 3, &sni_isa_irq); | 215 | setup_irq(SNI_A20R_IRQ_BASE + 3, &sni_isa_irq); |