diff options
Diffstat (limited to 'arch/mips/powertv/asic/asic-zeus.c')
-rw-r--r-- | arch/mips/powertv/asic/asic-zeus.c | 131 |
1 files changed, 67 insertions, 64 deletions
diff --git a/arch/mips/powertv/asic/asic-zeus.c b/arch/mips/powertv/asic/asic-zeus.c index 1469daab920e..095cbe10ebb9 100644 --- a/arch/mips/powertv/asic/asic-zeus.c +++ b/arch/mips/powertv/asic/asic-zeus.c | |||
@@ -23,76 +23,79 @@ | |||
23 | * Description: Defines the platform resources for the SA settop. | 23 | * Description: Defines the platform resources for the SA settop. |
24 | */ | 24 | */ |
25 | 25 | ||
26 | #include <linux/init.h> | ||
26 | #include <asm/mach-powertv/asic.h> | 27 | #include <asm/mach-powertv/asic.h> |
27 | 28 | ||
28 | const struct register_map zeus_register_map = { | 29 | #define ZEUS_ADDR(x) (ZEUS_IO_BASE + (x)) |
29 | .eic_slow0_strt_add = 0x000000, | ||
30 | .eic_cfg_bits = 0x000038, | ||
31 | .eic_ready_status = 0x00004c, | ||
32 | 30 | ||
33 | .chipver3 = 0x280800, | 31 | const struct register_map zeus_register_map __initdata = { |
34 | .chipver2 = 0x280804, | 32 | .eic_slow0_strt_add = {.phys = ZEUS_ADDR(0x000000)}, |
35 | .chipver1 = 0x280808, | 33 | .eic_cfg_bits = {.phys = ZEUS_ADDR(0x000038)}, |
36 | .chipver0 = 0x28080c, | 34 | .eic_ready_status = {.phys = ZEUS_ADDR(0x00004c)}, |
35 | |||
36 | .chipver3 = {.phys = ZEUS_ADDR(0x280800)}, | ||
37 | .chipver2 = {.phys = ZEUS_ADDR(0x280804)}, | ||
38 | .chipver1 = {.phys = ZEUS_ADDR(0x280808)}, | ||
39 | .chipver0 = {.phys = ZEUS_ADDR(0x28080c)}, | ||
37 | 40 | ||
38 | /* The registers of IRBlaster */ | 41 | /* The registers of IRBlaster */ |
39 | .uart1_intstat = 0x281800, | 42 | .uart1_intstat = {.phys = ZEUS_ADDR(0x281800)}, |
40 | .uart1_inten = 0x281804, | 43 | .uart1_inten = {.phys = ZEUS_ADDR(0x281804)}, |
41 | .uart1_config1 = 0x281808, | 44 | .uart1_config1 = {.phys = ZEUS_ADDR(0x281808)}, |
42 | .uart1_config2 = 0x28180C, | 45 | .uart1_config2 = {.phys = ZEUS_ADDR(0x28180C)}, |
43 | .uart1_divisorhi = 0x281810, | 46 | .uart1_divisorhi = {.phys = ZEUS_ADDR(0x281810)}, |
44 | .uart1_divisorlo = 0x281814, | 47 | .uart1_divisorlo = {.phys = ZEUS_ADDR(0x281814)}, |
45 | .uart1_data = 0x281818, | 48 | .uart1_data = {.phys = ZEUS_ADDR(0x281818)}, |
46 | .uart1_status = 0x28181C, | 49 | .uart1_status = {.phys = ZEUS_ADDR(0x28181C)}, |
47 | 50 | ||
48 | .int_stat_3 = 0x282800, | 51 | .int_stat_3 = {.phys = ZEUS_ADDR(0x282800)}, |
49 | .int_stat_2 = 0x282804, | 52 | .int_stat_2 = {.phys = ZEUS_ADDR(0x282804)}, |
50 | .int_stat_1 = 0x282808, | 53 | .int_stat_1 = {.phys = ZEUS_ADDR(0x282808)}, |
51 | .int_stat_0 = 0x28280c, | 54 | .int_stat_0 = {.phys = ZEUS_ADDR(0x28280c)}, |
52 | .int_config = 0x282810, | 55 | .int_config = {.phys = ZEUS_ADDR(0x282810)}, |
53 | .int_int_scan = 0x282818, | 56 | .int_int_scan = {.phys = ZEUS_ADDR(0x282818)}, |
54 | .ien_int_3 = 0x282830, | 57 | .ien_int_3 = {.phys = ZEUS_ADDR(0x282830)}, |
55 | .ien_int_2 = 0x282834, | 58 | .ien_int_2 = {.phys = ZEUS_ADDR(0x282834)}, |
56 | .ien_int_1 = 0x282838, | 59 | .ien_int_1 = {.phys = ZEUS_ADDR(0x282838)}, |
57 | .ien_int_0 = 0x28283c, | 60 | .ien_int_0 = {.phys = ZEUS_ADDR(0x28283c)}, |
58 | .int_level_3_3 = 0x282880, | 61 | .int_level_3_3 = {.phys = ZEUS_ADDR(0x282880)}, |
59 | .int_level_3_2 = 0x282884, | 62 | .int_level_3_2 = {.phys = ZEUS_ADDR(0x282884)}, |
60 | .int_level_3_1 = 0x282888, | 63 | .int_level_3_1 = {.phys = ZEUS_ADDR(0x282888)}, |
61 | .int_level_3_0 = 0x28288c, | 64 | .int_level_3_0 = {.phys = ZEUS_ADDR(0x28288c)}, |
62 | .int_level_2_3 = 0x282890, | 65 | .int_level_2_3 = {.phys = ZEUS_ADDR(0x282890)}, |
63 | .int_level_2_2 = 0x282894, | 66 | .int_level_2_2 = {.phys = ZEUS_ADDR(0x282894)}, |
64 | .int_level_2_1 = 0x282898, | 67 | .int_level_2_1 = {.phys = ZEUS_ADDR(0x282898)}, |
65 | .int_level_2_0 = 0x28289c, | 68 | .int_level_2_0 = {.phys = ZEUS_ADDR(0x28289c)}, |
66 | .int_level_1_3 = 0x2828a0, | 69 | .int_level_1_3 = {.phys = ZEUS_ADDR(0x2828a0)}, |
67 | .int_level_1_2 = 0x2828a4, | 70 | .int_level_1_2 = {.phys = ZEUS_ADDR(0x2828a4)}, |
68 | .int_level_1_1 = 0x2828a8, | 71 | .int_level_1_1 = {.phys = ZEUS_ADDR(0x2828a8)}, |
69 | .int_level_1_0 = 0x2828ac, | 72 | .int_level_1_0 = {.phys = ZEUS_ADDR(0x2828ac)}, |
70 | .int_level_0_3 = 0x2828b0, | 73 | .int_level_0_3 = {.phys = ZEUS_ADDR(0x2828b0)}, |
71 | .int_level_0_2 = 0x2828b4, | 74 | .int_level_0_2 = {.phys = ZEUS_ADDR(0x2828b4)}, |
72 | .int_level_0_1 = 0x2828b8, | 75 | .int_level_0_1 = {.phys = ZEUS_ADDR(0x2828b8)}, |
73 | .int_level_0_0 = 0x2828bc, | 76 | .int_level_0_0 = {.phys = ZEUS_ADDR(0x2828bc)}, |
74 | .int_docsis_en = 0x2828F4, | 77 | .int_docsis_en = {.phys = ZEUS_ADDR(0x2828F4)}, |
75 | 78 | ||
76 | .mips_pll_setup = 0x1a0000, | 79 | .mips_pll_setup = {.phys = ZEUS_ADDR(0x1a0000)}, |
77 | .usb_fs = 0x1a0018, | 80 | .usb_fs = {.phys = ZEUS_ADDR(0x1a0018)}, |
78 | .test_bus = 0x1a0238, | 81 | .test_bus = {.phys = ZEUS_ADDR(0x1a0238)}, |
79 | .crt_spare = 0x1a0090, | 82 | .crt_spare = {.phys = ZEUS_ADDR(0x1a0090)}, |
80 | .usb2_ohci_int_mask = 0x1e000c, | 83 | .usb2_ohci_int_mask = {.phys = ZEUS_ADDR(0x1e000c)}, |
81 | .usb2_strap = 0x1e0014, | 84 | .usb2_strap = {.phys = ZEUS_ADDR(0x1e0014)}, |
82 | .ehci_hcapbase = 0x1FFE00, | 85 | .ehci_hcapbase = {.phys = ZEUS_ADDR(0x1FFE00)}, |
83 | .ohci_hc_revision = 0x1FFC00, | 86 | .ohci_hc_revision = {.phys = ZEUS_ADDR(0x1FFC00)}, |
84 | .bcm1_bs_lmi_steer = 0x2C0008, | 87 | .bcm1_bs_lmi_steer = {.phys = ZEUS_ADDR(0x2C0008)}, |
85 | .usb2_control = 0x2c01a0, | 88 | .usb2_control = {.phys = ZEUS_ADDR(0x2c01a0)}, |
86 | .usb2_stbus_obc = 0x1FFF00, | 89 | .usb2_stbus_obc = {.phys = ZEUS_ADDR(0x1FFF00)}, |
87 | .usb2_stbus_mess_size = 0x1FFF04, | 90 | .usb2_stbus_mess_size = {.phys = ZEUS_ADDR(0x1FFF04)}, |
88 | .usb2_stbus_chunk_size = 0x1FFF08, | 91 | .usb2_stbus_chunk_size = {.phys = ZEUS_ADDR(0x1FFF08)}, |
89 | 92 | ||
90 | .pcie_regs = 0x200000, | 93 | .pcie_regs = {.phys = ZEUS_ADDR(0x200000)}, |
91 | .tim_ch = 0x282C10, | 94 | .tim_ch = {.phys = ZEUS_ADDR(0x282C10)}, |
92 | .tim_cl = 0x282C14, | 95 | .tim_cl = {.phys = ZEUS_ADDR(0x282C14)}, |
93 | .gpio_dout = 0x282c20, | 96 | .gpio_dout = {.phys = ZEUS_ADDR(0x282c20)}, |
94 | .gpio_din = 0x282c24, | 97 | .gpio_din = {.phys = ZEUS_ADDR(0x282c24)}, |
95 | .gpio_dir = 0x282c2C, | 98 | .gpio_dir = {.phys = ZEUS_ADDR(0x282c2C)}, |
96 | .watchdog = 0x282c30, | 99 | .watchdog = {.phys = ZEUS_ADDR(0x282c30)}, |
97 | .front_panel = 0x283800, | 100 | .front_panel = {.phys = ZEUS_ADDR(0x283800)}, |
98 | }; | 101 | }; |