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Diffstat (limited to 'arch/mips/pci/pci.c')
-rw-r--r--arch/mips/pci/pci.c86
1 files changed, 9 insertions, 77 deletions
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index 15521505ebe8..0514866fa925 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -20,16 +20,9 @@
20#include <asm/cpu-info.h> 20#include <asm/cpu-info.h>
21 21
22/* 22/*
23 * Indicate whether we respect the PCI setup left by the firmware. 23 * If PCI_PROBE_ONLY in pci_flags is set, we don't change any PCI resource
24 * 24 * assignments.
25 * Make this long-lived so that we know when shutting down
26 * whether we probed only or not.
27 */ 25 */
28int pci_probe_only;
29
30#define PCI_ASSIGN_ALL_BUSSES 1
31
32unsigned int pci_probe = PCI_ASSIGN_ALL_BUSSES;
33 26
34/* 27/*
35 * The PCI controller list. 28 * The PCI controller list.
@@ -92,11 +85,12 @@ static void __devinit pcibios_scanbus(struct pci_controller *hose)
92 if (!hose->iommu) 85 if (!hose->iommu)
93 PCI_DMA_BUS_IS_PHYS = 1; 86 PCI_DMA_BUS_IS_PHYS = 1;
94 87
95 if (hose->get_busno && pci_probe_only) 88 if (hose->get_busno && pci_has_flag(PCI_PROBE_ONLY))
96 next_busno = (*hose->get_busno)(); 89 next_busno = (*hose->get_busno)();
97 90
98 pci_add_resource(&resources, hose->mem_resource); 91 pci_add_resource_offset(&resources,
99 pci_add_resource(&resources, hose->io_resource); 92 hose->mem_resource, hose->mem_offset);
93 pci_add_resource_offset(&resources, hose->io_resource, hose->io_offset);
100 bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose, 94 bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose,
101 &resources); 95 &resources);
102 if (!bus) 96 if (!bus)
@@ -115,7 +109,7 @@ static void __devinit pcibios_scanbus(struct pci_controller *hose)
115 need_domain_info = 1; 109 need_domain_info = 1;
116 } 110 }
117 111
118 if (!pci_probe_only) { 112 if (!pci_has_flag(PCI_PROBE_ONLY)) {
119 pci_bus_size_bridges(bus); 113 pci_bus_size_bridges(bus);
120 pci_bus_assign_resources(bus); 114 pci_bus_assign_resources(bus);
121 pci_enable_bridges(bus); 115 pci_enable_bridges(bus);
@@ -241,7 +235,7 @@ static int pcibios_enable_resources(struct pci_dev *dev, int mask)
241 235
242unsigned int pcibios_assign_all_busses(void) 236unsigned int pcibios_assign_all_busses(void)
243{ 237{
244 return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0; 238 return 1;
245} 239}
246 240
247int pcibios_enable_device(struct pci_dev *dev, int mask) 241int pcibios_enable_device(struct pci_dev *dev, int mask)
@@ -254,42 +248,13 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
254 return pcibios_plat_dev_init(dev); 248 return pcibios_plat_dev_init(dev);
255} 249}
256 250
257static void pcibios_fixup_device_resources(struct pci_dev *dev,
258 struct pci_bus *bus)
259{
260 /* Update device resources. */
261 struct pci_controller *hose = (struct pci_controller *)bus->sysdata;
262 unsigned long offset = 0;
263 int i;
264
265 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
266 if (!dev->resource[i].start)
267 continue;
268 if (dev->resource[i].flags & IORESOURCE_IO)
269 offset = hose->io_offset;
270 else if (dev->resource[i].flags & IORESOURCE_MEM)
271 offset = hose->mem_offset;
272
273 dev->resource[i].start += offset;
274 dev->resource[i].end += offset;
275 }
276}
277
278void __devinit pcibios_fixup_bus(struct pci_bus *bus) 251void __devinit pcibios_fixup_bus(struct pci_bus *bus)
279{ 252{
280 /* Propagate hose info into the subordinate devices. */
281
282 struct pci_dev *dev = bus->self; 253 struct pci_dev *dev = bus->self;
283 254
284 if (pci_probe_only && dev && 255 if (pci_has_flag(PCI_PROBE_ONLY) && dev &&
285 (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) { 256 (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
286 pci_read_bridge_bases(bus); 257 pci_read_bridge_bases(bus);
287 pcibios_fixup_device_resources(dev, bus);
288 }
289
290 list_for_each_entry(dev, &bus->devices, bus_list) {
291 if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI)
292 pcibios_fixup_device_resources(dev, bus);
293 } 258 }
294} 259}
295 260
@@ -299,40 +264,7 @@ pcibios_update_irq(struct pci_dev *dev, int irq)
299 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq); 264 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
300} 265}
301 266
302void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
303 struct resource *res)
304{
305 struct pci_controller *hose = (struct pci_controller *)dev->sysdata;
306 unsigned long offset = 0;
307
308 if (res->flags & IORESOURCE_IO)
309 offset = hose->io_offset;
310 else if (res->flags & IORESOURCE_MEM)
311 offset = hose->mem_offset;
312
313 region->start = res->start - offset;
314 region->end = res->end - offset;
315}
316
317void __devinit
318pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
319 struct pci_bus_region *region)
320{
321 struct pci_controller *hose = (struct pci_controller *)dev->sysdata;
322 unsigned long offset = 0;
323
324 if (res->flags & IORESOURCE_IO)
325 offset = hose->io_offset;
326 else if (res->flags & IORESOURCE_MEM)
327 offset = hose->mem_offset;
328
329 res->start = region->start + offset;
330 res->end = region->end + offset;
331}
332
333#ifdef CONFIG_HOTPLUG 267#ifdef CONFIG_HOTPLUG
334EXPORT_SYMBOL(pcibios_resource_to_bus);
335EXPORT_SYMBOL(pcibios_bus_to_resource);
336EXPORT_SYMBOL(PCIBIOS_MIN_IO); 268EXPORT_SYMBOL(PCIBIOS_MIN_IO);
337EXPORT_SYMBOL(PCIBIOS_MIN_MEM); 269EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
338#endif 270#endif