1 files changed, 23 insertions, 1 deletions

diff --git a/arch/mips/pci/pci-alchemy.c b/arch/mips/pci/pci-alchemy.c
index 563d1f61d6ee..c19600a03460 100644
--- a/arch/mips/pci/pci-alchemy.c
+++ b/arch/mips/pci/pci-alchemy.c
@@ -7,6 +7,7 @@
  * Support for all devices (greater than 16) added by David Gathright.
  */
 
+#include <linux/clk.h>
 #include <linux/export.h>
 #include <linux/types.h>
 #include <linux/pci.h>
@@ -364,6 +365,7 @@ static int alchemy_pci_probe(struct platform_device *pdev)
         void __iomem *virt_io;
         unsigned long val;
         struct resource *r;
+        struct clk *c;
         int ret;
 
         /* need at least PCI IRQ mapping table */
@@ -393,11 +395,24 @@ static int alchemy_pci_probe(struct platform_device *pdev)
                 goto out1;
         }
 
+        c = clk_get(&pdev->dev, "pci_clko");
+        if (IS_ERR(c)) {
+                dev_err(&pdev->dev, "unable to find PCI clock\n");
+                ret = PTR_ERR(c);
+                goto out2;
+        }
+
+        ret = clk_prepare_enable(c);
+        if (ret) {
+                dev_err(&pdev->dev, "cannot enable PCI clock\n");
+                goto out6;
+        }
+
         ctx->regs = ioremap_nocache(r->start, resource_size(r));
         if (!ctx->regs) {
                 dev_err(&pdev->dev, "cannot map pci regs\n");
                 ret = -ENODEV;
-                goto out2;
+                goto out5;
         }
 
         /* map parts of the PCI IO area */
@@ -465,12 +480,19 @@ static int alchemy_pci_probe(struct platform_device *pdev)
         register_syscore_ops(&alchemy_pci_pmops);
         register_pci_controller(&ctx->alchemy_pci_ctrl);
 
+        dev_info(&pdev->dev, "PCI controller at %ld MHz\n",
+                 clk_get_rate(c) / 1000000);
+
         return 0;
 
 out4:
         iounmap(virt_io);
 out3:
         iounmap(ctx->regs);
+out5:
+        clk_disable_unprepare(c);
+out6:
+        clk_put(c);
 out2:
         release_mem_region(r->start, resource_size(r));
 out1: