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Diffstat (limited to 'arch/mips/pci/fixup-fuloong2e.c')
-rw-r--r--arch/mips/pci/fixup-fuloong2e.c224
1 files changed, 224 insertions, 0 deletions
diff --git a/arch/mips/pci/fixup-fuloong2e.c b/arch/mips/pci/fixup-fuloong2e.c
new file mode 100644
index 000000000000..0c4c7a81213f
--- /dev/null
+++ b/arch/mips/pci/fixup-fuloong2e.c
@@ -0,0 +1,224 @@
1/*
2 * Copyright (C) 2004 ICT CAS
3 * Author: Li xiaoyu, ICT CAS
4 * lixy@ict.ac.cn
5 *
6 * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
7 * Author: Fuxin Zhang, zhangfx@lemote.com
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 */
14#include <linux/init.h>
15#include <linux/pci.h>
16#include <asm/mips-boards/bonito64.h>
17
18/* South bridge slot number is set by the pci probe process */
19static u8 sb_slot = 5;
20
21int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
22{
23 int irq = 0;
24
25 if (slot == sb_slot) {
26 switch (PCI_FUNC(dev->devfn)) {
27 case 2:
28 irq = 10;
29 break;
30 case 3:
31 irq = 11;
32 break;
33 case 5:
34 irq = 9;
35 break;
36 }
37 } else {
38 irq = BONITO_IRQ_BASE + 25 + pin;
39 }
40 return irq;
41
42}
43
44/* Do platform specific device initialization at pci_enable_device() time */
45int pcibios_plat_dev_init(struct pci_dev *dev)
46{
47 return 0;
48}
49
50static void __init loongson2e_nec_fixup(struct pci_dev *pdev)
51{
52 unsigned int val;
53
54 /* Configues port 1, 2, 3, 4 to be validate*/
55 pci_read_config_dword(pdev, 0xe0, &val);
56 pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x4);
57
58 /* System clock is 48-MHz Oscillator. */
59 pci_write_config_dword(pdev, 0xe4, 1 << 5);
60}
61
62static void __init loongson2e_686b_func0_fixup(struct pci_dev *pdev)
63{
64 unsigned char c;
65
66 sb_slot = PCI_SLOT(pdev->devfn);
67
68 printk(KERN_INFO "via686b fix: ISA bridge\n");
69
70 /* Enable I/O Recovery time */
71 pci_write_config_byte(pdev, 0x40, 0x08);
72
73 /* Enable ISA refresh */
74 pci_write_config_byte(pdev, 0x41, 0x01);
75
76 /* disable ISA line buffer */
77 pci_write_config_byte(pdev, 0x45, 0x00);
78
79 /* Gate INTR, and flush line buffer */
80 pci_write_config_byte(pdev, 0x46, 0xe0);
81
82 /* Disable PCI Delay Transaction, Enable EISA ports 4D0/4D1. */
83 /* pci_write_config_byte(pdev, 0x47, 0x20); */
84
85 /*
86 * enable PCI Delay Transaction, Enable EISA ports 4D0/4D1.
87 * enable time-out timer
88 */
89 pci_write_config_byte(pdev, 0x47, 0xe6);
90
91 /*
92 * enable level trigger on pci irqs: 9,10,11,13
93 * important! without this PCI interrupts won't work
94 */
95 outb(0x2e, 0x4d1);
96
97 /* 512 K PCI Decode */
98 pci_write_config_byte(pdev, 0x48, 0x01);
99
100 /* Wait for PGNT before grant to ISA Master/DMA */
101 pci_write_config_byte(pdev, 0x4a, 0x84);
102
103 /*
104 * Plug'n'Play
105 *
106 * Parallel DRQ 3, Floppy DRQ 2 (default)
107 */
108 pci_write_config_byte(pdev, 0x50, 0x0e);
109
110 /*
111 * IRQ Routing for Floppy and Parallel port
112 *
113 * IRQ 6 for floppy, IRQ 7 for parallel port
114 */
115 pci_write_config_byte(pdev, 0x51, 0x76);
116
117 /* IRQ Routing for serial ports (take IRQ 3 and 4) */
118 pci_write_config_byte(pdev, 0x52, 0x34);
119
120 /* All IRQ's level triggered. */
121 pci_write_config_byte(pdev, 0x54, 0x00);
122
123 /* route PIRQA-D irq */
124 pci_write_config_byte(pdev, 0x55, 0x90); /* bit 7-4, PIRQA */
125 pci_write_config_byte(pdev, 0x56, 0xba); /* bit 7-4, PIRQC; */
126 /* 3-0, PIRQB */
127 pci_write_config_byte(pdev, 0x57, 0xd0); /* bit 7-4, PIRQD */
128
129 /* enable function 5/6, audio/modem */
130 pci_read_config_byte(pdev, 0x85, &c);
131 c &= ~(0x3 << 2);
132 pci_write_config_byte(pdev, 0x85, c);
133
134 printk(KERN_INFO"via686b fix: ISA bridge done\n");
135}
136
137static void __init loongson2e_686b_func1_fixup(struct pci_dev *pdev)
138{
139 printk(KERN_INFO"via686b fix: IDE\n");
140
141 /* Modify IDE controller setup */
142 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 48);
143 pci_write_config_byte(pdev, PCI_COMMAND,
144 PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
145 PCI_COMMAND_MASTER);
146 pci_write_config_byte(pdev, 0x40, 0x0b);
147 /* legacy mode */
148 pci_write_config_byte(pdev, 0x42, 0x09);
149
150#if 1/* play safe, otherwise we may see notebook's usb keyboard lockup */
151 /* disable read prefetch/write post buffers */
152 pci_write_config_byte(pdev, 0x41, 0x02);
153
154 /* use 3/4 as fifo thresh hold */
155 pci_write_config_byte(pdev, 0x43, 0x0a);
156 pci_write_config_byte(pdev, 0x44, 0x00);
157
158 pci_write_config_byte(pdev, 0x45, 0x00);
159#else
160 pci_write_config_byte(pdev, 0x41, 0xc2);
161 pci_write_config_byte(pdev, 0x43, 0x35);
162 pci_write_config_byte(pdev, 0x44, 0x1c);
163
164 pci_write_config_byte(pdev, 0x45, 0x10);
165#endif
166
167 printk(KERN_INFO"via686b fix: IDE done\n");
168}
169
170static void __init loongson2e_686b_func2_fixup(struct pci_dev *pdev)
171{
172 /* irq routing */
173 pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, 10);
174}
175
176static void __init loongson2e_686b_func3_fixup(struct pci_dev *pdev)
177{
178 /* irq routing */
179 pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, 11);
180}
181
182static void __init loongson2e_686b_func5_fixup(struct pci_dev *pdev)
183{
184 unsigned int val;
185 unsigned char c;
186
187 /* enable IO */
188 pci_write_config_byte(pdev, PCI_COMMAND,
189 PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
190 PCI_COMMAND_MASTER);
191 pci_read_config_dword(pdev, 0x4, &val);
192 pci_write_config_dword(pdev, 0x4, val | 1);
193
194 /* route ac97 IRQ */
195 pci_write_config_byte(pdev, 0x3c, 9);
196
197 pci_read_config_byte(pdev, 0x8, &c);
198
199 /* link control: enable link & SGD PCM output */
200 pci_write_config_byte(pdev, 0x41, 0xcc);
201
202 /* disable game port, FM, midi, sb, enable write to reg2c-2f */
203 pci_write_config_byte(pdev, 0x42, 0x20);
204
205 /* we are using Avance logic codec */
206 pci_write_config_word(pdev, 0x2c, 0x1005);
207 pci_write_config_word(pdev, 0x2e, 0x4710);
208 pci_read_config_dword(pdev, 0x2c, &val);
209
210 pci_write_config_byte(pdev, 0x42, 0x0);
211}
212
213DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686,
214 loongson2e_686b_func0_fixup);
215DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1,
216 loongson2e_686b_func1_fixup);
217DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_2,
218 loongson2e_686b_func2_fixup);
219DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_3,
220 loongson2e_686b_func3_fixup);
221DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_5,
222 loongson2e_686b_func5_fixup);
223DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
224 loongson2e_nec_fixup);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-22 19:57:14 -0500