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-rw-r--r--arch/mips/netlogic/xlp/nlm_hal.c62
1 files changed, 40 insertions, 22 deletions
diff --git a/arch/mips/netlogic/xlp/nlm_hal.c b/arch/mips/netlogic/xlp/nlm_hal.c
index c68fd4026104..87560e4db35f 100644
--- a/arch/mips/netlogic/xlp/nlm_hal.c
+++ b/arch/mips/netlogic/xlp/nlm_hal.c
@@ -61,43 +61,61 @@ void nlm_node_init(int node)
61 61
62int nlm_irq_to_irt(int irq) 62int nlm_irq_to_irt(int irq)
63{ 63{
64 if (!PIC_IRQ_IS_IRT(irq)) 64 uint64_t pcibase;
65 return -1; 65 int devoff, irt;
66 66
67 switch (irq) { 67 switch (irq) {
68 case PIC_UART_0_IRQ: 68 case PIC_UART_0_IRQ:
69 return PIC_IRT_UART_0_INDEX; 69 devoff = XLP_IO_UART0_OFFSET(0);
70 break;
70 case PIC_UART_1_IRQ: 71 case PIC_UART_1_IRQ:
71 return PIC_IRT_UART_1_INDEX; 72 devoff = XLP_IO_UART1_OFFSET(0);
72 case PIC_PCIE_LINK_0_IRQ: 73 break;
73 return PIC_IRT_PCIE_LINK_0_INDEX;
74 case PIC_PCIE_LINK_1_IRQ:
75 return PIC_IRT_PCIE_LINK_1_INDEX;
76 case PIC_PCIE_LINK_2_IRQ:
77 return PIC_IRT_PCIE_LINK_2_INDEX;
78 case PIC_PCIE_LINK_3_IRQ:
79 return PIC_IRT_PCIE_LINK_3_INDEX;
80 case PIC_EHCI_0_IRQ: 74 case PIC_EHCI_0_IRQ:
81 return PIC_IRT_EHCI_0_INDEX; 75 devoff = XLP_IO_USB_EHCI0_OFFSET(0);
76 break;
82 case PIC_EHCI_1_IRQ: 77 case PIC_EHCI_1_IRQ:
83 return PIC_IRT_EHCI_1_INDEX; 78 devoff = XLP_IO_USB_EHCI1_OFFSET(0);
79 break;
84 case PIC_OHCI_0_IRQ: 80 case PIC_OHCI_0_IRQ:
85 return PIC_IRT_OHCI_0_INDEX; 81 devoff = XLP_IO_USB_OHCI0_OFFSET(0);
82 break;
86 case PIC_OHCI_1_IRQ: 83 case PIC_OHCI_1_IRQ:
87 return PIC_IRT_OHCI_1_INDEX; 84 devoff = XLP_IO_USB_OHCI1_OFFSET(0);
85 break;
88 case PIC_OHCI_2_IRQ: 86 case PIC_OHCI_2_IRQ:
89 return PIC_IRT_OHCI_2_INDEX; 87 devoff = XLP_IO_USB_OHCI2_OFFSET(0);
88 break;
90 case PIC_OHCI_3_IRQ: 89 case PIC_OHCI_3_IRQ:
91 return PIC_IRT_OHCI_3_INDEX; 90 devoff = XLP_IO_USB_OHCI3_OFFSET(0);
91 break;
92 case PIC_MMC_IRQ: 92 case PIC_MMC_IRQ:
93 return PIC_IRT_MMC_INDEX; 93 devoff = XLP_IO_SD_OFFSET(0);
94 break;
94 case PIC_I2C_0_IRQ: 95 case PIC_I2C_0_IRQ:
95 return PIC_IRT_I2C_0_INDEX; 96 devoff = XLP_IO_I2C0_OFFSET(0);
97 break;
96 case PIC_I2C_1_IRQ: 98 case PIC_I2C_1_IRQ:
97 return PIC_IRT_I2C_1_INDEX; 99 devoff = XLP_IO_I2C1_OFFSET(0);
100 break;
98 default: 101 default:
99 return -1; 102 devoff = 0;
103 break;
100 } 104 }
105
106 if (devoff != 0) {
107 pcibase = nlm_pcicfg_base(devoff);
108 irt = nlm_read_reg(pcibase, XLP_PCI_IRTINFO_REG) & 0xffff;
109 /* HW bug, I2C 1 irt entry is off by one */
110 if (irq == PIC_I2C_1_IRQ)
111 irt = irt + 1;
112 } else if (irq >= PIC_PCIE_LINK_0_IRQ && irq <= PIC_PCIE_LINK_3_IRQ) {
113 /* HW bug, PCI IRT entries are bad on early silicon, fix */
114 irt = PIC_IRT_PCIE_LINK_INDEX(irq - PIC_PCIE_LINK_0_IRQ);
115 } else {
116 irt = -1;
117 }
118 return irt;
101} 119}
102 120
103unsigned int nlm_get_core_frequency(int node, int core) 121unsigned int nlm_get_core_frequency(int node, int core)