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-rw-r--r--arch/mips/netlogic/common/reset.S15
1 files changed, 8 insertions, 7 deletions
diff --git a/arch/mips/netlogic/common/reset.S b/arch/mips/netlogic/common/reset.S
index b231fe1e7a09..fda772a8595b 100644
--- a/arch/mips/netlogic/common/reset.S
+++ b/arch/mips/netlogic/common/reset.S
@@ -197,6 +197,9 @@ FEXPORT(nlm_reset_entry)
197EXPORT(nlm_boot_siblings) 197EXPORT(nlm_boot_siblings)
198 /* core L1D flush before enable threads */ 198 /* core L1D flush before enable threads */
199 xlp_flush_l1_dcache 199 xlp_flush_l1_dcache
200 /* save ra and sp, will be used later (only for boot cpu) */
201 dmtc0 ra, $22, 6
202 dmtc0 sp, $22, 7
200 /* Enable hw threads by writing to MAP_THREADMODE of the core */ 203 /* Enable hw threads by writing to MAP_THREADMODE of the core */
201 li t0, CKSEG1ADDR(RESET_DATA_PHYS) 204 li t0, CKSEG1ADDR(RESET_DATA_PHYS)
202 lw t1, BOOT_THREAD_MODE(t0) /* t1 <- thread mode */ 205 lw t1, BOOT_THREAD_MODE(t0) /* t1 <- thread mode */
@@ -238,14 +241,12 @@ EXPORT(nlm_boot_siblings)
238 nop 241 nop
239 242
240 /* 243 /*
241 * For the boot CPU, we have to restore registers and 244 * For the boot CPU, we have to restore ra and sp and return, rest
242 * return 245 * of the registers will be restored by the caller
243 */ 246 */
2444: dmfc0 t0, $4, 2 /* restore SP from UserLocal */ 2474:
245 li t1, 0xfadebeef 248 dmfc0 ra, $22, 6
246 dmtc0 t1, $4, 2 /* restore SP from UserLocal */ 249 dmfc0 sp, $22, 7
247 PTR_SUBU sp, t0, PT_SIZE
248 RESTORE_ALL
249 jr ra 250 jr ra
250 nop 251 nop
251EXPORT(nlm_reset_entry_end) 252EXPORT(nlm_reset_entry_end)