2 files changed, 6 insertions, 13 deletions

diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c
index 3b3bc1d9ebf9..c6b35482505d 100644
--- a/arch/mips/mti-malta/malta-int.c
+++ b/arch/mips/mti-malta/malta-int.c
@@ -273,11 +273,7 @@ asmlinkage void plat_irq_dispatch(void)
 
         irq = irq_ffs(pending);
 
-        /* HACK: GIC doesn't properly dispatch local interrupts yet */
-        if (gic_present && irq == MIPSCPU_INT_GIC && gic_compare_int())
-                do_IRQ(MIPS_GIC_IRQ_BASE);
-        else
-                do_IRQ(MIPS_CPU_IRQ_BASE + irq);
+        do_IRQ(MIPS_CPU_IRQ_BASE + irq);
 }
 
 #ifdef CONFIG_MIPS_MT_SMP
diff --git a/arch/mips/mti-malta/malta-time.c b/arch/mips/mti-malta/malta-time.c
index 17cfc8a379a6..f6ca8ea4d992 100644
--- a/arch/mips/mti-malta/malta-time.c
+++ b/arch/mips/mti-malta/malta-time.c
@@ -126,9 +126,9 @@ int get_c0_perfcount_int(void)
         if (cpu_has_veic) {
                 set_vi_handler(MSC01E_INT_PERFCTR, mips_perf_dispatch);
                 mips_cpu_perf_irq = MSC01E_INT_BASE + MSC01E_INT_PERFCTR;
+        } else if (gic_present) {
+                mips_cpu_perf_irq = gic_get_c0_perfcount_int();
         } else if (cp0_perfcount_irq >= 0) {
-                if (cpu_has_vint)
-                        set_vi_handler(cp0_perfcount_irq, mips_perf_dispatch);
                 mips_cpu_perf_irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
         } else {
                 mips_cpu_perf_irq = -1;
@@ -139,15 +139,12 @@ int get_c0_perfcount_int(void)
 
 unsigned int get_c0_compare_int(void)
 {
-#ifdef MSC01E_INT_BASE
         if (cpu_has_veic) {
                 set_vi_handler(MSC01E_INT_CPUCTR, mips_timer_dispatch);
                 mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR;
-        } else
-#endif
-        {
-                if (cpu_has_vint)
-                        set_vi_handler(cp0_compare_irq, mips_timer_dispatch);
+        } else if (gic_present) {
+                mips_cpu_timer_irq = gic_get_c0_compare_int();
+        } else {
                 mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;
         }