diff options
Diffstat (limited to 'arch/mips/mti-malta')
-rw-r--r-- | arch/mips/mti-malta/Makefile | 5 | ||||
-rw-r--r-- | arch/mips/mti-malta/Platform | 6 | ||||
-rw-r--r-- | arch/mips/mti-malta/malta-cmdline.c | 59 | ||||
-rw-r--r-- | arch/mips/mti-malta/malta-display.c | 38 | ||||
-rw-r--r-- | arch/mips/mti-malta/malta-init.c | 153 | ||||
-rw-r--r-- | arch/mips/mti-malta/malta-int.c | 4 | ||||
-rw-r--r-- | arch/mips/mti-malta/malta-memory.c | 104 | ||||
-rw-r--r-- | arch/mips/mti-malta/malta-setup.c | 87 | ||||
-rw-r--r-- | arch/mips/mti-malta/malta-time.c | 55 |
9 files changed, 202 insertions, 309 deletions
diff --git a/arch/mips/mti-malta/Makefile b/arch/mips/mti-malta/Makefile index 6079ef33b5f0..0388fc8b5613 100644 --- a/arch/mips/mti-malta/Makefile +++ b/arch/mips/mti-malta/Makefile | |||
@@ -5,9 +5,8 @@ | |||
5 | # Copyright (C) 2008 Wind River Systems, Inc. | 5 | # Copyright (C) 2008 Wind River Systems, Inc. |
6 | # written by Ralf Baechle <ralf@linux-mips.org> | 6 | # written by Ralf Baechle <ralf@linux-mips.org> |
7 | # | 7 | # |
8 | obj-y := malta-amon.o malta-cmdline.o \ | 8 | obj-y := malta-amon.o malta-display.o malta-init.o \ |
9 | malta-display.o malta-init.o malta-int.o \ | 9 | malta-int.o malta-memory.o malta-platform.o \ |
10 | malta-memory.o malta-platform.o \ | ||
11 | malta-reset.o malta-setup.o malta-time.o | 10 | malta-reset.o malta-setup.o malta-time.o |
12 | 11 | ||
13 | obj-$(CONFIG_EARLY_PRINTK) += malta-console.o | 12 | obj-$(CONFIG_EARLY_PRINTK) += malta-console.o |
diff --git a/arch/mips/mti-malta/Platform b/arch/mips/mti-malta/Platform index 5b548b5a4fcf..2cc72c9b38e3 100644 --- a/arch/mips/mti-malta/Platform +++ b/arch/mips/mti-malta/Platform | |||
@@ -3,5 +3,9 @@ | |||
3 | # | 3 | # |
4 | platform-$(CONFIG_MIPS_MALTA) += mti-malta/ | 4 | platform-$(CONFIG_MIPS_MALTA) += mti-malta/ |
5 | cflags-$(CONFIG_MIPS_MALTA) += -I$(srctree)/arch/mips/include/asm/mach-malta | 5 | cflags-$(CONFIG_MIPS_MALTA) += -I$(srctree)/arch/mips/include/asm/mach-malta |
6 | load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000 | 6 | ifdef CONFIG_KVM_GUEST |
7 | load-$(CONFIG_MIPS_MALTA) += 0x0000000040100000 | ||
8 | else | ||
9 | load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000 | ||
10 | endif | ||
7 | all-$(CONFIG_MIPS_MALTA) := $(COMPRESSION_FNAME).bin | 11 | all-$(CONFIG_MIPS_MALTA) := $(COMPRESSION_FNAME).bin |
diff --git a/arch/mips/mti-malta/malta-cmdline.c b/arch/mips/mti-malta/malta-cmdline.c deleted file mode 100644 index 5576a306a145..000000000000 --- a/arch/mips/mti-malta/malta-cmdline.c +++ /dev/null | |||
@@ -1,59 +0,0 @@ | |||
1 | /* | ||
2 | * Carsten Langgaard, carstenl@mips.com | ||
3 | * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved. | ||
4 | * | ||
5 | * This program is free software; you can distribute it and/or modify it | ||
6 | * under the terms of the GNU General Public License (Version 2) as | ||
7 | * published by the Free Software Foundation. | ||
8 | * | ||
9 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | ||
12 | * for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License along | ||
15 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
16 | * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. | ||
17 | * | ||
18 | * Kernel command line creation using the prom monitor (YAMON) argc/argv. | ||
19 | */ | ||
20 | #include <linux/init.h> | ||
21 | #include <linux/string.h> | ||
22 | |||
23 | #include <asm/bootinfo.h> | ||
24 | |||
25 | extern int prom_argc; | ||
26 | extern int *_prom_argv; | ||
27 | |||
28 | /* | ||
29 | * YAMON (32-bit PROM) pass arguments and environment as 32-bit pointer. | ||
30 | * This macro take care of sign extension. | ||
31 | */ | ||
32 | #define prom_argv(index) ((char *)(long)_prom_argv[(index)]) | ||
33 | |||
34 | char * __init prom_getcmdline(void) | ||
35 | { | ||
36 | return &(arcs_cmdline[0]); | ||
37 | } | ||
38 | |||
39 | |||
40 | void __init prom_init_cmdline(void) | ||
41 | { | ||
42 | char *cp; | ||
43 | int actr; | ||
44 | |||
45 | actr = 1; /* Always ignore argv[0] */ | ||
46 | |||
47 | cp = &(arcs_cmdline[0]); | ||
48 | while(actr < prom_argc) { | ||
49 | strcpy(cp, prom_argv(actr)); | ||
50 | cp += strlen(prom_argv(actr)); | ||
51 | *cp++ = ' '; | ||
52 | actr++; | ||
53 | } | ||
54 | if (cp != &(arcs_cmdline[0])) { | ||
55 | /* get rid of trailing space */ | ||
56 | --cp; | ||
57 | *cp = '\0'; | ||
58 | } | ||
59 | } | ||
diff --git a/arch/mips/mti-malta/malta-display.c b/arch/mips/mti-malta/malta-display.c index 9bc58a24e80a..d4f807191ecd 100644 --- a/arch/mips/mti-malta/malta-display.c +++ b/arch/mips/mti-malta/malta-display.c | |||
@@ -1,28 +1,20 @@ | |||
1 | /* | 1 | /* |
2 | * Carsten Langgaard, carstenl@mips.com | 2 | * This file is subject to the terms and conditions of the GNU General Public |
3 | * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved. | 3 | * License. See the file "COPYING" in the main directory of this archive |
4 | * | 4 | * for more details. |
5 | * This program is free software; you can distribute it and/or modify it | ||
6 | * under the terms of the GNU General Public License (Version 2) as | ||
7 | * published by the Free Software Foundation. | ||
8 | * | ||
9 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | ||
12 | * for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License along | ||
15 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
16 | * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. | ||
17 | * | 5 | * |
18 | * Display routines for display messages in MIPS boards ascii display. | 6 | * Display routines for display messages in MIPS boards ascii display. |
7 | * | ||
8 | * Copyright (C) 1999,2000,2012 MIPS Technologies, Inc. | ||
9 | * All rights reserved. | ||
10 | * Authors: Carsten Langgaard <carstenl@mips.com> | ||
11 | * Steven J. Hill <sjhill@mips.com> | ||
19 | */ | 12 | */ |
20 | |||
21 | #include <linux/compiler.h> | 13 | #include <linux/compiler.h> |
22 | #include <linux/timer.h> | 14 | #include <linux/timer.h> |
23 | #include <asm/io.h> | 15 | #include <linux/io.h> |
16 | |||
24 | #include <asm/mips-boards/generic.h> | 17 | #include <asm/mips-boards/generic.h> |
25 | #include <asm/mips-boards/prom.h> | ||
26 | 18 | ||
27 | extern const char display_string[]; | 19 | extern const char display_string[]; |
28 | static unsigned int display_count; | 20 | static unsigned int display_count; |
@@ -36,11 +28,11 @@ void mips_display_message(const char *str) | |||
36 | if (unlikely(display == NULL)) | 28 | if (unlikely(display == NULL)) |
37 | display = ioremap(ASCII_DISPLAY_POS_BASE, 16*sizeof(int)); | 29 | display = ioremap(ASCII_DISPLAY_POS_BASE, 16*sizeof(int)); |
38 | 30 | ||
39 | for (i = 0; i <= 14; i=i+2) { | 31 | for (i = 0; i <= 14; i += 2) { |
40 | if (*str) | 32 | if (*str) |
41 | __raw_writel(*str++, display + i); | 33 | __raw_writel(*str++, display + i); |
42 | else | 34 | else |
43 | __raw_writel(' ', display + i); | 35 | __raw_writel(' ', display + i); |
44 | } | 36 | } |
45 | } | 37 | } |
46 | 38 | ||
diff --git a/arch/mips/mti-malta/malta-init.c b/arch/mips/mti-malta/malta-init.c index c2cbce9e435e..ff8caffd3266 100644 --- a/arch/mips/mti-malta/malta-init.c +++ b/arch/mips/mti-malta/malta-init.c | |||
@@ -1,54 +1,28 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 1999, 2000, 2004, 2005 MIPS Technologies, Inc. | 2 | * This file is subject to the terms and conditions of the GNU General Public |
3 | * All rights reserved. | 3 | * License. See the file "COPYING" in the main directory of this archive |
4 | * Authors: Carsten Langgaard <carstenl@mips.com> | 4 | * for more details. |
5 | * Maciej W. Rozycki <macro@mips.com> | ||
6 | * | ||
7 | * This program is free software; you can distribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License (Version 2) as | ||
9 | * published by the Free Software Foundation. | ||
10 | * | ||
11 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | ||
14 | * for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License along | ||
17 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
18 | * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. | ||
19 | * | 5 | * |
20 | * PROM library initialisation code. | 6 | * PROM library initialisation code. |
7 | * | ||
8 | * Copyright (C) 1999,2000,2004,2005,2012 MIPS Technologies, Inc. | ||
9 | * All rights reserved. | ||
10 | * Authors: Carsten Langgaard <carstenl@mips.com> | ||
11 | * Maciej W. Rozycki <macro@mips.com> | ||
12 | * Steven J. Hill <sjhill@mips.com> | ||
21 | */ | 13 | */ |
22 | #include <linux/init.h> | 14 | #include <linux/init.h> |
23 | #include <linux/string.h> | 15 | #include <linux/string.h> |
24 | #include <linux/kernel.h> | 16 | #include <linux/kernel.h> |
25 | 17 | ||
26 | #include <asm/bootinfo.h> | ||
27 | #include <asm/gt64120.h> | ||
28 | #include <asm/io.h> | ||
29 | #include <asm/cacheflush.h> | 18 | #include <asm/cacheflush.h> |
30 | #include <asm/smp-ops.h> | 19 | #include <asm/smp-ops.h> |
31 | #include <asm/traps.h> | 20 | #include <asm/traps.h> |
32 | 21 | #include <asm/fw/fw.h> | |
33 | #include <asm/gcmpregs.h> | 22 | #include <asm/gcmpregs.h> |
34 | #include <asm/mips-boards/prom.h> | ||
35 | #include <asm/mips-boards/generic.h> | 23 | #include <asm/mips-boards/generic.h> |
36 | #include <asm/mips-boards/bonito64.h> | ||
37 | #include <asm/mips-boards/msc01_pci.h> | ||
38 | |||
39 | #include <asm/mips-boards/malta.h> | 24 | #include <asm/mips-boards/malta.h> |
40 | 25 | ||
41 | int prom_argc; | ||
42 | int *_prom_argv, *_prom_envp; | ||
43 | |||
44 | /* | ||
45 | * YAMON (32-bit PROM) pass arguments and environment as 32-bit pointer. | ||
46 | * This macro take care of sign extension, if running in 64-bit mode. | ||
47 | */ | ||
48 | #define prom_envp(index) ((char *)(long)_prom_envp[(index)]) | ||
49 | |||
50 | int init_debug; | ||
51 | |||
52 | static int mips_revision_corid; | 26 | static int mips_revision_corid; |
53 | int mips_revision_sconid; | 27 | int mips_revision_sconid; |
54 | 28 | ||
@@ -62,74 +36,6 @@ unsigned long _pcictrl_gt64120; | |||
62 | /* MIPS System controller register base */ | 36 | /* MIPS System controller register base */ |
63 | unsigned long _pcictrl_msc; | 37 | unsigned long _pcictrl_msc; |
64 | 38 | ||
65 | char *prom_getenv(char *envname) | ||
66 | { | ||
67 | /* | ||
68 | * Return a pointer to the given environment variable. | ||
69 | * In 64-bit mode: we're using 64-bit pointers, but all pointers | ||
70 | * in the PROM structures are only 32-bit, so we need some | ||
71 | * workarounds, if we are running in 64-bit mode. | ||
72 | */ | ||
73 | int i, index=0; | ||
74 | |||
75 | i = strlen(envname); | ||
76 | |||
77 | while (prom_envp(index)) { | ||
78 | if(strncmp(envname, prom_envp(index), i) == 0) { | ||
79 | return(prom_envp(index+1)); | ||
80 | } | ||
81 | index += 2; | ||
82 | } | ||
83 | |||
84 | return NULL; | ||
85 | } | ||
86 | |||
87 | static inline unsigned char str2hexnum(unsigned char c) | ||
88 | { | ||
89 | if (c >= '0' && c <= '9') | ||
90 | return c - '0'; | ||
91 | if (c >= 'a' && c <= 'f') | ||
92 | return c - 'a' + 10; | ||
93 | return 0; /* foo */ | ||
94 | } | ||
95 | |||
96 | static inline void str2eaddr(unsigned char *ea, unsigned char *str) | ||
97 | { | ||
98 | int i; | ||
99 | |||
100 | for (i = 0; i < 6; i++) { | ||
101 | unsigned char num; | ||
102 | |||
103 | if((*str == '.') || (*str == ':')) | ||
104 | str++; | ||
105 | num = str2hexnum(*str++) << 4; | ||
106 | num |= (str2hexnum(*str++)); | ||
107 | ea[i] = num; | ||
108 | } | ||
109 | } | ||
110 | |||
111 | int get_ethernet_addr(char *ethernet_addr) | ||
112 | { | ||
113 | char *ethaddr_str; | ||
114 | |||
115 | ethaddr_str = prom_getenv("ethaddr"); | ||
116 | if (!ethaddr_str) { | ||
117 | printk("ethaddr not set in boot prom\n"); | ||
118 | return -1; | ||
119 | } | ||
120 | str2eaddr(ethernet_addr, ethaddr_str); | ||
121 | |||
122 | if (init_debug > 1) { | ||
123 | int i; | ||
124 | printk("get_ethernet_addr: "); | ||
125 | for (i=0; i<5; i++) | ||
126 | printk("%02x:", (unsigned char)*(ethernet_addr+i)); | ||
127 | printk("%02x\n", *(ethernet_addr+i)); | ||
128 | } | ||
129 | |||
130 | return 0; | ||
131 | } | ||
132 | |||
133 | #ifdef CONFIG_SERIAL_8250_CONSOLE | 39 | #ifdef CONFIG_SERIAL_8250_CONSOLE |
134 | static void __init console_config(void) | 40 | static void __init console_config(void) |
135 | { | 41 | { |
@@ -138,17 +44,23 @@ static void __init console_config(void) | |||
138 | char parity = '\0', bits = '\0', flow = '\0'; | 44 | char parity = '\0', bits = '\0', flow = '\0'; |
139 | char *s; | 45 | char *s; |
140 | 46 | ||
141 | if ((strstr(prom_getcmdline(), "console=")) == NULL) { | 47 | if ((strstr(fw_getcmdline(), "console=")) == NULL) { |
142 | s = prom_getenv("modetty0"); | 48 | s = fw_getenv("modetty0"); |
143 | if (s) { | 49 | if (s) { |
144 | while (*s >= '0' && *s <= '9') | 50 | while (*s >= '0' && *s <= '9') |
145 | baud = baud*10 + *s++ - '0'; | 51 | baud = baud*10 + *s++ - '0'; |
146 | if (*s == ',') s++; | 52 | if (*s == ',') |
147 | if (*s) parity = *s++; | 53 | s++; |
148 | if (*s == ',') s++; | 54 | if (*s) |
149 | if (*s) bits = *s++; | 55 | parity = *s++; |
150 | if (*s == ',') s++; | 56 | if (*s == ',') |
151 | if (*s == 'h') flow = 'r'; | 57 | s++; |
58 | if (*s) | ||
59 | bits = *s++; | ||
60 | if (*s == ',') | ||
61 | s++; | ||
62 | if (*s == 'h') | ||
63 | flow = 'r'; | ||
152 | } | 64 | } |
153 | if (baud == 0) | 65 | if (baud == 0) |
154 | baud = 38400; | 66 | baud = 38400; |
@@ -158,8 +70,9 @@ static void __init console_config(void) | |||
158 | bits = '8'; | 70 | bits = '8'; |
159 | if (flow == '\0') | 71 | if (flow == '\0') |
160 | flow = 'r'; | 72 | flow = 'r'; |
161 | sprintf(console_string, " console=ttyS0,%d%c%c%c", baud, parity, bits, flow); | 73 | sprintf(console_string, " console=ttyS0,%d%c%c%c", baud, |
162 | strcat(prom_getcmdline(), console_string); | 74 | parity, bits, flow); |
75 | strcat(fw_getcmdline(), console_string); | ||
163 | pr_info("Config serial console:%s\n", console_string); | 76 | pr_info("Config serial console:%s\n", console_string); |
164 | } | 77 | } |
165 | } | 78 | } |
@@ -193,10 +106,6 @@ extern struct plat_smp_ops msmtc_smp_ops; | |||
193 | 106 | ||
194 | void __init prom_init(void) | 107 | void __init prom_init(void) |
195 | { | 108 | { |
196 | prom_argc = fw_arg0; | ||
197 | _prom_argv = (int *) fw_arg1; | ||
198 | _prom_envp = (int *) fw_arg2; | ||
199 | |||
200 | mips_display_message("LINUX"); | 109 | mips_display_message("LINUX"); |
201 | 110 | ||
202 | /* | 111 | /* |
@@ -306,7 +215,7 @@ void __init prom_init(void) | |||
306 | case MIPS_REVISION_SCON_SOCIT: | 215 | case MIPS_REVISION_SCON_SOCIT: |
307 | case MIPS_REVISION_SCON_ROCIT: | 216 | case MIPS_REVISION_SCON_ROCIT: |
308 | _pcictrl_msc = (unsigned long)ioremap(MIPS_MSC01_PCI_REG_BASE, 0x2000); | 217 | _pcictrl_msc = (unsigned long)ioremap(MIPS_MSC01_PCI_REG_BASE, 0x2000); |
309 | mips_pci_controller: | 218 | mips_pci_controller: |
310 | mb(); | 219 | mb(); |
311 | MSC_READ(MSC01_PCI_CFG, data); | 220 | MSC_READ(MSC01_PCI_CFG, data); |
312 | MSC_WRITE(MSC01_PCI_CFG, data & ~MSC01_PCI_CFG_EN_BIT); | 221 | MSC_WRITE(MSC01_PCI_CFG, data & ~MSC01_PCI_CFG_EN_BIT); |
@@ -348,13 +257,13 @@ void __init prom_init(void) | |||
348 | default: | 257 | default: |
349 | /* Unknown system controller */ | 258 | /* Unknown system controller */ |
350 | mips_display_message("SC Error"); | 259 | mips_display_message("SC Error"); |
351 | while (1); /* We die here... */ | 260 | while (1); /* We die here... */ |
352 | } | 261 | } |
353 | board_nmi_handler_setup = mips_nmi_setup; | 262 | board_nmi_handler_setup = mips_nmi_setup; |
354 | board_ejtag_handler_setup = mips_ejtag_setup; | 263 | board_ejtag_handler_setup = mips_ejtag_setup; |
355 | 264 | ||
356 | prom_init_cmdline(); | 265 | fw_init_cmdline(); |
357 | prom_meminit(); | 266 | fw_meminit(); |
358 | #ifdef CONFIG_SERIAL_8250_CONSOLE | 267 | #ifdef CONFIG_SERIAL_8250_CONSOLE |
359 | console_config(); | 268 | console_config(); |
360 | #endif | 269 | #endif |
diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c index e364af70e6cf..0a1339ac3ec8 100644 --- a/arch/mips/mti-malta/malta-int.c +++ b/arch/mips/mti-malta/malta-int.c | |||
@@ -47,7 +47,6 @@ | |||
47 | #include <asm/setup.h> | 47 | #include <asm/setup.h> |
48 | 48 | ||
49 | int gcmp_present = -1; | 49 | int gcmp_present = -1; |
50 | int gic_present; | ||
51 | static unsigned long _msc01_biu_base; | 50 | static unsigned long _msc01_biu_base; |
52 | static unsigned long _gcmp_base; | 51 | static unsigned long _gcmp_base; |
53 | static unsigned int ipi_map[NR_CPUS]; | 52 | static unsigned int ipi_map[NR_CPUS]; |
@@ -134,6 +133,9 @@ static void malta_ipi_irqdispatch(void) | |||
134 | { | 133 | { |
135 | int irq; | 134 | int irq; |
136 | 135 | ||
136 | if (gic_compare_int()) | ||
137 | do_IRQ(MIPS_GIC_IRQ_BASE); | ||
138 | |||
137 | irq = gic_get_int(); | 139 | irq = gic_get_int(); |
138 | if (irq < 0) | 140 | if (irq < 0) |
139 | return; /* interrupt has already been cleared */ | 141 | return; /* interrupt has already been cleared */ |
diff --git a/arch/mips/mti-malta/malta-memory.c b/arch/mips/mti-malta/malta-memory.c index f3d43aa023a9..1f73d63e92a7 100644 --- a/arch/mips/mti-malta/malta-memory.c +++ b/arch/mips/mti-malta/malta-memory.c | |||
@@ -1,73 +1,45 @@ | |||
1 | /* | 1 | /* |
2 | * Carsten Langgaard, carstenl@mips.com | 2 | * This file is subject to the terms and conditions of the GNU General Public |
3 | * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved. | 3 | * License. See the file "COPYING" in the main directory of this archive |
4 | * | 4 | * for more details. |
5 | * This program is free software; you can distribute it and/or modify it | ||
6 | * under the terms of the GNU General Public License (Version 2) as | ||
7 | * published by the Free Software Foundation. | ||
8 | * | ||
9 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | ||
12 | * for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License along | ||
15 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
16 | * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. | ||
17 | * | 5 | * |
18 | * PROM library functions for acquiring/using memory descriptors given to | 6 | * PROM library functions for acquiring/using memory descriptors given to |
19 | * us from the YAMON. | 7 | * us from the YAMON. |
8 | * | ||
9 | * Copyright (C) 1999,2000,2012 MIPS Technologies, Inc. | ||
10 | * All rights reserved. | ||
11 | * Authors: Carsten Langgaard <carstenl@mips.com> | ||
12 | * Steven J. Hill <sjhill@mips.com> | ||
20 | */ | 13 | */ |
21 | #include <linux/init.h> | 14 | #include <linux/init.h> |
22 | #include <linux/mm.h> | ||
23 | #include <linux/bootmem.h> | 15 | #include <linux/bootmem.h> |
24 | #include <linux/pfn.h> | ||
25 | #include <linux/string.h> | 16 | #include <linux/string.h> |
26 | 17 | ||
27 | #include <asm/bootinfo.h> | 18 | #include <asm/bootinfo.h> |
28 | #include <asm/page.h> | ||
29 | #include <asm/sections.h> | 19 | #include <asm/sections.h> |
20 | #include <asm/fw/fw.h> | ||
30 | 21 | ||
31 | #include <asm/mips-boards/prom.h> | 22 | static fw_memblock_t mdesc[FW_MAX_MEMBLOCKS]; |
32 | |||
33 | /*#define DEBUG*/ | ||
34 | |||
35 | enum yamon_memtypes { | ||
36 | yamon_dontuse, | ||
37 | yamon_prom, | ||
38 | yamon_free, | ||
39 | }; | ||
40 | static struct prom_pmemblock mdesc[PROM_MAX_PMEMBLOCKS]; | ||
41 | |||
42 | #ifdef DEBUG | ||
43 | static char *mtypes[3] = { | ||
44 | "Dont use memory", | ||
45 | "YAMON PROM memory", | ||
46 | "Free memory", | ||
47 | }; | ||
48 | #endif | ||
49 | 23 | ||
50 | /* determined physical memory size, not overridden by command line args */ | 24 | /* determined physical memory size, not overridden by command line args */ |
51 | unsigned long physical_memsize = 0L; | 25 | unsigned long physical_memsize = 0L; |
52 | 26 | ||
53 | static struct prom_pmemblock * __init prom_getmdesc(void) | 27 | fw_memblock_t * __init fw_getmdesc(void) |
54 | { | 28 | { |
55 | char *memsize_str; | 29 | char *memsize_str, *ptr; |
56 | unsigned int memsize; | 30 | unsigned int memsize; |
57 | char *ptr; | ||
58 | static char cmdline[COMMAND_LINE_SIZE] __initdata; | 31 | static char cmdline[COMMAND_LINE_SIZE] __initdata; |
32 | long val; | ||
33 | int tmp; | ||
59 | 34 | ||
60 | /* otherwise look in the environment */ | 35 | /* otherwise look in the environment */ |
61 | memsize_str = prom_getenv("memsize"); | 36 | memsize_str = fw_getenv("memsize"); |
62 | if (!memsize_str) { | 37 | if (!memsize_str) { |
63 | printk(KERN_WARNING | 38 | pr_warn("memsize not set in YAMON, set to default (32Mb)\n"); |
64 | "memsize not set in boot prom, set to default (32Mb)\n"); | ||
65 | physical_memsize = 0x02000000; | 39 | physical_memsize = 0x02000000; |
66 | } else { | 40 | } else { |
67 | #ifdef DEBUG | 41 | tmp = kstrtol(memsize_str, 0, &val); |
68 | pr_debug("prom_memsize = %s\n", memsize_str); | 42 | physical_memsize = (unsigned long)val; |
69 | #endif | ||
70 | physical_memsize = simple_strtol(memsize_str, NULL, 0); | ||
71 | } | 43 | } |
72 | 44 | ||
73 | #ifdef CONFIG_CPU_BIG_ENDIAN | 45 | #ifdef CONFIG_CPU_BIG_ENDIAN |
@@ -90,11 +62,11 @@ static struct prom_pmemblock * __init prom_getmdesc(void) | |||
90 | 62 | ||
91 | memset(mdesc, 0, sizeof(mdesc)); | 63 | memset(mdesc, 0, sizeof(mdesc)); |
92 | 64 | ||
93 | mdesc[0].type = yamon_dontuse; | 65 | mdesc[0].type = fw_dontuse; |
94 | mdesc[0].base = 0x00000000; | 66 | mdesc[0].base = 0x00000000; |
95 | mdesc[0].size = 0x00001000; | 67 | mdesc[0].size = 0x00001000; |
96 | 68 | ||
97 | mdesc[1].type = yamon_prom; | 69 | mdesc[1].type = fw_code; |
98 | mdesc[1].base = 0x00001000; | 70 | mdesc[1].base = 0x00001000; |
99 | mdesc[1].size = 0x000ef000; | 71 | mdesc[1].size = 0x000ef000; |
100 | 72 | ||
@@ -105,55 +77,45 @@ static struct prom_pmemblock * __init prom_getmdesc(void) | |||
105 | * This mean that this area can't be used as DMA memory for PCI | 77 | * This mean that this area can't be used as DMA memory for PCI |
106 | * devices. | 78 | * devices. |
107 | */ | 79 | */ |
108 | mdesc[2].type = yamon_dontuse; | 80 | mdesc[2].type = fw_dontuse; |
109 | mdesc[2].base = 0x000f0000; | 81 | mdesc[2].base = 0x000f0000; |
110 | mdesc[2].size = 0x00010000; | 82 | mdesc[2].size = 0x00010000; |
111 | 83 | ||
112 | mdesc[3].type = yamon_dontuse; | 84 | mdesc[3].type = fw_dontuse; |
113 | mdesc[3].base = 0x00100000; | 85 | mdesc[3].base = 0x00100000; |
114 | mdesc[3].size = CPHYSADDR(PFN_ALIGN((unsigned long)&_end)) - mdesc[3].base; | 86 | mdesc[3].size = CPHYSADDR(PFN_ALIGN((unsigned long)&_end)) - |
87 | mdesc[3].base; | ||
115 | 88 | ||
116 | mdesc[4].type = yamon_free; | 89 | mdesc[4].type = fw_free; |
117 | mdesc[4].base = CPHYSADDR(PFN_ALIGN(&_end)); | 90 | mdesc[4].base = CPHYSADDR(PFN_ALIGN(&_end)); |
118 | mdesc[4].size = memsize - mdesc[4].base; | 91 | mdesc[4].size = memsize - mdesc[4].base; |
119 | 92 | ||
120 | return &mdesc[0]; | 93 | return &mdesc[0]; |
121 | } | 94 | } |
122 | 95 | ||
123 | static int __init prom_memtype_classify(unsigned int type) | 96 | static int __init fw_memtype_classify(unsigned int type) |
124 | { | 97 | { |
125 | switch (type) { | 98 | switch (type) { |
126 | case yamon_free: | 99 | case fw_free: |
127 | return BOOT_MEM_RAM; | 100 | return BOOT_MEM_RAM; |
128 | case yamon_prom: | 101 | case fw_code: |
129 | return BOOT_MEM_ROM_DATA; | 102 | return BOOT_MEM_ROM_DATA; |
130 | default: | 103 | default: |
131 | return BOOT_MEM_RESERVED; | 104 | return BOOT_MEM_RESERVED; |
132 | } | 105 | } |
133 | } | 106 | } |
134 | 107 | ||
135 | void __init prom_meminit(void) | 108 | void __init fw_meminit(void) |
136 | { | 109 | { |
137 | struct prom_pmemblock *p; | 110 | fw_memblock_t *p; |
138 | 111 | ||
139 | #ifdef DEBUG | 112 | p = fw_getmdesc(); |
140 | pr_debug("YAMON MEMORY DESCRIPTOR dump:\n"); | ||
141 | p = prom_getmdesc(); | ||
142 | while (p->size) { | ||
143 | int i = 0; | ||
144 | pr_debug("[%d,%p]: base<%08lx> size<%08lx> type<%s>\n", | ||
145 | i, p, p->base, p->size, mtypes[p->type]); | ||
146 | p++; | ||
147 | i++; | ||
148 | } | ||
149 | #endif | ||
150 | p = prom_getmdesc(); | ||
151 | 113 | ||
152 | while (p->size) { | 114 | while (p->size) { |
153 | long type; | 115 | long type; |
154 | unsigned long base, size; | 116 | unsigned long base, size; |
155 | 117 | ||
156 | type = prom_memtype_classify(p->type); | 118 | type = fw_memtype_classify(p->type); |
157 | base = p->base; | 119 | base = p->base; |
158 | size = p->size; | 120 | size = p->size; |
159 | 121 | ||
@@ -172,7 +134,7 @@ void __init prom_free_prom_memory(void) | |||
172 | continue; | 134 | continue; |
173 | 135 | ||
174 | addr = boot_mem_map.map[i].addr; | 136 | addr = boot_mem_map.map[i].addr; |
175 | free_init_pages("prom memory", | 137 | free_init_pages("YAMON memory", |
176 | addr, addr + boot_mem_map.map[i].size); | 138 | addr, addr + boot_mem_map.map[i].size); |
177 | } | 139 | } |
178 | } | 140 | } |
diff --git a/arch/mips/mti-malta/malta-setup.c b/arch/mips/mti-malta/malta-setup.c index 200f64df2c9b..c72a06936781 100644 --- a/arch/mips/mti-malta/malta-setup.c +++ b/arch/mips/mti-malta/malta-setup.c | |||
@@ -25,13 +25,13 @@ | |||
25 | #include <linux/screen_info.h> | 25 | #include <linux/screen_info.h> |
26 | #include <linux/time.h> | 26 | #include <linux/time.h> |
27 | 27 | ||
28 | #include <asm/bootinfo.h> | 28 | #include <asm/fw/fw.h> |
29 | #include <asm/mips-boards/generic.h> | 29 | #include <asm/mips-boards/generic.h> |
30 | #include <asm/mips-boards/prom.h> | ||
31 | #include <asm/mips-boards/malta.h> | 30 | #include <asm/mips-boards/malta.h> |
32 | #include <asm/mips-boards/maltaint.h> | 31 | #include <asm/mips-boards/maltaint.h> |
33 | #include <asm/dma.h> | 32 | #include <asm/dma.h> |
34 | #include <asm/traps.h> | 33 | #include <asm/traps.h> |
34 | #include <asm/gcmpregs.h> | ||
35 | #ifdef CONFIG_VT | 35 | #ifdef CONFIG_VT |
36 | #include <linux/console.h> | 36 | #include <linux/console.h> |
37 | #endif | 37 | #endif |
@@ -105,6 +105,66 @@ static void __init fd_activate(void) | |||
105 | } | 105 | } |
106 | #endif | 106 | #endif |
107 | 107 | ||
108 | static int __init plat_enable_iocoherency(void) | ||
109 | { | ||
110 | int supported = 0; | ||
111 | if (mips_revision_sconid == MIPS_REVISION_SCON_BONITO) { | ||
112 | if (BONITO_PCICACHECTRL & BONITO_PCICACHECTRL_CPUCOH_PRES) { | ||
113 | BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_CPUCOH_EN; | ||
114 | pr_info("Enabled Bonito CPU coherency\n"); | ||
115 | supported = 1; | ||
116 | } | ||
117 | if (strstr(fw_getcmdline(), "iobcuncached")) { | ||
118 | BONITO_PCICACHECTRL &= ~BONITO_PCICACHECTRL_IOBCCOH_EN; | ||
119 | BONITO_PCIMEMBASECFG = BONITO_PCIMEMBASECFG & | ||
120 | ~(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED | | ||
121 | BONITO_PCIMEMBASECFG_MEMBASE1_CACHED); | ||
122 | pr_info("Disabled Bonito IOBC coherency\n"); | ||
123 | } else { | ||
124 | BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_IOBCCOH_EN; | ||
125 | BONITO_PCIMEMBASECFG |= | ||
126 | (BONITO_PCIMEMBASECFG_MEMBASE0_CACHED | | ||
127 | BONITO_PCIMEMBASECFG_MEMBASE1_CACHED); | ||
128 | pr_info("Enabled Bonito IOBC coherency\n"); | ||
129 | } | ||
130 | } else if (gcmp_niocu() != 0) { | ||
131 | /* Nothing special needs to be done to enable coherency */ | ||
132 | pr_info("CMP IOCU detected\n"); | ||
133 | if ((*(unsigned int *)0xbf403000 & 0x81) != 0x81) { | ||
134 | pr_crit("IOCU OPERATION DISABLED BY SWITCH - DEFAULTING TO SW IO COHERENCY\n"); | ||
135 | return 0; | ||
136 | } | ||
137 | supported = 1; | ||
138 | } | ||
139 | hw_coherentio = supported; | ||
140 | return supported; | ||
141 | } | ||
142 | |||
143 | static void __init plat_setup_iocoherency(void) | ||
144 | { | ||
145 | #ifdef CONFIG_DMA_NONCOHERENT | ||
146 | /* | ||
147 | * Kernel has been configured with software coherency | ||
148 | * but we might choose to turn it off and use hardware | ||
149 | * coherency instead. | ||
150 | */ | ||
151 | if (plat_enable_iocoherency()) { | ||
152 | if (coherentio == 0) | ||
153 | pr_info("Hardware DMA cache coherency disabled\n"); | ||
154 | else | ||
155 | pr_info("Hardware DMA cache coherency enabled\n"); | ||
156 | } else { | ||
157 | if (coherentio == 1) | ||
158 | pr_info("Hardware DMA cache coherency unsupported, but enabled from command line!\n"); | ||
159 | else | ||
160 | pr_info("Software DMA cache coherency enabled\n"); | ||
161 | } | ||
162 | #else | ||
163 | if (!plat_enable_iocoherency()) | ||
164 | panic("Hardware DMA cache coherency not supported!"); | ||
165 | #endif | ||
166 | } | ||
167 | |||
108 | #ifdef CONFIG_BLK_DEV_IDE | 168 | #ifdef CONFIG_BLK_DEV_IDE |
109 | static void __init pci_clock_check(void) | 169 | static void __init pci_clock_check(void) |
110 | { | 170 | { |
@@ -115,16 +175,15 @@ static void __init pci_clock_check(void) | |||
115 | 33, 20, 25, 30, 12, 16, 37, 10 | 175 | 33, 20, 25, 30, 12, 16, 37, 10 |
116 | }; | 176 | }; |
117 | int pciclock = pciclocks[jmpr]; | 177 | int pciclock = pciclocks[jmpr]; |
118 | char *argptr = prom_getcmdline(); | 178 | char *argptr = fw_getcmdline(); |
119 | 179 | ||
120 | if (pciclock != 33 && !strstr(argptr, "idebus=")) { | 180 | if (pciclock != 33 && !strstr(argptr, "idebus=")) { |
121 | printk(KERN_WARNING "WARNING: PCI clock is %dMHz, " | 181 | pr_warn("WARNING: PCI clock is %dMHz, setting idebus\n", |
122 | "setting idebus\n", pciclock); | 182 | pciclock); |
123 | argptr += strlen(argptr); | 183 | argptr += strlen(argptr); |
124 | sprintf(argptr, " idebus=%d", pciclock); | 184 | sprintf(argptr, " idebus=%d", pciclock); |
125 | if (pciclock < 20 || pciclock > 66) | 185 | if (pciclock < 20 || pciclock > 66) |
126 | printk(KERN_WARNING "WARNING: IDE timing " | 186 | pr_warn("WARNING: IDE timing calculations will be incorrect\n"); |
127 | "calculations will be incorrect\n"); | ||
128 | } | 187 | } |
129 | } | 188 | } |
130 | #endif | 189 | #endif |
@@ -153,31 +212,31 @@ static void __init bonito_quirks_setup(void) | |||
153 | { | 212 | { |
154 | char *argptr; | 213 | char *argptr; |
155 | 214 | ||
156 | argptr = prom_getcmdline(); | 215 | argptr = fw_getcmdline(); |
157 | if (strstr(argptr, "debug")) { | 216 | if (strstr(argptr, "debug")) { |
158 | BONITO_BONGENCFG |= BONITO_BONGENCFG_DEBUGMODE; | 217 | BONITO_BONGENCFG |= BONITO_BONGENCFG_DEBUGMODE; |
159 | printk(KERN_INFO "Enabled Bonito debug mode\n"); | 218 | pr_info("Enabled Bonito debug mode\n"); |
160 | } else | 219 | } else |
161 | BONITO_BONGENCFG &= ~BONITO_BONGENCFG_DEBUGMODE; | 220 | BONITO_BONGENCFG &= ~BONITO_BONGENCFG_DEBUGMODE; |
162 | 221 | ||
163 | #ifdef CONFIG_DMA_COHERENT | 222 | #ifdef CONFIG_DMA_COHERENT |
164 | if (BONITO_PCICACHECTRL & BONITO_PCICACHECTRL_CPUCOH_PRES) { | 223 | if (BONITO_PCICACHECTRL & BONITO_PCICACHECTRL_CPUCOH_PRES) { |
165 | BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_CPUCOH_EN; | 224 | BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_CPUCOH_EN; |
166 | printk(KERN_INFO "Enabled Bonito CPU coherency\n"); | 225 | pr_info("Enabled Bonito CPU coherency\n"); |
167 | 226 | ||
168 | argptr = prom_getcmdline(); | 227 | argptr = fw_getcmdline(); |
169 | if (strstr(argptr, "iobcuncached")) { | 228 | if (strstr(argptr, "iobcuncached")) { |
170 | BONITO_PCICACHECTRL &= ~BONITO_PCICACHECTRL_IOBCCOH_EN; | 229 | BONITO_PCICACHECTRL &= ~BONITO_PCICACHECTRL_IOBCCOH_EN; |
171 | BONITO_PCIMEMBASECFG = BONITO_PCIMEMBASECFG & | 230 | BONITO_PCIMEMBASECFG = BONITO_PCIMEMBASECFG & |
172 | ~(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED | | 231 | ~(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED | |
173 | BONITO_PCIMEMBASECFG_MEMBASE1_CACHED); | 232 | BONITO_PCIMEMBASECFG_MEMBASE1_CACHED); |
174 | printk(KERN_INFO "Disabled Bonito IOBC coherency\n"); | 233 | pr_info("Disabled Bonito IOBC coherency\n"); |
175 | } else { | 234 | } else { |
176 | BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_IOBCCOH_EN; | 235 | BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_IOBCCOH_EN; |
177 | BONITO_PCIMEMBASECFG |= | 236 | BONITO_PCIMEMBASECFG |= |
178 | (BONITO_PCIMEMBASECFG_MEMBASE0_CACHED | | 237 | (BONITO_PCIMEMBASECFG_MEMBASE0_CACHED | |
179 | BONITO_PCIMEMBASECFG_MEMBASE1_CACHED); | 238 | BONITO_PCIMEMBASECFG_MEMBASE1_CACHED); |
180 | printk(KERN_INFO "Enabled Bonito IOBC coherency\n"); | 239 | pr_info("Enabled Bonito IOBC coherency\n"); |
181 | } | 240 | } |
182 | } else | 241 | } else |
183 | panic("Hardware DMA cache coherency not supported"); | 242 | panic("Hardware DMA cache coherency not supported"); |
@@ -207,6 +266,8 @@ void __init plat_mem_setup(void) | |||
207 | if (mips_revision_sconid == MIPS_REVISION_SCON_BONITO) | 266 | if (mips_revision_sconid == MIPS_REVISION_SCON_BONITO) |
208 | bonito_quirks_setup(); | 267 | bonito_quirks_setup(); |
209 | 268 | ||
269 | plat_setup_iocoherency(); | ||
270 | |||
210 | #ifdef CONFIG_BLK_DEV_IDE | 271 | #ifdef CONFIG_BLK_DEV_IDE |
211 | pci_clock_check(); | 272 | pci_clock_check(); |
212 | #endif | 273 | #endif |
diff --git a/arch/mips/mti-malta/malta-time.c b/arch/mips/mti-malta/malta-time.c index a144b89cf9ba..0ad305f75802 100644 --- a/arch/mips/mti-malta/malta-time.c +++ b/arch/mips/mti-malta/malta-time.c | |||
@@ -39,12 +39,9 @@ | |||
39 | #include <asm/gic.h> | 39 | #include <asm/gic.h> |
40 | 40 | ||
41 | #include <asm/mips-boards/generic.h> | 41 | #include <asm/mips-boards/generic.h> |
42 | #include <asm/mips-boards/prom.h> | ||
43 | |||
44 | #include <asm/mips-boards/maltaint.h> | 42 | #include <asm/mips-boards/maltaint.h> |
45 | 43 | ||
46 | unsigned long cpu_khz; | 44 | unsigned long cpu_khz; |
47 | int gic_frequency; | ||
48 | 45 | ||
49 | static int mips_cpu_timer_irq; | 46 | static int mips_cpu_timer_irq; |
50 | static int mips_cpu_perf_irq; | 47 | static int mips_cpu_perf_irq; |
@@ -74,7 +71,24 @@ static void __init estimate_frequencies(void) | |||
74 | { | 71 | { |
75 | unsigned long flags; | 72 | unsigned long flags; |
76 | unsigned int count, start; | 73 | unsigned int count, start; |
74 | #ifdef CONFIG_IRQ_GIC | ||
77 | unsigned int giccount = 0, gicstart = 0; | 75 | unsigned int giccount = 0, gicstart = 0; |
76 | #endif | ||
77 | |||
78 | #if defined (CONFIG_KVM_GUEST) && defined (CONFIG_KVM_HOST_FREQ) | ||
79 | unsigned int prid = read_c0_prid() & 0xffff00; | ||
80 | |||
81 | /* | ||
82 | * XXXKYMA: hardwire the CPU frequency to Host Freq/4 | ||
83 | */ | ||
84 | count = (CONFIG_KVM_HOST_FREQ * 1000000) >> 3; | ||
85 | if ((prid != (PRID_COMP_MIPS | PRID_IMP_20KC)) && | ||
86 | (prid != (PRID_COMP_MIPS | PRID_IMP_25KF))) | ||
87 | count *= 2; | ||
88 | |||
89 | mips_hpt_frequency = count; | ||
90 | return; | ||
91 | #endif | ||
78 | 92 | ||
79 | local_irq_save(flags); | 93 | local_irq_save(flags); |
80 | 94 | ||
@@ -84,26 +98,32 @@ static void __init estimate_frequencies(void) | |||
84 | 98 | ||
85 | /* Initialize counters. */ | 99 | /* Initialize counters. */ |
86 | start = read_c0_count(); | 100 | start = read_c0_count(); |
101 | #ifdef CONFIG_IRQ_GIC | ||
87 | if (gic_present) | 102 | if (gic_present) |
88 | GICREAD(GIC_REG(SHARED, GIC_SH_COUNTER_31_00), gicstart); | 103 | GICREAD(GIC_REG(SHARED, GIC_SH_COUNTER_31_00), gicstart); |
104 | #endif | ||
89 | 105 | ||
90 | /* Read counter exactly on falling edge of update flag. */ | 106 | /* Read counter exactly on falling edge of update flag. */ |
91 | while (CMOS_READ(RTC_REG_A) & RTC_UIP); | 107 | while (CMOS_READ(RTC_REG_A) & RTC_UIP); |
92 | while (!(CMOS_READ(RTC_REG_A) & RTC_UIP)); | 108 | while (!(CMOS_READ(RTC_REG_A) & RTC_UIP)); |
93 | 109 | ||
94 | count = read_c0_count(); | 110 | count = read_c0_count(); |
111 | #ifdef CONFIG_IRQ_GIC | ||
95 | if (gic_present) | 112 | if (gic_present) |
96 | GICREAD(GIC_REG(SHARED, GIC_SH_COUNTER_31_00), giccount); | 113 | GICREAD(GIC_REG(SHARED, GIC_SH_COUNTER_31_00), giccount); |
114 | #endif | ||
97 | 115 | ||
98 | local_irq_restore(flags); | 116 | local_irq_restore(flags); |
99 | 117 | ||
100 | count -= start; | 118 | count -= start; |
101 | if (gic_present) | ||
102 | giccount -= gicstart; | ||
103 | |||
104 | mips_hpt_frequency = count; | 119 | mips_hpt_frequency = count; |
105 | if (gic_present) | 120 | |
121 | #ifdef CONFIG_IRQ_GIC | ||
122 | if (gic_present) { | ||
123 | giccount -= gicstart; | ||
106 | gic_frequency = giccount; | 124 | gic_frequency = giccount; |
125 | } | ||
126 | #endif | ||
107 | } | 127 | } |
108 | 128 | ||
109 | void read_persistent_clock(struct timespec *ts) | 129 | void read_persistent_clock(struct timespec *ts) |
@@ -159,24 +179,27 @@ void __init plat_time_init(void) | |||
159 | (prid != (PRID_COMP_MIPS | PRID_IMP_25KF))) | 179 | (prid != (PRID_COMP_MIPS | PRID_IMP_25KF))) |
160 | freq *= 2; | 180 | freq *= 2; |
161 | freq = freqround(freq, 5000); | 181 | freq = freqround(freq, 5000); |
162 | pr_debug("CPU frequency %d.%02d MHz\n", freq/1000000, | 182 | printk("CPU frequency %d.%02d MHz\n", freq/1000000, |
163 | (freq%1000000)*100/1000000); | 183 | (freq%1000000)*100/1000000); |
164 | cpu_khz = freq / 1000; | 184 | cpu_khz = freq / 1000; |
165 | 185 | ||
166 | if (gic_present) { | 186 | mips_scroll_message(); |
167 | freq = freqround(gic_frequency, 5000); | ||
168 | pr_debug("GIC frequency %d.%02d MHz\n", freq/1000000, | ||
169 | (freq%1000000)*100/1000000); | ||
170 | gic_clocksource_init(gic_frequency); | ||
171 | } else | ||
172 | init_r4k_clocksource(); | ||
173 | 187 | ||
174 | #ifdef CONFIG_I8253 | 188 | #ifdef CONFIG_I8253 |
175 | /* Only Malta has a PIT. */ | 189 | /* Only Malta has a PIT. */ |
176 | setup_pit_timer(); | 190 | setup_pit_timer(); |
177 | #endif | 191 | #endif |
178 | 192 | ||
179 | mips_scroll_message(); | 193 | #ifdef CONFIG_IRQ_GIC |
194 | if (gic_present) { | ||
195 | freq = freqround(gic_frequency, 5000); | ||
196 | printk("GIC frequency %d.%02d MHz\n", freq/1000000, | ||
197 | (freq%1000000)*100/1000000); | ||
198 | #ifdef CONFIG_CSRC_GIC | ||
199 | gic_clocksource_init(gic_frequency); | ||
200 | #endif | ||
201 | } | ||
202 | #endif | ||
180 | 203 | ||
181 | plat_perf_setup(); | 204 | plat_perf_setup(); |
182 | } | 205 | } |