diff options
Diffstat (limited to 'arch/mips/momentum/ocelot_c/int-handler.S')
| -rw-r--r-- | arch/mips/momentum/ocelot_c/int-handler.S | 102 |
1 files changed, 0 insertions, 102 deletions
diff --git a/arch/mips/momentum/ocelot_c/int-handler.S b/arch/mips/momentum/ocelot_c/int-handler.S deleted file mode 100644 index 52349d9bf1be..000000000000 --- a/arch/mips/momentum/ocelot_c/int-handler.S +++ /dev/null | |||
| @@ -1,102 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * Copyright 2002 Momentum Computer Inc. | ||
| 3 | * Author: Matthew Dharm <mdharm@momenco.com> | ||
| 4 | * | ||
| 5 | * Copyright 2001 MontaVista Software Inc. | ||
| 6 | * Author: jsun@mvista.com or jsun@junsun.net | ||
| 7 | * | ||
| 8 | * First-level interrupt dispatcher for Ocelot-CS board. | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify it | ||
| 11 | * under the terms of the GNU General Public License as published by the | ||
| 12 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 13 | * option) any later version. | ||
| 14 | */ | ||
| 15 | #include <asm/asm.h> | ||
| 16 | #include <asm/mipsregs.h> | ||
| 17 | #include <asm/addrspace.h> | ||
| 18 | #include <asm/regdef.h> | ||
| 19 | #include <asm/stackframe.h> | ||
| 20 | #include "ocelot_c_fpga.h" | ||
| 21 | |||
| 22 | /* | ||
| 23 | * First level interrupt dispatcher for Ocelot-CS board | ||
| 24 | */ | ||
| 25 | .align 5 | ||
| 26 | NESTED(ocelot_handle_int, PT_SIZE, sp) | ||
| 27 | SAVE_ALL | ||
| 28 | CLI | ||
| 29 | .set at | ||
| 30 | mfc0 t0, CP0_CAUSE | ||
| 31 | mfc0 t2, CP0_STATUS | ||
| 32 | |||
| 33 | and t0, t2 | ||
| 34 | |||
| 35 | andi t1, t0, STATUSF_IP0 /* sw0 software interrupt */ | ||
| 36 | bnez t1, ll_sw0_irq | ||
| 37 | andi t1, t0, STATUSF_IP1 /* sw1 software interrupt */ | ||
| 38 | bnez t1, ll_sw1_irq | ||
| 39 | andi t1, t0, STATUSF_IP2 /* int0 hardware line */ | ||
| 40 | bnez t1, ll_scsi_irq | ||
| 41 | andi t1, t0, STATUSF_IP3 /* int1 hardware line */ | ||
| 42 | bnez t1, ll_uart_decode_irq | ||
| 43 | andi t1, t0, STATUSF_IP4 /* int2 hardware line */ | ||
| 44 | bnez t1, ll_pmc_irq | ||
| 45 | andi t1, t0, STATUSF_IP5 /* int3 hardware line */ | ||
| 46 | bnez t1, ll_cpci_decode_irq | ||
| 47 | andi t1, t0, STATUSF_IP6 /* int4 hardware line */ | ||
| 48 | bnez t1, ll_mv64340_decode_irq | ||
| 49 | andi t1, t0, STATUSF_IP7 /* cpu timer */ | ||
| 50 | bnez t1, ll_cputimer_irq | ||
| 51 | |||
| 52 | .set reorder | ||
| 53 | |||
| 54 | /* wrong alarm or masked ... */ | ||
| 55 | j spurious_interrupt | ||
| 56 | nop | ||
| 57 | END(ocelot_handle_int) | ||
| 58 | |||
| 59 | .align 5 | ||
| 60 | ll_sw0_irq: | ||
| 61 | li a0, 0 | ||
| 62 | move a1, sp | ||
| 63 | jal do_IRQ | ||
| 64 | j ret_from_irq | ||
| 65 | ll_sw1_irq: | ||
| 66 | li a0, 1 | ||
| 67 | move a1, sp | ||
| 68 | jal do_IRQ | ||
| 69 | j ret_from_irq | ||
| 70 | ll_scsi_irq: | ||
| 71 | li a0, 2 | ||
| 72 | move a1, sp | ||
| 73 | jal do_IRQ | ||
| 74 | j ret_from_irq | ||
| 75 | |||
| 76 | ll_uart_decode_irq: | ||
| 77 | move a0, sp | ||
| 78 | jal ll_uart_irq | ||
| 79 | j ret_from_irq | ||
| 80 | |||
| 81 | ll_pmc_irq: | ||
| 82 | li a0, 4 | ||
| 83 | move a1, sp | ||
| 84 | jal do_IRQ | ||
| 85 | j ret_from_irq | ||
| 86 | |||
| 87 | ll_cpci_decode_irq: | ||
| 88 | move a0, sp | ||
| 89 | jal ll_cpci_irq | ||
| 90 | j ret_from_irq | ||
| 91 | |||
| 92 | ll_mv64340_decode_irq: | ||
| 93 | move a0, sp | ||
| 94 | jal ll_mv64340_irq | ||
| 95 | j ret_from_irq | ||
| 96 | |||
| 97 | ll_cputimer_irq: | ||
| 98 | li a0, 7 | ||
| 99 | move a1, sp | ||
| 100 | jal do_IRQ | ||
| 101 | j ret_from_irq | ||
| 102 | |||