diff options
Diffstat (limited to 'arch/mips/momentum/ocelot_3/irq.c')
-rw-r--r-- | arch/mips/momentum/ocelot_3/irq.c | 38 |
1 files changed, 33 insertions, 5 deletions
diff --git a/arch/mips/momentum/ocelot_3/irq.c b/arch/mips/momentum/ocelot_3/irq.c index 42464dbd4ad2..87c63c340ae3 100644 --- a/arch/mips/momentum/ocelot_3/irq.c +++ b/arch/mips/momentum/ocelot_3/irq.c | |||
@@ -53,8 +53,6 @@ | |||
53 | #include <asm/mipsregs.h> | 53 | #include <asm/mipsregs.h> |
54 | #include <asm/system.h> | 54 | #include <asm/system.h> |
55 | 55 | ||
56 | extern asmlinkage void ocelot3_handle_int(void); | ||
57 | |||
58 | static struct irqaction cascade_mv64340 = { | 56 | static struct irqaction cascade_mv64340 = { |
59 | no_action, SA_INTERRUPT, CPU_MASK_NONE, "MV64340-Cascade", NULL, NULL | 57 | no_action, SA_INTERRUPT, CPU_MASK_NONE, "MV64340-Cascade", NULL, NULL |
60 | }; | 58 | }; |
@@ -67,9 +65,6 @@ void __init arch_init_irq(void) | |||
67 | */ | 65 | */ |
68 | clear_c0_status(ST0_IM | ST0_BEV); | 66 | clear_c0_status(ST0_IM | ST0_BEV); |
69 | 67 | ||
70 | /* Sets the first-level interrupt dispatcher. */ | ||
71 | set_except_vector(0, ocelot3_handle_int); | ||
72 | mips_cpu_irq_init(0); | ||
73 | rm7k_cpu_irq_init(8); | 68 | rm7k_cpu_irq_init(8); |
74 | 69 | ||
75 | /* set up the cascading interrupts */ | 70 | /* set up the cascading interrupts */ |
@@ -79,3 +74,36 @@ void __init arch_init_irq(void) | |||
79 | set_c0_status(ST0_IM); /* IE in the status register */ | 74 | set_c0_status(ST0_IM); /* IE in the status register */ |
80 | 75 | ||
81 | } | 76 | } |
77 | |||
78 | asmlinkage void plat_irq_dispatch(struct pt_regs *regs) | ||
79 | { | ||
80 | unsigned int pending = read_c0_cause() & read_c0_status(); | ||
81 | |||
82 | if (pending & STATUSF_IP0) | ||
83 | do_IRQ(0, regs); | ||
84 | else if (pending & STATUSF_IP1) | ||
85 | do_IRQ(1, regs); | ||
86 | else if (pending & STATUSF_IP2) | ||
87 | do_IRQ(2, regs); | ||
88 | else if (pending & STATUSF_IP3) | ||
89 | do_IRQ(3, regs); | ||
90 | else if (pending & STATUSF_IP4) | ||
91 | do_IRQ(4, regs); | ||
92 | else if (pending & STATUSF_IP5) | ||
93 | do_IRQ(5, regs); | ||
94 | else if (pending & STATUSF_IP6) | ||
95 | do_IRQ(6, regs); | ||
96 | else if (pending & STATUSF_IP7) | ||
97 | do_IRQ(7, regs); | ||
98 | else { | ||
99 | /* | ||
100 | * Now look at the extended interrupts | ||
101 | */ | ||
102 | pending = (read_c0_cause() & (read_c0_intcontrol() << 8)) >> 16; | ||
103 | |||
104 | if (pending & STATUSF_IP8) | ||
105 | ll_mv64340_irq(regs); | ||
106 | else | ||
107 | spurious_interrupt(regs); | ||
108 | } | ||
109 | } | ||