diff options
Diffstat (limited to 'arch/mips/mm/uasm.c')
-rw-r--r-- | arch/mips/mm/uasm.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/arch/mips/mm/uasm.c b/arch/mips/mm/uasm.c index 0a165c5179a1..1581e9852461 100644 --- a/arch/mips/mm/uasm.c +++ b/arch/mips/mm/uasm.c | |||
@@ -19,8 +19,7 @@ | |||
19 | #include <asm/inst.h> | 19 | #include <asm/inst.h> |
20 | #include <asm/elf.h> | 20 | #include <asm/elf.h> |
21 | #include <asm/bugs.h> | 21 | #include <asm/bugs.h> |
22 | 22 | #include <asm/uasm.h> | |
23 | #include "uasm.h" | ||
24 | 23 | ||
25 | enum fields { | 24 | enum fields { |
26 | RS = 0x001, | 25 | RS = 0x001, |
@@ -63,8 +62,9 @@ enum opcode { | |||
63 | insn_dsrl32, insn_drotr, insn_dsubu, insn_eret, insn_j, insn_jal, | 62 | insn_dsrl32, insn_drotr, insn_dsubu, insn_eret, insn_j, insn_jal, |
64 | insn_jr, insn_ld, insn_ll, insn_lld, insn_lui, insn_lw, insn_mfc0, | 63 | insn_jr, insn_ld, insn_ll, insn_lld, insn_lui, insn_lw, insn_mfc0, |
65 | insn_mtc0, insn_ori, insn_pref, insn_rfe, insn_sc, insn_scd, | 64 | insn_mtc0, insn_ori, insn_pref, insn_rfe, insn_sc, insn_scd, |
66 | insn_sd, insn_sll, insn_sra, insn_srl, insn_subu, insn_sw, | 65 | insn_sd, insn_sll, insn_sra, insn_srl, insn_rotr, insn_subu, insn_sw, |
67 | insn_tlbp, insn_tlbwi, insn_tlbwr, insn_xor, insn_xori, insn_dins | 66 | insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, insn_xor, insn_xori, |
67 | insn_dins | ||
68 | }; | 68 | }; |
69 | 69 | ||
70 | struct insn { | 70 | struct insn { |
@@ -126,9 +126,11 @@ static struct insn insn_table[] __cpuinitdata = { | |||
126 | { insn_sll, M(spec_op, 0, 0, 0, 0, sll_op), RT | RD | RE }, | 126 | { insn_sll, M(spec_op, 0, 0, 0, 0, sll_op), RT | RD | RE }, |
127 | { insn_sra, M(spec_op, 0, 0, 0, 0, sra_op), RT | RD | RE }, | 127 | { insn_sra, M(spec_op, 0, 0, 0, 0, sra_op), RT | RD | RE }, |
128 | { insn_srl, M(spec_op, 0, 0, 0, 0, srl_op), RT | RD | RE }, | 128 | { insn_srl, M(spec_op, 0, 0, 0, 0, srl_op), RT | RD | RE }, |
129 | { insn_rotr, M(spec_op, 1, 0, 0, 0, srl_op), RT | RD | RE }, | ||
129 | { insn_subu, M(spec_op, 0, 0, 0, 0, subu_op), RS | RT | RD }, | 130 | { insn_subu, M(spec_op, 0, 0, 0, 0, subu_op), RS | RT | RD }, |
130 | { insn_sw, M(sw_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, | 131 | { insn_sw, M(sw_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, |
131 | { insn_tlbp, M(cop0_op, cop_op, 0, 0, 0, tlbp_op), 0 }, | 132 | { insn_tlbp, M(cop0_op, cop_op, 0, 0, 0, tlbp_op), 0 }, |
133 | { insn_tlbr, M(cop0_op, cop_op, 0, 0, 0, tlbr_op), 0 }, | ||
132 | { insn_tlbwi, M(cop0_op, cop_op, 0, 0, 0, tlbwi_op), 0 }, | 134 | { insn_tlbwi, M(cop0_op, cop_op, 0, 0, 0, tlbwi_op), 0 }, |
133 | { insn_tlbwr, M(cop0_op, cop_op, 0, 0, 0, tlbwr_op), 0 }, | 135 | { insn_tlbwr, M(cop0_op, cop_op, 0, 0, 0, tlbwr_op), 0 }, |
134 | { insn_xor, M(spec_op, 0, 0, 0, 0, xor_op), RS | RT | RD }, | 136 | { insn_xor, M(spec_op, 0, 0, 0, 0, xor_op), RS | RT | RD }, |
@@ -379,9 +381,11 @@ I_u2s3u1(_sd) | |||
379 | I_u2u1u3(_sll) | 381 | I_u2u1u3(_sll) |
380 | I_u2u1u3(_sra) | 382 | I_u2u1u3(_sra) |
381 | I_u2u1u3(_srl) | 383 | I_u2u1u3(_srl) |
384 | I_u2u1u3(_rotr) | ||
382 | I_u3u1u2(_subu) | 385 | I_u3u1u2(_subu) |
383 | I_u2s3u1(_sw) | 386 | I_u2s3u1(_sw) |
384 | I_0(_tlbp) | 387 | I_0(_tlbp) |
388 | I_0(_tlbr) | ||
385 | I_0(_tlbwi) | 389 | I_0(_tlbwi) |
386 | I_0(_tlbwr) | 390 | I_0(_tlbwr) |
387 | I_u3u1u2(_xor) | 391 | I_u3u1u2(_xor) |