diff options
Diffstat (limited to 'arch/mips/mm/c-r4k.c')
-rw-r--r-- | arch/mips/mm/c-r4k.c | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 2c4f7e11f0d5..6496925b5e29 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c | |||
@@ -93,7 +93,7 @@ static inline void r4k_blast_dcache_page_dc32(unsigned long addr) | |||
93 | blast_dcache32_page(addr); | 93 | blast_dcache32_page(addr); |
94 | } | 94 | } |
95 | 95 | ||
96 | static void __init r4k_blast_dcache_page_setup(void) | 96 | static void __cpuinit r4k_blast_dcache_page_setup(void) |
97 | { | 97 | { |
98 | unsigned long dc_lsize = cpu_dcache_line_size(); | 98 | unsigned long dc_lsize = cpu_dcache_line_size(); |
99 | 99 | ||
@@ -107,7 +107,7 @@ static void __init r4k_blast_dcache_page_setup(void) | |||
107 | 107 | ||
108 | static void (* r4k_blast_dcache_page_indexed)(unsigned long addr); | 108 | static void (* r4k_blast_dcache_page_indexed)(unsigned long addr); |
109 | 109 | ||
110 | static void __init r4k_blast_dcache_page_indexed_setup(void) | 110 | static void __cpuinit r4k_blast_dcache_page_indexed_setup(void) |
111 | { | 111 | { |
112 | unsigned long dc_lsize = cpu_dcache_line_size(); | 112 | unsigned long dc_lsize = cpu_dcache_line_size(); |
113 | 113 | ||
@@ -121,7 +121,7 @@ static void __init r4k_blast_dcache_page_indexed_setup(void) | |||
121 | 121 | ||
122 | static void (* r4k_blast_dcache)(void); | 122 | static void (* r4k_blast_dcache)(void); |
123 | 123 | ||
124 | static void __init r4k_blast_dcache_setup(void) | 124 | static void __cpuinit r4k_blast_dcache_setup(void) |
125 | { | 125 | { |
126 | unsigned long dc_lsize = cpu_dcache_line_size(); | 126 | unsigned long dc_lsize = cpu_dcache_line_size(); |
127 | 127 | ||
@@ -206,7 +206,7 @@ static inline void tx49_blast_icache32_page_indexed(unsigned long page) | |||
206 | 206 | ||
207 | static void (* r4k_blast_icache_page)(unsigned long addr); | 207 | static void (* r4k_blast_icache_page)(unsigned long addr); |
208 | 208 | ||
209 | static void __init r4k_blast_icache_page_setup(void) | 209 | static void __cpuinit r4k_blast_icache_page_setup(void) |
210 | { | 210 | { |
211 | unsigned long ic_lsize = cpu_icache_line_size(); | 211 | unsigned long ic_lsize = cpu_icache_line_size(); |
212 | 212 | ||
@@ -223,7 +223,7 @@ static void __init r4k_blast_icache_page_setup(void) | |||
223 | 223 | ||
224 | static void (* r4k_blast_icache_page_indexed)(unsigned long addr); | 224 | static void (* r4k_blast_icache_page_indexed)(unsigned long addr); |
225 | 225 | ||
226 | static void __init r4k_blast_icache_page_indexed_setup(void) | 226 | static void __cpuinit r4k_blast_icache_page_indexed_setup(void) |
227 | { | 227 | { |
228 | unsigned long ic_lsize = cpu_icache_line_size(); | 228 | unsigned long ic_lsize = cpu_icache_line_size(); |
229 | 229 | ||
@@ -247,7 +247,7 @@ static void __init r4k_blast_icache_page_indexed_setup(void) | |||
247 | 247 | ||
248 | static void (* r4k_blast_icache)(void); | 248 | static void (* r4k_blast_icache)(void); |
249 | 249 | ||
250 | static void __init r4k_blast_icache_setup(void) | 250 | static void __cpuinit r4k_blast_icache_setup(void) |
251 | { | 251 | { |
252 | unsigned long ic_lsize = cpu_icache_line_size(); | 252 | unsigned long ic_lsize = cpu_icache_line_size(); |
253 | 253 | ||
@@ -268,7 +268,7 @@ static void __init r4k_blast_icache_setup(void) | |||
268 | 268 | ||
269 | static void (* r4k_blast_scache_page)(unsigned long addr); | 269 | static void (* r4k_blast_scache_page)(unsigned long addr); |
270 | 270 | ||
271 | static void __init r4k_blast_scache_page_setup(void) | 271 | static void __cpuinit r4k_blast_scache_page_setup(void) |
272 | { | 272 | { |
273 | unsigned long sc_lsize = cpu_scache_line_size(); | 273 | unsigned long sc_lsize = cpu_scache_line_size(); |
274 | 274 | ||
@@ -286,7 +286,7 @@ static void __init r4k_blast_scache_page_setup(void) | |||
286 | 286 | ||
287 | static void (* r4k_blast_scache_page_indexed)(unsigned long addr); | 287 | static void (* r4k_blast_scache_page_indexed)(unsigned long addr); |
288 | 288 | ||
289 | static void __init r4k_blast_scache_page_indexed_setup(void) | 289 | static void __cpuinit r4k_blast_scache_page_indexed_setup(void) |
290 | { | 290 | { |
291 | unsigned long sc_lsize = cpu_scache_line_size(); | 291 | unsigned long sc_lsize = cpu_scache_line_size(); |
292 | 292 | ||
@@ -304,7 +304,7 @@ static void __init r4k_blast_scache_page_indexed_setup(void) | |||
304 | 304 | ||
305 | static void (* r4k_blast_scache)(void); | 305 | static void (* r4k_blast_scache)(void); |
306 | 306 | ||
307 | static void __init r4k_blast_scache_setup(void) | 307 | static void __cpuinit r4k_blast_scache_setup(void) |
308 | { | 308 | { |
309 | unsigned long sc_lsize = cpu_scache_line_size(); | 309 | unsigned long sc_lsize = cpu_scache_line_size(); |
310 | 310 | ||
@@ -691,11 +691,11 @@ static inline void rm7k_erratum31(void) | |||
691 | } | 691 | } |
692 | } | 692 | } |
693 | 693 | ||
694 | static char *way_string[] __initdata = { NULL, "direct mapped", "2-way", | 694 | static char *way_string[] __cpuinitdata = { NULL, "direct mapped", "2-way", |
695 | "3-way", "4-way", "5-way", "6-way", "7-way", "8-way" | 695 | "3-way", "4-way", "5-way", "6-way", "7-way", "8-way" |
696 | }; | 696 | }; |
697 | 697 | ||
698 | static void __init probe_pcache(void) | 698 | static void __cpuinit probe_pcache(void) |
699 | { | 699 | { |
700 | struct cpuinfo_mips *c = ¤t_cpu_data; | 700 | struct cpuinfo_mips *c = ¤t_cpu_data; |
701 | unsigned int config = read_c0_config(); | 701 | unsigned int config = read_c0_config(); |
@@ -1016,7 +1016,7 @@ static void __init probe_pcache(void) | |||
1016 | * executes in KSEG1 space or else you will crash and burn badly. You have | 1016 | * executes in KSEG1 space or else you will crash and burn badly. You have |
1017 | * been warned. | 1017 | * been warned. |
1018 | */ | 1018 | */ |
1019 | static int __init probe_scache(void) | 1019 | static int __cpuinit probe_scache(void) |
1020 | { | 1020 | { |
1021 | unsigned long flags, addr, begin, end, pow2; | 1021 | unsigned long flags, addr, begin, end, pow2; |
1022 | unsigned int config = read_c0_config(); | 1022 | unsigned int config = read_c0_config(); |
@@ -1095,7 +1095,7 @@ extern int r5k_sc_init(void); | |||
1095 | extern int rm7k_sc_init(void); | 1095 | extern int rm7k_sc_init(void); |
1096 | extern int mips_sc_init(void); | 1096 | extern int mips_sc_init(void); |
1097 | 1097 | ||
1098 | static void __init setup_scache(void) | 1098 | static void __cpuinit setup_scache(void) |
1099 | { | 1099 | { |
1100 | struct cpuinfo_mips *c = ¤t_cpu_data; | 1100 | struct cpuinfo_mips *c = ¤t_cpu_data; |
1101 | unsigned int config = read_c0_config(); | 1101 | unsigned int config = read_c0_config(); |
@@ -1206,7 +1206,7 @@ void au1x00_fixup_config_od(void) | |||
1206 | } | 1206 | } |
1207 | } | 1207 | } |
1208 | 1208 | ||
1209 | static void __init coherency_setup(void) | 1209 | static void __cpuinit coherency_setup(void) |
1210 | { | 1210 | { |
1211 | change_c0_config(CONF_CM_CMASK, CONF_CM_DEFAULT); | 1211 | change_c0_config(CONF_CM_CMASK, CONF_CM_DEFAULT); |
1212 | 1212 | ||
@@ -1238,7 +1238,7 @@ static void __init coherency_setup(void) | |||
1238 | } | 1238 | } |
1239 | } | 1239 | } |
1240 | 1240 | ||
1241 | void __init r4k_cache_init(void) | 1241 | void __cpuinit r4k_cache_init(void) |
1242 | { | 1242 | { |
1243 | extern void build_clear_page(void); | 1243 | extern void build_clear_page(void); |
1244 | extern void build_copy_page(void); | 1244 | extern void build_copy_page(void); |