diff options
Diffstat (limited to 'arch/mips/mips-boards')
-rw-r--r-- | arch/mips/mips-boards/atlas/atlas_setup.c | 2 | ||||
-rw-r--r-- | arch/mips/mips-boards/generic/memory.c | 9 | ||||
-rw-r--r-- | arch/mips/mips-boards/malta/malta_setup.c | 12 | ||||
-rw-r--r-- | arch/mips/mips-boards/malta/malta_smp.c | 19 | ||||
-rw-r--r-- | arch/mips/mips-boards/sead/sead_setup.c | 2 | ||||
-rw-r--r-- | arch/mips/mips-boards/sim/sim_setup.c | 2 | ||||
-rw-r--r-- | arch/mips/mips-boards/sim/sim_smp.c | 21 |
7 files changed, 18 insertions, 49 deletions
diff --git a/arch/mips/mips-boards/atlas/atlas_setup.c b/arch/mips/mips-boards/atlas/atlas_setup.c index c20d401ecf80..8cc9effcb832 100644 --- a/arch/mips/mips-boards/atlas/atlas_setup.c +++ b/arch/mips/mips-boards/atlas/atlas_setup.c | |||
@@ -50,7 +50,7 @@ const char *get_system_type(void) | |||
50 | return "MIPS Atlas"; | 50 | return "MIPS Atlas"; |
51 | } | 51 | } |
52 | 52 | ||
53 | void __init plat_setup(void) | 53 | void __init plat_mem_setup(void) |
54 | { | 54 | { |
55 | mips_pcibios_init(); | 55 | mips_pcibios_init(); |
56 | 56 | ||
diff --git a/arch/mips/mips-boards/generic/memory.c b/arch/mips/mips-boards/generic/memory.c index bc4d093685bb..fd492562584a 100644 --- a/arch/mips/mips-boards/generic/memory.c +++ b/arch/mips/mips-boards/generic/memory.c | |||
@@ -76,6 +76,15 @@ struct prom_pmemblock * __init prom_getmdesc(void) | |||
76 | memsize = simple_strtol(memsize_str, NULL, 0); | 76 | memsize = simple_strtol(memsize_str, NULL, 0); |
77 | } | 77 | } |
78 | } | 78 | } |
79 | |||
80 | #ifdef CONFIG_CPU_BIG_ENDIAN | ||
81 | /* | ||
82 | * SOC-it swaps, or perhaps doesn't swap, when DMA'ing the last | ||
83 | * word of physical memory | ||
84 | */ | ||
85 | memsize -= PAGE_SIZE; | ||
86 | #endif | ||
87 | |||
79 | memset(mdesc, 0, sizeof(mdesc)); | 88 | memset(mdesc, 0, sizeof(mdesc)); |
80 | 89 | ||
81 | mdesc[0].type = yamon_dontuse; | 90 | mdesc[0].type = yamon_dontuse; |
diff --git a/arch/mips/mips-boards/malta/malta_setup.c b/arch/mips/mips-boards/malta/malta_setup.c index b8488aab6df1..0766e434b6bd 100644 --- a/arch/mips/mips-boards/malta/malta_setup.c +++ b/arch/mips/mips-boards/malta/malta_setup.c | |||
@@ -53,11 +53,11 @@ extern void kgdb_config(void); | |||
53 | #endif | 53 | #endif |
54 | 54 | ||
55 | struct resource standard_io_resources[] = { | 55 | struct resource standard_io_resources[] = { |
56 | { "dma1", 0x00, 0x1f, IORESOURCE_BUSY }, | 56 | { .name = "dma1", .start = 0x00, .end = 0x1f, .flags = IORESOURCE_BUSY }, |
57 | { "timer", 0x40, 0x5f, IORESOURCE_BUSY }, | 57 | { .name = "timer", .start = 0x40, .end = 0x5f, .flags = IORESOURCE_BUSY }, |
58 | { "keyboard", 0x60, 0x6f, IORESOURCE_BUSY }, | 58 | { .name = "keyboard", .start = 0x60, .end = 0x6f, .flags = IORESOURCE_BUSY }, |
59 | { "dma page reg", 0x80, 0x8f, IORESOURCE_BUSY }, | 59 | { .name = "dma page reg", .start = 0x80, .end = 0x8f, .flags = IORESOURCE_BUSY }, |
60 | { "dma2", 0xc0, 0xdf, IORESOURCE_BUSY }, | 60 | { .name = "dma2", .start = 0xc0, .end = 0xdf, .flags = IORESOURCE_BUSY }, |
61 | }; | 61 | }; |
62 | 62 | ||
63 | #ifdef CONFIG_MTD | 63 | #ifdef CONFIG_MTD |
@@ -111,7 +111,7 @@ void __init fd_activate(void) | |||
111 | } | 111 | } |
112 | #endif | 112 | #endif |
113 | 113 | ||
114 | void __init plat_setup(void) | 114 | void __init plat_mem_setup(void) |
115 | { | 115 | { |
116 | unsigned int i; | 116 | unsigned int i; |
117 | 117 | ||
diff --git a/arch/mips/mips-boards/malta/malta_smp.c b/arch/mips/mips-boards/malta/malta_smp.c index 6c6c8eeedbce..cf967170fe29 100644 --- a/arch/mips/mips-boards/malta/malta_smp.c +++ b/arch/mips/mips-boards/malta/malta_smp.c | |||
@@ -34,25 +34,6 @@ void core_send_ipi(int cpu, unsigned int action) | |||
34 | } | 34 | } |
35 | 35 | ||
36 | /* | 36 | /* |
37 | * Detect available CPUs/VPEs/TCs and populate phys_cpu_present_map | ||
38 | */ | ||
39 | |||
40 | void __init prom_build_cpu_map(void) | ||
41 | { | ||
42 | int nextslot; | ||
43 | |||
44 | /* | ||
45 | * As of November, 2004, MIPSsim only simulates one core | ||
46 | * at a time. However, that core may be a MIPS MT core | ||
47 | * with multiple virtual processors and thread contexts. | ||
48 | */ | ||
49 | |||
50 | if (read_c0_config3() & (1<<2)) { | ||
51 | nextslot = mipsmt_build_cpu_map(1); | ||
52 | } | ||
53 | } | ||
54 | |||
55 | /* | ||
56 | * Platform "CPU" startup hook | 37 | * Platform "CPU" startup hook |
57 | */ | 38 | */ |
58 | 39 | ||
diff --git a/arch/mips/mips-boards/sead/sead_setup.c b/arch/mips/mips-boards/sead/sead_setup.c index 4266ce445174..6430f11f3a95 100644 --- a/arch/mips/mips-boards/sead/sead_setup.c +++ b/arch/mips/mips-boards/sead/sead_setup.c | |||
@@ -45,7 +45,7 @@ const char *get_system_type(void) | |||
45 | return "MIPS SEAD"; | 45 | return "MIPS SEAD"; |
46 | } | 46 | } |
47 | 47 | ||
48 | void __init plat_setup(void) | 48 | void __init plat_mem_setup(void) |
49 | { | 49 | { |
50 | ioport_resource.end = 0x7fffffff; | 50 | ioport_resource.end = 0x7fffffff; |
51 | 51 | ||
diff --git a/arch/mips/mips-boards/sim/sim_setup.c b/arch/mips/mips-boards/sim/sim_setup.c index a2fd62997ca3..15a5dac4ae19 100644 --- a/arch/mips/mips-boards/sim/sim_setup.c +++ b/arch/mips/mips-boards/sim/sim_setup.c | |||
@@ -50,7 +50,7 @@ const char *get_system_type(void) | |||
50 | return "MIPSsim"; | 50 | return "MIPSsim"; |
51 | } | 51 | } |
52 | 52 | ||
53 | void __init plat_setup(void) | 53 | void __init plat_mem_setup(void) |
54 | { | 54 | { |
55 | set_io_port_base(0xbfd00000); | 55 | set_io_port_base(0xbfd00000); |
56 | 56 | ||
diff --git a/arch/mips/mips-boards/sim/sim_smp.c b/arch/mips/mips-boards/sim/sim_smp.c index b7084e7c4bf9..004070956cca 100644 --- a/arch/mips/mips-boards/sim/sim_smp.c +++ b/arch/mips/mips-boards/sim/sim_smp.c | |||
@@ -51,27 +51,6 @@ void core_send_ipi(int cpu, unsigned int action) | |||
51 | } | 51 | } |
52 | 52 | ||
53 | /* | 53 | /* |
54 | * Detect available CPUs/VPEs/TCs and populate phys_cpu_present_map | ||
55 | */ | ||
56 | |||
57 | void __init prom_build_cpu_map(void) | ||
58 | { | ||
59 | #ifdef CONFIG_MIPS_MT_SMTC | ||
60 | int nextslot; | ||
61 | |||
62 | /* | ||
63 | * As of November, 2004, MIPSsim only simulates one core | ||
64 | * at a time. However, that core may be a MIPS MT core | ||
65 | * with multiple virtual processors and thread contexts. | ||
66 | */ | ||
67 | |||
68 | if (read_c0_config3() & (1<<2)) { | ||
69 | nextslot = mipsmt_build_cpu_map(1); | ||
70 | } | ||
71 | #endif /* CONFIG_MIPS_MT_SMTC */ | ||
72 | } | ||
73 | |||
74 | /* | ||
75 | * Platform "CPU" startup hook | 54 | * Platform "CPU" startup hook |
76 | */ | 55 | */ |
77 | 56 | ||