diff options
Diffstat (limited to 'arch/mips/mips-boards/malta/malta_smtc.c')
-rw-r--r-- | arch/mips/mips-boards/malta/malta_smtc.c | 88 |
1 files changed, 88 insertions, 0 deletions
diff --git a/arch/mips/mips-boards/malta/malta_smtc.c b/arch/mips/mips-boards/malta/malta_smtc.c new file mode 100644 index 000000000000..d1c80f631100 --- /dev/null +++ b/arch/mips/mips-boards/malta/malta_smtc.c | |||
@@ -0,0 +1,88 @@ | |||
1 | /* | ||
2 | * Malta Platform-specific hooks for SMP operation | ||
3 | */ | ||
4 | #include <linux/init.h> | ||
5 | |||
6 | #include <asm/mipsregs.h> | ||
7 | #include <asm/mipsmtregs.h> | ||
8 | #include <asm/smtc.h> | ||
9 | #include <asm/smtc_ipi.h> | ||
10 | |||
11 | /* VPE/SMP Prototype implements platform interfaces directly */ | ||
12 | |||
13 | /* | ||
14 | * Cause the specified action to be performed on a targeted "CPU" | ||
15 | */ | ||
16 | |||
17 | void core_send_ipi(int cpu, unsigned int action) | ||
18 | { | ||
19 | /* "CPU" may be TC of same VPE, VPE of same CPU, or different CPU */ | ||
20 | smtc_send_ipi(cpu, LINUX_SMP_IPI, action); | ||
21 | } | ||
22 | |||
23 | /* | ||
24 | * Platform "CPU" startup hook | ||
25 | */ | ||
26 | |||
27 | void prom_boot_secondary(int cpu, struct task_struct *idle) | ||
28 | { | ||
29 | smtc_boot_secondary(cpu, idle); | ||
30 | } | ||
31 | |||
32 | /* | ||
33 | * Post-config but pre-boot cleanup entry point | ||
34 | */ | ||
35 | |||
36 | void prom_init_secondary(void) | ||
37 | { | ||
38 | void smtc_init_secondary(void); | ||
39 | int myvpe; | ||
40 | |||
41 | /* Don't enable Malta I/O interrupts (IP2) for secondary VPEs */ | ||
42 | myvpe = read_c0_tcbind() & TCBIND_CURVPE; | ||
43 | if (myvpe != 0) { | ||
44 | /* Ideally, this should be done only once per VPE, but... */ | ||
45 | clear_c0_status(STATUSF_IP2); | ||
46 | set_c0_status(STATUSF_IP0 | STATUSF_IP1 | STATUSF_IP3 | ||
47 | | STATUSF_IP4 | STATUSF_IP5 | STATUSF_IP6 | ||
48 | | STATUSF_IP7); | ||
49 | } | ||
50 | |||
51 | smtc_init_secondary(); | ||
52 | } | ||
53 | |||
54 | /* | ||
55 | * Platform SMP pre-initialization | ||
56 | * | ||
57 | * As noted above, we can assume a single CPU for now | ||
58 | * but it may be multithreaded. | ||
59 | */ | ||
60 | |||
61 | void plat_smp_setup(void) | ||
62 | { | ||
63 | if (read_c0_config3() & (1<<2)) | ||
64 | mipsmt_build_cpu_map(0); | ||
65 | } | ||
66 | |||
67 | void __init plat_prepare_cpus(unsigned int max_cpus) | ||
68 | { | ||
69 | if (read_c0_config3() & (1<<2)) | ||
70 | mipsmt_prepare_cpus(); | ||
71 | } | ||
72 | |||
73 | /* | ||
74 | * SMP initialization finalization entry point | ||
75 | */ | ||
76 | |||
77 | void prom_smp_finish(void) | ||
78 | { | ||
79 | smtc_smp_finish(); | ||
80 | } | ||
81 | |||
82 | /* | ||
83 | * Hook for after all CPUs are online | ||
84 | */ | ||
85 | |||
86 | void prom_cpus_done(void) | ||
87 | { | ||
88 | } | ||