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-rw-r--r--arch/mips/kernel/irq_cpu.c46
1 files changed, 21 insertions, 25 deletions
diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c
index 0262abe09121..fd945c56bc33 100644
--- a/arch/mips/kernel/irq_cpu.c
+++ b/arch/mips/kernel/irq_cpu.c
@@ -37,42 +37,38 @@
37#include <asm/mipsmtregs.h> 37#include <asm/mipsmtregs.h>
38#include <asm/system.h> 38#include <asm/system.h>
39 39
40static inline void unmask_mips_irq(unsigned int irq) 40static inline void unmask_mips_irq(struct irq_data *d)
41{ 41{
42 set_c0_status(0x100 << (irq - MIPS_CPU_IRQ_BASE)); 42 set_c0_status(0x100 << (d->irq - MIPS_CPU_IRQ_BASE));
43 irq_enable_hazard(); 43 irq_enable_hazard();
44} 44}
45 45
46static inline void mask_mips_irq(unsigned int irq) 46static inline void mask_mips_irq(struct irq_data *d)
47{ 47{
48 clear_c0_status(0x100 << (irq - MIPS_CPU_IRQ_BASE)); 48 clear_c0_status(0x100 << (d->irq - MIPS_CPU_IRQ_BASE));
49 irq_disable_hazard(); 49 irq_disable_hazard();
50} 50}
51 51
52static struct irq_chip mips_cpu_irq_controller = { 52static struct irq_chip mips_cpu_irq_controller = {
53 .name = "MIPS", 53 .name = "MIPS",
54 .ack = mask_mips_irq, 54 .irq_ack = mask_mips_irq,
55 .mask = mask_mips_irq, 55 .irq_mask = mask_mips_irq,
56 .mask_ack = mask_mips_irq, 56 .irq_mask_ack = mask_mips_irq,
57 .unmask = unmask_mips_irq, 57 .irq_unmask = unmask_mips_irq,
58 .eoi = unmask_mips_irq, 58 .irq_eoi = unmask_mips_irq,
59}; 59};
60 60
61/* 61/*
62 * Basically the same as above but taking care of all the MT stuff 62 * Basically the same as above but taking care of all the MT stuff
63 */ 63 */
64 64
65#define unmask_mips_mt_irq unmask_mips_irq 65static unsigned int mips_mt_cpu_irq_startup(struct irq_data *d)
66#define mask_mips_mt_irq mask_mips_irq
67
68static unsigned int mips_mt_cpu_irq_startup(unsigned int irq)
69{ 66{
70 unsigned int vpflags = dvpe(); 67 unsigned int vpflags = dvpe();
71 68
72 clear_c0_cause(0x100 << (irq - MIPS_CPU_IRQ_BASE)); 69 clear_c0_cause(0x100 << (d->irq - MIPS_CPU_IRQ_BASE));
73 evpe(vpflags); 70 evpe(vpflags);
74 unmask_mips_mt_irq(irq); 71 unmask_mips_irq(d);
75
76 return 0; 72 return 0;
77} 73}
78 74
@@ -80,22 +76,22 @@ static unsigned int mips_mt_cpu_irq_startup(unsigned int irq)
80 * While we ack the interrupt interrupts are disabled and thus we don't need 76 * While we ack the interrupt interrupts are disabled and thus we don't need
81 * to deal with concurrency issues. Same for mips_cpu_irq_end. 77 * to deal with concurrency issues. Same for mips_cpu_irq_end.
82 */ 78 */
83static void mips_mt_cpu_irq_ack(unsigned int irq) 79static void mips_mt_cpu_irq_ack(struct irq_data *d)
84{ 80{
85 unsigned int vpflags = dvpe(); 81 unsigned int vpflags = dvpe();
86 clear_c0_cause(0x100 << (irq - MIPS_CPU_IRQ_BASE)); 82 clear_c0_cause(0x100 << (d->irq - MIPS_CPU_IRQ_BASE));
87 evpe(vpflags); 83 evpe(vpflags);
88 mask_mips_mt_irq(irq); 84 mask_mips_irq(d);
89} 85}
90 86
91static struct irq_chip mips_mt_cpu_irq_controller = { 87static struct irq_chip mips_mt_cpu_irq_controller = {
92 .name = "MIPS", 88 .name = "MIPS",
93 .startup = mips_mt_cpu_irq_startup, 89 .irq_startup = mips_mt_cpu_irq_startup,
94 .ack = mips_mt_cpu_irq_ack, 90 .irq_ack = mips_mt_cpu_irq_ack,
95 .mask = mask_mips_mt_irq, 91 .irq_mask = mask_mips_irq,
96 .mask_ack = mips_mt_cpu_irq_ack, 92 .irq_mask_ack = mips_mt_cpu_irq_ack,
97 .unmask = unmask_mips_mt_irq, 93 .irq_unmask = unmask_mips_irq,
98 .eoi = unmask_mips_mt_irq, 94 .irq_eoi = unmask_mips_irq,
99}; 95};
100 96
101void __init mips_cpu_irq_init(void) 97void __init mips_cpu_irq_init(void)