diff options
Diffstat (limited to 'arch/mips/kernel/smp-cmp.c')
-rw-r--r-- | arch/mips/kernel/smp-cmp.c | 55 |
1 files changed, 3 insertions, 52 deletions
diff --git a/arch/mips/kernel/smp-cmp.c b/arch/mips/kernel/smp-cmp.c index 1b925d8a610c..3ef55fb7ac03 100644 --- a/arch/mips/kernel/smp-cmp.c +++ b/arch/mips/kernel/smp-cmp.c | |||
@@ -39,57 +39,9 @@ | |||
39 | #include <asm/amon.h> | 39 | #include <asm/amon.h> |
40 | #include <asm/gic.h> | 40 | #include <asm/gic.h> |
41 | 41 | ||
42 | static void ipi_call_function(unsigned int cpu) | ||
43 | { | ||
44 | pr_debug("CPU%d: %s cpu %d status %08x\n", | ||
45 | smp_processor_id(), __func__, cpu, read_c0_status()); | ||
46 | |||
47 | gic_send_ipi(plat_ipi_call_int_xlate(cpu)); | ||
48 | } | ||
49 | |||
50 | |||
51 | static void ipi_resched(unsigned int cpu) | ||
52 | { | ||
53 | pr_debug("CPU%d: %s cpu %d status %08x\n", | ||
54 | smp_processor_id(), __func__, cpu, read_c0_status()); | ||
55 | |||
56 | gic_send_ipi(plat_ipi_resched_int_xlate(cpu)); | ||
57 | } | ||
58 | |||
59 | /* | ||
60 | * FIXME: This isn't restricted to CMP | ||
61 | * The SMVP kernel could use GIC interrupts if available | ||
62 | */ | ||
63 | void cmp_send_ipi_single(int cpu, unsigned int action) | ||
64 | { | ||
65 | unsigned long flags; | ||
66 | |||
67 | local_irq_save(flags); | ||
68 | |||
69 | switch (action) { | ||
70 | case SMP_CALL_FUNCTION: | ||
71 | ipi_call_function(cpu); | ||
72 | break; | ||
73 | |||
74 | case SMP_RESCHEDULE_YOURSELF: | ||
75 | ipi_resched(cpu); | ||
76 | break; | ||
77 | } | ||
78 | |||
79 | local_irq_restore(flags); | ||
80 | } | ||
81 | |||
82 | static void cmp_send_ipi_mask(const struct cpumask *mask, unsigned int action) | ||
83 | { | ||
84 | unsigned int i; | ||
85 | |||
86 | for_each_cpu(i, mask) | ||
87 | cmp_send_ipi_single(i, action); | ||
88 | } | ||
89 | |||
90 | static void cmp_init_secondary(void) | 42 | static void cmp_init_secondary(void) |
91 | { | 43 | { |
92 | struct cpuinfo_mips *c = ¤t_cpu_data; | 44 | struct cpuinfo_mips *c __maybe_unused = ¤t_cpu_data; |
93 | 45 | ||
94 | /* Assume GIC is present */ | 46 | /* Assume GIC is present */ |
95 | change_c0_status(ST0_IM, STATUSF_IP3 | STATUSF_IP4 | STATUSF_IP6 | | 47 | change_c0_status(ST0_IM, STATUSF_IP3 | STATUSF_IP4 | STATUSF_IP6 | |
@@ -97,7 +49,6 @@ static void cmp_init_secondary(void) | |||
97 | 49 | ||
98 | /* Enable per-cpu interrupts: platform specific */ | 50 | /* Enable per-cpu interrupts: platform specific */ |
99 | 51 | ||
100 | c->core = (read_c0_ebase() >> 1) & 0x1ff; | ||
101 | #if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC) | 52 | #if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC) |
102 | if (cpu_has_mipsmt) | 53 | if (cpu_has_mipsmt) |
103 | c->vpe_id = (read_c0_tcbind() >> TCBIND_CURVPE_SHIFT) & | 54 | c->vpe_id = (read_c0_tcbind() >> TCBIND_CURVPE_SHIFT) & |
@@ -210,8 +161,8 @@ void __init cmp_prepare_cpus(unsigned int max_cpus) | |||
210 | } | 161 | } |
211 | 162 | ||
212 | struct plat_smp_ops cmp_smp_ops = { | 163 | struct plat_smp_ops cmp_smp_ops = { |
213 | .send_ipi_single = cmp_send_ipi_single, | 164 | .send_ipi_single = gic_send_ipi_single, |
214 | .send_ipi_mask = cmp_send_ipi_mask, | 165 | .send_ipi_mask = gic_send_ipi_mask, |
215 | .init_secondary = cmp_init_secondary, | 166 | .init_secondary = cmp_init_secondary, |
216 | .smp_finish = cmp_smp_finish, | 167 | .smp_finish = cmp_smp_finish, |
217 | .cpus_done = cmp_cpus_done, | 168 | .cpus_done = cmp_cpus_done, |