diff options
Diffstat (limited to 'arch/mips/kernel/genex.S')
-rw-r--r-- | arch/mips/kernel/genex.S | 54 |
1 files changed, 0 insertions, 54 deletions
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S index a9ce3408be25..ac35e12cb1f3 100644 --- a/arch/mips/kernel/genex.S +++ b/arch/mips/kernel/genex.S | |||
@@ -21,20 +21,6 @@ | |||
21 | #include <asm/war.h> | 21 | #include <asm/war.h> |
22 | #include <asm/thread_info.h> | 22 | #include <asm/thread_info.h> |
23 | 23 | ||
24 | #ifdef CONFIG_MIPS_MT_SMTC | ||
25 | #define PANIC_PIC(msg) \ | ||
26 | .set push; \ | ||
27 | .set nomicromips; \ | ||
28 | .set reorder; \ | ||
29 | PTR_LA a0,8f; \ | ||
30 | .set noat; \ | ||
31 | PTR_LA AT, panic; \ | ||
32 | jr AT; \ | ||
33 | 9: b 9b; \ | ||
34 | .set pop; \ | ||
35 | TEXT(msg) | ||
36 | #endif | ||
37 | |||
38 | __INIT | 24 | __INIT |
39 | 25 | ||
40 | /* | 26 | /* |
@@ -251,15 +237,6 @@ NESTED(except_vec_vi, 0, sp) | |||
251 | SAVE_AT | 237 | SAVE_AT |
252 | .set push | 238 | .set push |
253 | .set noreorder | 239 | .set noreorder |
254 | #ifdef CONFIG_MIPS_MT_SMTC | ||
255 | /* | ||
256 | * To keep from blindly blocking *all* interrupts | ||
257 | * during service by SMTC kernel, we also want to | ||
258 | * pass the IM value to be cleared. | ||
259 | */ | ||
260 | FEXPORT(except_vec_vi_mori) | ||
261 | ori a0, $0, 0 | ||
262 | #endif /* CONFIG_MIPS_MT_SMTC */ | ||
263 | PTR_LA v1, except_vec_vi_handler | 240 | PTR_LA v1, except_vec_vi_handler |
264 | FEXPORT(except_vec_vi_lui) | 241 | FEXPORT(except_vec_vi_lui) |
265 | lui v0, 0 /* Patched */ | 242 | lui v0, 0 /* Patched */ |
@@ -277,37 +254,10 @@ EXPORT(except_vec_vi_end) | |||
277 | NESTED(except_vec_vi_handler, 0, sp) | 254 | NESTED(except_vec_vi_handler, 0, sp) |
278 | SAVE_TEMP | 255 | SAVE_TEMP |
279 | SAVE_STATIC | 256 | SAVE_STATIC |
280 | #ifdef CONFIG_MIPS_MT_SMTC | ||
281 | /* | ||
282 | * SMTC has an interesting problem that interrupts are level-triggered, | ||
283 | * and the CLI macro will clear EXL, potentially causing a duplicate | ||
284 | * interrupt service invocation. So we need to clear the associated | ||
285 | * IM bit of Status prior to doing CLI, and restore it after the | ||
286 | * service routine has been invoked - we must assume that the | ||
287 | * service routine will have cleared the state, and any active | ||
288 | * level represents a new or otherwised unserviced event... | ||
289 | */ | ||
290 | mfc0 t1, CP0_STATUS | ||
291 | and t0, a0, t1 | ||
292 | #ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP | ||
293 | mfc0 t2, CP0_TCCONTEXT | ||
294 | or t2, t0, t2 | ||
295 | mtc0 t2, CP0_TCCONTEXT | ||
296 | #endif /* CONFIG_MIPS_MT_SMTC_IM_BACKSTOP */ | ||
297 | xor t1, t1, t0 | ||
298 | mtc0 t1, CP0_STATUS | ||
299 | _ehb | ||
300 | #endif /* CONFIG_MIPS_MT_SMTC */ | ||
301 | CLI | 257 | CLI |
302 | #ifdef CONFIG_TRACE_IRQFLAGS | 258 | #ifdef CONFIG_TRACE_IRQFLAGS |
303 | move s0, v0 | 259 | move s0, v0 |
304 | #ifdef CONFIG_MIPS_MT_SMTC | ||
305 | move s1, a0 | ||
306 | #endif | ||
307 | TRACE_IRQS_OFF | 260 | TRACE_IRQS_OFF |
308 | #ifdef CONFIG_MIPS_MT_SMTC | ||
309 | move a0, s1 | ||
310 | #endif | ||
311 | move v0, s0 | 261 | move v0, s0 |
312 | #endif | 262 | #endif |
313 | 263 | ||
@@ -496,9 +446,6 @@ NESTED(nmi_handler, PT_SIZE, sp) | |||
496 | 446 | ||
497 | .align 5 | 447 | .align 5 |
498 | LEAF(handle_ri_rdhwr_vivt) | 448 | LEAF(handle_ri_rdhwr_vivt) |
499 | #ifdef CONFIG_MIPS_MT_SMTC | ||
500 | PANIC_PIC("handle_ri_rdhwr_vivt called") | ||
501 | #else | ||
502 | .set push | 449 | .set push |
503 | .set noat | 450 | .set noat |
504 | .set noreorder | 451 | .set noreorder |
@@ -517,7 +464,6 @@ NESTED(nmi_handler, PT_SIZE, sp) | |||
517 | .set pop | 464 | .set pop |
518 | bltz k1, handle_ri /* slow path */ | 465 | bltz k1, handle_ri /* slow path */ |
519 | /* fall thru */ | 466 | /* fall thru */ |
520 | #endif | ||
521 | END(handle_ri_rdhwr_vivt) | 467 | END(handle_ri_rdhwr_vivt) |
522 | 468 | ||
523 | LEAF(handle_ri_rdhwr) | 469 | LEAF(handle_ri_rdhwr) |