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Diffstat (limited to 'arch/mips/kernel/cpu-probe.c')
-rw-r--r--arch/mips/kernel/cpu-probe.c26
1 files changed, 9 insertions, 17 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index c6568bf4b1b0..4c6167a17875 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -27,7 +27,7 @@
27#include <asm/spram.h> 27#include <asm/spram.h>
28#include <asm/uaccess.h> 28#include <asm/uaccess.h>
29 29
30static int __cpuinitdata mips_fpu_disabled; 30static int mips_fpu_disabled;
31 31
32static int __init fpu_disable(char *s) 32static int __init fpu_disable(char *s)
33{ 33{
@@ -39,7 +39,7 @@ static int __init fpu_disable(char *s)
39 39
40__setup("nofpu", fpu_disable); 40__setup("nofpu", fpu_disable);
41 41
42int __cpuinitdata mips_dsp_disabled; 42int mips_dsp_disabled;
43 43
44static int __init dsp_disable(char *s) 44static int __init dsp_disable(char *s)
45{ 45{
@@ -134,7 +134,7 @@ static inline void cpu_probe_vmbits(struct cpuinfo_mips *c)
134#endif 134#endif
135} 135}
136 136
137static void __cpuinit set_isa(struct cpuinfo_mips *c, unsigned int isa) 137static void set_isa(struct cpuinfo_mips *c, unsigned int isa)
138{ 138{
139 switch (isa) { 139 switch (isa) {
140 case MIPS_CPU_ISA_M64R2: 140 case MIPS_CPU_ISA_M64R2:
@@ -146,8 +146,7 @@ static void __cpuinit set_isa(struct cpuinfo_mips *c, unsigned int isa)
146 case MIPS_CPU_ISA_IV: 146 case MIPS_CPU_ISA_IV:
147 c->isa_level |= MIPS_CPU_ISA_IV; 147 c->isa_level |= MIPS_CPU_ISA_IV;
148 case MIPS_CPU_ISA_III: 148 case MIPS_CPU_ISA_III:
149 c->isa_level |= MIPS_CPU_ISA_I | MIPS_CPU_ISA_II | 149 c->isa_level |= MIPS_CPU_ISA_II | MIPS_CPU_ISA_III;
150 MIPS_CPU_ISA_III;
151 break; 150 break;
152 151
153 case MIPS_CPU_ISA_M32R2: 152 case MIPS_CPU_ISA_M32R2:
@@ -156,13 +155,11 @@ static void __cpuinit set_isa(struct cpuinfo_mips *c, unsigned int isa)
156 c->isa_level |= MIPS_CPU_ISA_M32R1; 155 c->isa_level |= MIPS_CPU_ISA_M32R1;
157 case MIPS_CPU_ISA_II: 156 case MIPS_CPU_ISA_II:
158 c->isa_level |= MIPS_CPU_ISA_II; 157 c->isa_level |= MIPS_CPU_ISA_II;
159 case MIPS_CPU_ISA_I:
160 c->isa_level |= MIPS_CPU_ISA_I;
161 break; 158 break;
162 } 159 }
163} 160}
164 161
165static char unknown_isa[] __cpuinitdata = KERN_ERR \ 162static char unknown_isa[] = KERN_ERR \
166 "Unsupported ISA type, c0.config0: %d."; 163 "Unsupported ISA type, c0.config0: %d.";
167 164
168static inline unsigned int decode_config0(struct cpuinfo_mips *c) 165static inline unsigned int decode_config0(struct cpuinfo_mips *c)
@@ -272,9 +269,6 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c)
272 c->options |= MIPS_CPU_ULRI; 269 c->options |= MIPS_CPU_ULRI;
273 if (config3 & MIPS_CONF3_ISA) 270 if (config3 & MIPS_CONF3_ISA)
274 c->options |= MIPS_CPU_MICROMIPS; 271 c->options |= MIPS_CPU_MICROMIPS;
275#ifdef CONFIG_CPU_MICROMIPS
276 write_c0_config3(read_c0_config3() | MIPS_CONF3_ISA_OE);
277#endif
278 if (config3 & MIPS_CONF3_VZ) 272 if (config3 & MIPS_CONF3_VZ)
279 c->ases |= MIPS_ASE_VZ; 273 c->ases |= MIPS_ASE_VZ;
280 274
@@ -296,7 +290,7 @@ static inline unsigned int decode_config4(struct cpuinfo_mips *c)
296 return config4 & MIPS_CONF_M; 290 return config4 & MIPS_CONF_M;
297} 291}
298 292
299static void __cpuinit decode_configs(struct cpuinfo_mips *c) 293static void decode_configs(struct cpuinfo_mips *c)
300{ 294{
301 int ok; 295 int ok;
302 296
@@ -332,7 +326,6 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
332 case PRID_IMP_R2000: 326 case PRID_IMP_R2000:
333 c->cputype = CPU_R2000; 327 c->cputype = CPU_R2000;
334 __cpu_name[cpu] = "R2000"; 328 __cpu_name[cpu] = "R2000";
335 set_isa(c, MIPS_CPU_ISA_I);
336 c->options = MIPS_CPU_TLB | MIPS_CPU_3K_CACHE | 329 c->options = MIPS_CPU_TLB | MIPS_CPU_3K_CACHE |
337 MIPS_CPU_NOFPUEX; 330 MIPS_CPU_NOFPUEX;
338 if (__cpu_has_fpu()) 331 if (__cpu_has_fpu())
@@ -352,7 +345,6 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
352 c->cputype = CPU_R3000; 345 c->cputype = CPU_R3000;
353 __cpu_name[cpu] = "R3000"; 346 __cpu_name[cpu] = "R3000";
354 } 347 }
355 set_isa(c, MIPS_CPU_ISA_I);
356 c->options = MIPS_CPU_TLB | MIPS_CPU_3K_CACHE | 348 c->options = MIPS_CPU_TLB | MIPS_CPU_3K_CACHE |
357 MIPS_CPU_NOFPUEX; 349 MIPS_CPU_NOFPUEX;
358 if (__cpu_has_fpu()) 350 if (__cpu_has_fpu())
@@ -455,7 +447,6 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
455 break; 447 break;
456 #endif 448 #endif
457 case PRID_IMP_TX39: 449 case PRID_IMP_TX39:
458 set_isa(c, MIPS_CPU_ISA_I);
459 c->options = MIPS_CPU_TLB | MIPS_CPU_TX39_CACHE; 450 c->options = MIPS_CPU_TLB | MIPS_CPU_TX39_CACHE;
460 451
461 if ((c->processor_id & 0xf0) == (PRID_REV_TX3927 & 0xf0)) { 452 if ((c->processor_id & 0xf0) == (PRID_REV_TX3927 & 0xf0)) {
@@ -959,6 +950,7 @@ static inline void cpu_probe_netlogic(struct cpuinfo_mips *c, int cpu)
959 set_isa(c, MIPS_CPU_ISA_M64R1); 950 set_isa(c, MIPS_CPU_ISA_M64R1);
960 c->tlbsize = ((read_c0_config1() >> 25) & 0x3f) + 1; 951 c->tlbsize = ((read_c0_config1() >> 25) & 0x3f) + 1;
961 } 952 }
953 c->kscratch_mask = 0xf;
962} 954}
963 955
964#ifdef CONFIG_64BIT 956#ifdef CONFIG_64BIT
@@ -970,7 +962,7 @@ EXPORT_SYMBOL(__ua_limit);
970const char *__cpu_name[NR_CPUS]; 962const char *__cpu_name[NR_CPUS];
971const char *__elf_platform; 963const char *__elf_platform;
972 964
973__cpuinit void cpu_probe(void) 965void cpu_probe(void)
974{ 966{
975 struct cpuinfo_mips *c = &current_cpu_data; 967 struct cpuinfo_mips *c = &current_cpu_data;
976 unsigned int cpu = smp_processor_id(); 968 unsigned int cpu = smp_processor_id();
@@ -1055,7 +1047,7 @@ __cpuinit void cpu_probe(void)
1055#endif 1047#endif
1056} 1048}
1057 1049
1058__cpuinit void cpu_report(void) 1050void cpu_report(void)
1059{ 1051{
1060 struct cpuinfo_mips *c = &current_cpu_data; 1052 struct cpuinfo_mips *c = &current_cpu_data;
1061 1053