1 files changed, 84 insertions, 44 deletions

diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c
index 32103cc2a257..4d735d0e58f5 100644
--- a/arch/mips/kernel/branch.c
+++ b/arch/mips/kernel/branch.c
@@ -9,6 +9,7 @@
 #include <linux/kernel.h>
 #include <linux/sched.h>
 #include <linux/signal.h>
+#include <linux/module.h>
 #include <asm/branch.h>
 #include <asm/cpu.h>
 #include <asm/cpu-features.h>
@@ -17,28 +18,22 @@
 #include <asm/ptrace.h>
 #include <asm/uaccess.h>
 
-/*
- * Compute the return address and do emulate branch simulation, if required.
+/**
+ * __compute_return_epc_for_insn - Computes the return address and do emulate
+ *                                  branch simulation, if required.
+ *
+ * @regs:       Pointer to pt_regs
+ * @insn:       branch instruction to decode
+ * @returns:    -EFAULT on error and forces SIGBUS, and on success
+ *              returns 0 or BRANCH_LIKELY_TAKEN as appropriate after
+ *              evaluating the branch.
  */
-int __compute_return_epc(struct pt_regs *regs)
+int __compute_return_epc_for_insn(struct pt_regs *regs,
+                                   union mips_instruction insn)
 {
-        unsigned int __user *addr;
         unsigned int bit, fcr31, dspcontrol;
-        long epc;
-        union mips_instruction insn;
-
-        epc = regs->cp0_epc;
-        if (epc & 3)
-                goto unaligned;
-
-        /*
-         * Read the instruction
-         */
-        addr = (unsigned int __user *) epc;
-        if (__get_user(insn.word, addr)) {
-                force_sig(SIGSEGV, current);
-                return -EFAULT;
-        }
+        long epc = regs->cp0_epc;
+        int ret = 0;
 
         switch (insn.i_format.opcode) {
         /*
@@ -64,18 +59,22 @@ int __compute_return_epc(struct pt_regs *regs)
                 switch (insn.i_format.rt) {
                 case bltz_op:
                 case bltzl_op:
-                        if ((long)regs->regs[insn.i_format.rs] < 0)
+                        if ((long)regs->regs[insn.i_format.rs] < 0) {
                                 epc = epc + 4 + (insn.i_format.simmediate << 2);
-                        else
+                                if (insn.i_format.rt == bltzl_op)
+                                        ret = BRANCH_LIKELY_TAKEN;
+                        } else
                                 epc += 8;
                         regs->cp0_epc = epc;
                         break;
 
                 case bgez_op:
                 case bgezl_op:
-                        if ((long)regs->regs[insn.i_format.rs] >= 0)
+                        if ((long)regs->regs[insn.i_format.rs] >= 0) {
                                 epc = epc + 4 + (insn.i_format.simmediate << 2);
-                        else
+                                if (insn.i_format.rt == bgezl_op)
+                                        ret = BRANCH_LIKELY_TAKEN;
+                        } else
                                 epc += 8;
                         regs->cp0_epc = epc;
                         break;
@@ -83,9 +82,11 @@ int __compute_return_epc(struct pt_regs *regs)
                 case bltzal_op:
                 case bltzall_op:
                         regs->regs[31] = epc + 8;
-                        if ((long)regs->regs[insn.i_format.rs] < 0)
+                        if ((long)regs->regs[insn.i_format.rs] < 0) {
                                 epc = epc + 4 + (insn.i_format.simmediate << 2);
-                        else
+                                if (insn.i_format.rt == bltzall_op)
+                                        ret = BRANCH_LIKELY_TAKEN;
+                        } else
                                 epc += 8;
                         regs->cp0_epc = epc;
                         break;
@@ -93,12 +94,15 @@ int __compute_return_epc(struct pt_regs *regs)
                 case bgezal_op:
                 case bgezall_op:
                         regs->regs[31] = epc + 8;
-                        if ((long)regs->regs[insn.i_format.rs] >= 0)
+                        if ((long)regs->regs[insn.i_format.rs] >= 0) {
                                 epc = epc + 4 + (insn.i_format.simmediate << 2);
-                        else
+                                if (insn.i_format.rt == bgezall_op)
+                                        ret = BRANCH_LIKELY_TAKEN;
+                        } else
                                 epc += 8;
                         regs->cp0_epc = epc;
                         break;
+
                 case bposge32_op:
                         if (!cpu_has_dsp)
                                 goto sigill;
@@ -133,9 +137,11 @@ int __compute_return_epc(struct pt_regs *regs)
         case beq_op:
         case beql_op:
                 if (regs->regs[insn.i_format.rs] ==
-                    regs->regs[insn.i_format.rt])
+                    regs->regs[insn.i_format.rt]) {
                         epc = epc + 4 + (insn.i_format.simmediate << 2);
-                else
+                        if (insn.i_format.rt == beql_op)
+                                ret = BRANCH_LIKELY_TAKEN;
+                } else
                         epc += 8;
                 regs->cp0_epc = epc;
                 break;
@@ -143,9 +149,11 @@ int __compute_return_epc(struct pt_regs *regs)
         case bne_op:
         case bnel_op:
                 if (regs->regs[insn.i_format.rs] !=
-                    regs->regs[insn.i_format.rt])
+                    regs->regs[insn.i_format.rt]) {
                         epc = epc + 4 + (insn.i_format.simmediate << 2);
-                else
+                        if (insn.i_format.rt == bnel_op)
+                                ret = BRANCH_LIKELY_TAKEN;
+                } else
                         epc += 8;
                 regs->cp0_epc = epc;
                 break;
@@ -153,9 +161,11 @@ int __compute_return_epc(struct pt_regs *regs)
         case blez_op: /* not really i_format */
         case blezl_op:
                 /* rt field assumed to be zero */
-                if ((long)regs->regs[insn.i_format.rs] <= 0)
+                if ((long)regs->regs[insn.i_format.rs] <= 0) {
                         epc = epc + 4 + (insn.i_format.simmediate << 2);
-                else
+                        if (insn.i_format.rt == bnel_op)
+                                ret = BRANCH_LIKELY_TAKEN;
+                } else
                         epc += 8;
                 regs->cp0_epc = epc;
                 break;
@@ -163,9 +173,11 @@ int __compute_return_epc(struct pt_regs *regs)
         case bgtz_op:
         case bgtzl_op:
                 /* rt field assumed to be zero */
-                if ((long)regs->regs[insn.i_format.rs] > 0)
+                if ((long)regs->regs[insn.i_format.rs] > 0) {
                         epc = epc + 4 + (insn.i_format.simmediate << 2);
-                else
+                        if (insn.i_format.rt == bnel_op)
+                                ret = BRANCH_LIKELY_TAKEN;
+                } else
                         epc += 8;
                 regs->cp0_epc = epc;
                 break;
@@ -187,18 +199,22 @@ int __compute_return_epc(struct pt_regs *regs)
                 switch (insn.i_format.rt & 3) {
                 case 0: /* bc1f */
                 case 2: /* bc1fl */
-                        if (~fcr31 & (1 << bit))
+                        if (~fcr31 & (1 << bit)) {
                                 epc = epc + 4 + (insn.i_format.simmediate << 2);
-                        else
+                                if (insn.i_format.rt == 2)
+                                        ret = BRANCH_LIKELY_TAKEN;
+                        } else
                                 epc += 8;
                         regs->cp0_epc = epc;
                         break;
 
                 case 1: /* bc1t */
                 case 3: /* bc1tl */
-                        if (fcr31 & (1 << bit))
+                        if (fcr31 & (1 << bit)) {
                                 epc = epc + 4 + (insn.i_format.simmediate << 2);
-                        else
+                                if (insn.i_format.rt == 3)
+                                        ret = BRANCH_LIKELY_TAKEN;
+                        } else
                                 epc += 8;
                         regs->cp0_epc = epc;
                         break;
@@ -239,15 +255,39 @@ int __compute_return_epc(struct pt_regs *regs)
 #endif
         }
 
-        return 0;
+        return ret;
 
-unaligned:
-        printk("%s: unaligned epc - sending SIGBUS.\n", current->comm);
+sigill:
+        printk("%s: DSP branch but not DSP ASE - sending SIGBUS.\n", current->comm);
         force_sig(SIGBUS, current);
         return -EFAULT;
+}
+EXPORT_SYMBOL_GPL(__compute_return_epc_for_insn);
 
-sigill:
-        printk("%s: DSP branch but not DSP ASE - sending SIGBUS.\n", current->comm);
+int __compute_return_epc(struct pt_regs *regs)
+{
+        unsigned int __user *addr;
+        long epc;
+        union mips_instruction insn;
+
+        epc = regs->cp0_epc;
+        if (epc & 3)
+                goto unaligned;
+
+        /*
+         * Read the instruction
+         */
+        addr = (unsigned int __user *) epc;
+        if (__get_user(insn.word, addr)) {
+                force_sig(SIGSEGV, current);
+                return -EFAULT;
+        }
+
+        return __compute_return_epc_for_insn(regs, insn);
+
+unaligned:
+        printk("%s: unaligned epc - sending SIGBUS.\n", current->comm);
         force_sig(SIGBUS, current);
         return -EFAULT;
+
 }